diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/crash.c | 4 | ||||
-rw-r--r-- | arch/powerpc/kernel/irq.c | 8 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/interrupt.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/spider-pic.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/iseries/irq.c | 6 | ||||
-rw-r--r-- | arch/powerpc/platforms/powermac/pic.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/xics.c | 8 | ||||
-rw-r--r-- | arch/powerpc/sysdev/i8259.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/ipic.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 8 |
10 files changed, 25 insertions, 25 deletions
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index e253a45dcf10..1bfad7c2f8c8 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
@@ -193,10 +193,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs) | |||
193 | struct irq_desc *desc = irq_descp(irq); | 193 | struct irq_desc *desc = irq_descp(irq); |
194 | 194 | ||
195 | if (desc->status & IRQ_INPROGRESS) | 195 | if (desc->status & IRQ_INPROGRESS) |
196 | desc->handler->end(irq); | 196 | desc->chip->end(irq); |
197 | 197 | ||
198 | if (!(desc->status & IRQ_DISABLED)) | 198 | if (!(desc->status & IRQ_DISABLED)) |
199 | desc->handler->disable(irq); | 199 | desc->chip->disable(irq); |
200 | } | 200 | } |
201 | 201 | ||
202 | if (ppc_md.kexec_cpu_down) | 202 | if (ppc_md.kexec_cpu_down) |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 40d4c14fde8f..8cfc779d882d 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -120,8 +120,8 @@ int show_interrupts(struct seq_file *p, void *v) | |||
120 | #else | 120 | #else |
121 | seq_printf(p, "%10u ", kstat_irqs(i)); | 121 | seq_printf(p, "%10u ", kstat_irqs(i)); |
122 | #endif /* CONFIG_SMP */ | 122 | #endif /* CONFIG_SMP */ |
123 | if (desc->handler) | 123 | if (desc->chip) |
124 | seq_printf(p, " %s ", desc->handler->typename); | 124 | seq_printf(p, " %s ", desc->chip->typename); |
125 | else | 125 | else |
126 | seq_puts(p, " None "); | 126 | seq_puts(p, " None "); |
127 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); | 127 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
@@ -169,8 +169,8 @@ void fixup_irqs(cpumask_t map) | |||
169 | printk("Breaking affinity for irq %i\n", irq); | 169 | printk("Breaking affinity for irq %i\n", irq); |
170 | mask = map; | 170 | mask = map; |
171 | } | 171 | } |
172 | if (irq_desc[irq].handler->set_affinity) | 172 | if (irq_desc[irq].chip->set_affinity) |
173 | irq_desc[irq].handler->set_affinity(irq, mask); | 173 | irq_desc[irq].chip->set_affinity(irq, mask); |
174 | else if (irq_desc[irq].action && !(warned++)) | 174 | else if (irq_desc[irq].action && !(warned++)) |
175 | printk("Cannot set affinity for irq %i\n", irq); | 175 | printk("Cannot set affinity for irq %i\n", irq); |
176 | } | 176 | } |
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 1bbf822b4efc..7bff3cbc5723 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -307,7 +307,7 @@ static void iic_request_ipi(int ipi, const char *name) | |||
307 | irq = iic_ipi_to_irq(ipi); | 307 | irq = iic_ipi_to_irq(ipi); |
308 | /* IPIs are marked SA_INTERRUPT as they must run with irqs | 308 | /* IPIs are marked SA_INTERRUPT as they must run with irqs |
309 | * disabled */ | 309 | * disabled */ |
310 | get_irq_desc(irq)->handler = &iic_pic; | 310 | get_irq_desc(irq)->chip = &iic_pic; |
311 | get_irq_desc(irq)->status |= IRQ_PER_CPU; | 311 | get_irq_desc(irq)->status |= IRQ_PER_CPU; |
312 | request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); | 312 | request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); |
313 | } | 313 | } |
@@ -330,7 +330,7 @@ static void iic_setup_spe_handlers(void) | |||
330 | for (be=0; be < num_present_cpus() / 2; be++) { | 330 | for (be=0; be < num_present_cpus() / 2; be++) { |
331 | for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { | 331 | for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { |
332 | int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; | 332 | int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; |
333 | get_irq_desc(irq)->handler = &iic_pic; | 333 | get_irq_desc(irq)->chip = &iic_pic; |
334 | } | 334 | } |
335 | } | 335 | } |
336 | } | 336 | } |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 55cbdd77a62d..7c3a0b6d34fd 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -162,7 +162,7 @@ void spider_init_IRQ_hardcoded(void) | |||
162 | spider_pics[node] = ioremap(spiderpic, 0x800); | 162 | spider_pics[node] = ioremap(spiderpic, 0x800); |
163 | for (n = 0; n < IIC_NUM_EXT; n++) { | 163 | for (n = 0; n < IIC_NUM_EXT; n++) { |
164 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; | 164 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; |
165 | get_irq_desc(irq)->handler = &spider_pic; | 165 | get_irq_desc(irq)->chip = &spider_pic; |
166 | } | 166 | } |
167 | 167 | ||
168 | /* do not mask any interrupts because of level */ | 168 | /* do not mask any interrupts because of level */ |
@@ -217,7 +217,7 @@ void spider_init_IRQ(void) | |||
217 | 217 | ||
218 | for (n = 0; n < IIC_NUM_EXT; n++) { | 218 | for (n = 0; n < IIC_NUM_EXT; n++) { |
219 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; | 219 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; |
220 | get_irq_desc(irq)->handler = &spider_pic; | 220 | get_irq_desc(irq)->chip = &spider_pic; |
221 | } | 221 | } |
222 | 222 | ||
223 | /* do not mask any interrupts because of level */ | 223 | /* do not mask any interrupts because of level */ |
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 62bbbcf5ded3..33bb4aa0e1e8 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -242,9 +242,9 @@ void __init iSeries_activate_IRQs() | |||
242 | for_each_irq (irq) { | 242 | for_each_irq (irq) { |
243 | irq_desc_t *desc = get_irq_desc(irq); | 243 | irq_desc_t *desc = get_irq_desc(irq); |
244 | 244 | ||
245 | if (desc && desc->handler && desc->handler->startup) { | 245 | if (desc && desc->chip && desc->chip->startup) { |
246 | spin_lock_irqsave(&desc->lock, flags); | 246 | spin_lock_irqsave(&desc->lock, flags); |
247 | desc->handler->startup(irq); | 247 | desc->chip->startup(irq); |
248 | spin_unlock_irqrestore(&desc->lock, flags); | 248 | spin_unlock_irqrestore(&desc->lock, flags); |
249 | } | 249 | } |
250 | } | 250 | } |
@@ -324,7 +324,7 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus, | |||
324 | + function; | 324 | + function; |
325 | virtirq = virt_irq_create_mapping(realirq); | 325 | virtirq = virt_irq_create_mapping(realirq); |
326 | 326 | ||
327 | irq_desc[virtirq].handler = &iSeries_IRQ_handler; | 327 | irq_desc[virtirq].chip = &iSeries_IRQ_handler; |
328 | return virtirq; | 328 | return virtirq; |
329 | } | 329 | } |
330 | 330 | ||
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 18bf3011d1e3..9f6189af6dd6 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -446,7 +446,7 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
446 | 446 | ||
447 | /* Set the handler for the main PIC */ | 447 | /* Set the handler for the main PIC */ |
448 | for ( i = 0; i < max_real_irqs ; i++ ) | 448 | for ( i = 0; i < max_real_irqs ; i++ ) |
449 | irq_desc[i].handler = &pmac_pic; | 449 | irq_desc[i].chip = &pmac_pic; |
450 | 450 | ||
451 | /* Get addresses of first controller if we have a node for it */ | 451 | /* Get addresses of first controller if we have a node for it */ |
452 | BUG_ON(of_address_to_resource(master, 0, &r)); | 452 | BUG_ON(of_address_to_resource(master, 0, &r)); |
@@ -493,7 +493,7 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
493 | /* Setup handlers for secondary controller and hook cascade irq*/ | 493 | /* Setup handlers for secondary controller and hook cascade irq*/ |
494 | if (slave) { | 494 | if (slave) { |
495 | for ( i = max_real_irqs ; i < max_irqs ; i++ ) | 495 | for ( i = max_real_irqs ; i < max_irqs ; i++ ) |
496 | irq_desc[i].handler = &gatwick_pic; | 496 | irq_desc[i].chip = &gatwick_pic; |
497 | setup_irq(irq_cascade, &gatwick_cascade_action); | 497 | setup_irq(irq_cascade, &gatwick_cascade_action); |
498 | } | 498 | } |
499 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); | 499 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); |
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index b14f9b5c114e..bdc9e26a93cf 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -558,7 +558,7 @@ nextnode: | |||
558 | } | 558 | } |
559 | 559 | ||
560 | for (i = irq_offset_value(); i < NR_IRQS; ++i) | 560 | for (i = irq_offset_value(); i < NR_IRQS; ++i) |
561 | get_irq_desc(i)->handler = &xics_pic; | 561 | get_irq_desc(i)->chip = &xics_pic; |
562 | 562 | ||
563 | xics_setup_cpu(); | 563 | xics_setup_cpu(); |
564 | 564 | ||
@@ -701,9 +701,9 @@ void xics_migrate_irqs_away(void) | |||
701 | continue; | 701 | continue; |
702 | 702 | ||
703 | /* We only need to migrate enabled IRQS */ | 703 | /* We only need to migrate enabled IRQS */ |
704 | if (desc == NULL || desc->handler == NULL | 704 | if (desc == NULL || desc->chip == NULL |
705 | || desc->action == NULL | 705 | || desc->action == NULL |
706 | || desc->handler->set_affinity == NULL) | 706 | || desc->chip->set_affinity == NULL) |
707 | continue; | 707 | continue; |
708 | 708 | ||
709 | spin_lock_irqsave(&desc->lock, flags); | 709 | spin_lock_irqsave(&desc->lock, flags); |
@@ -728,7 +728,7 @@ void xics_migrate_irqs_away(void) | |||
728 | virq, cpu); | 728 | virq, cpu); |
729 | 729 | ||
730 | /* Reset affinity to all cpus */ | 730 | /* Reset affinity to all cpus */ |
731 | desc->handler->set_affinity(virq, CPU_MASK_ALL); | 731 | desc->chip->set_affinity(virq, CPU_MASK_ALL); |
732 | irq_affinity[virq] = CPU_MASK_ALL; | 732 | irq_affinity[virq] = CPU_MASK_ALL; |
733 | unlock: | 733 | unlock: |
734 | spin_unlock_irqrestore(&desc->lock, flags); | 734 | spin_unlock_irqrestore(&desc->lock, flags); |
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index b7ac32fdd776..2bff30f6d635 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -208,7 +208,7 @@ void __init i8259_init(unsigned long intack_addr, int offset) | |||
208 | spin_unlock_irqrestore(&i8259_lock, flags); | 208 | spin_unlock_irqrestore(&i8259_lock, flags); |
209 | 209 | ||
210 | for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) | 210 | for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) |
211 | irq_desc[offset + i].handler = &i8259_pic; | 211 | irq_desc[offset + i].chip = &i8259_pic; |
212 | 212 | ||
213 | /* reserve our resources */ | 213 | /* reserve our resources */ |
214 | setup_irq(offset + 2, &i8259_irqaction); | 214 | setup_irq(offset + 2, &i8259_irqaction); |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 8f01e0f1d847..46801f5ec03f 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -472,7 +472,7 @@ void __init ipic_init(phys_addr_t phys_addr, | |||
472 | ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); | 472 | ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); |
473 | 473 | ||
474 | for (i = 0 ; i < NR_IPIC_INTS ; i++) { | 474 | for (i = 0 ; i < NR_IPIC_INTS ; i++) { |
475 | irq_desc[i+irq_offset].handler = &ipic; | 475 | irq_desc[i+irq_offset].chip = &ipic; |
476 | irq_desc[i+irq_offset].status = IRQ_LEVEL; | 476 | irq_desc[i+irq_offset].status = IRQ_LEVEL; |
477 | } | 477 | } |
478 | 478 | ||
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index bffe50d02c99..f4613ee6b7a2 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -379,14 +379,14 @@ static inline u32 mpic_physmask(u32 cpumask) | |||
379 | /* Get the mpic structure from the IPI number */ | 379 | /* Get the mpic structure from the IPI number */ |
380 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) | 380 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) |
381 | { | 381 | { |
382 | return container_of(irq_desc[ipi].handler, struct mpic, hc_ipi); | 382 | return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi); |
383 | } | 383 | } |
384 | #endif | 384 | #endif |
385 | 385 | ||
386 | /* Get the mpic structure from the irq number */ | 386 | /* Get the mpic structure from the irq number */ |
387 | static inline struct mpic * mpic_from_irq(unsigned int irq) | 387 | static inline struct mpic * mpic_from_irq(unsigned int irq) |
388 | { | 388 | { |
389 | return container_of(irq_desc[irq].handler, struct mpic, hc_irq); | 389 | return container_of(irq_desc[irq].chip, struct mpic, hc_irq); |
390 | } | 390 | } |
391 | 391 | ||
392 | /* Send an EOI */ | 392 | /* Send an EOI */ |
@@ -752,7 +752,7 @@ void __init mpic_init(struct mpic *mpic) | |||
752 | if (!(mpic->flags & MPIC_PRIMARY)) | 752 | if (!(mpic->flags & MPIC_PRIMARY)) |
753 | continue; | 753 | continue; |
754 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; | 754 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; |
755 | irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi; | 755 | irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi; |
756 | #endif /* CONFIG_SMP */ | 756 | #endif /* CONFIG_SMP */ |
757 | } | 757 | } |
758 | 758 | ||
@@ -813,7 +813,7 @@ void __init mpic_init(struct mpic *mpic) | |||
813 | /* init linux descriptors */ | 813 | /* init linux descriptors */ |
814 | if (i < mpic->irq_count) { | 814 | if (i < mpic->irq_count) { |
815 | irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; | 815 | irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; |
816 | irq_desc[mpic->irq_offset+i].handler = &mpic->hc_irq; | 816 | irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq; |
817 | } | 817 | } |
818 | } | 818 | } |
819 | 819 | ||