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-rw-r--r--arch/powerpc/kernel/pci-common.c13
-rw-r--r--arch/powerpc/kvm/book3s_64_mmu.c22
2 files changed, 34 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index e8dfdbd9327a..cadbed679fbb 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1107,6 +1107,12 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
1107 list_for_each_entry(dev, &bus->devices, bus_list) { 1107 list_for_each_entry(dev, &bus->devices, bus_list) {
1108 struct dev_archdata *sd = &dev->dev.archdata; 1108 struct dev_archdata *sd = &dev->dev.archdata;
1109 1109
1110 /* Cardbus can call us to add new devices to a bus, so ignore
1111 * those who are already fully discovered
1112 */
1113 if (dev->is_added)
1114 continue;
1115
1110 /* Setup OF node pointer in archdata */ 1116 /* Setup OF node pointer in archdata */
1111 sd->of_node = pci_device_to_OF_node(dev); 1117 sd->of_node = pci_device_to_OF_node(dev);
1112 1118
@@ -1147,6 +1153,13 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
1147} 1153}
1148EXPORT_SYMBOL(pcibios_fixup_bus); 1154EXPORT_SYMBOL(pcibios_fixup_bus);
1149 1155
1156void __devinit pci_fixup_cardbus(struct pci_bus *bus)
1157{
1158 /* Now fixup devices on that bus */
1159 pcibios_setup_bus_devices(bus);
1160}
1161
1162
1150static int skip_isa_ioresource_align(struct pci_dev *dev) 1163static int skip_isa_ioresource_align(struct pci_dev *dev)
1151{ 1164{
1152 if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) && 1165 if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 5598f88f142e..e4beeb371a73 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -390,6 +390,26 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
390{ 390{
391 u64 rb = 0, rs = 0; 391 u64 rb = 0, rs = 0;
392 392
393 /*
394 * According to Book3 2.01 mtsrin is implemented as:
395 *
396 * The SLB entry specified by (RB)32:35 is loaded from register
397 * RS, as follows.
398 *
399 * SLBE Bit Source SLB Field
400 *
401 * 0:31 0x0000_0000 ESID-0:31
402 * 32:35 (RB)32:35 ESID-32:35
403 * 36 0b1 V
404 * 37:61 0x00_0000|| 0b0 VSID-0:24
405 * 62:88 (RS)37:63 VSID-25:51
406 * 89:91 (RS)33:35 Ks Kp N
407 * 92 (RS)36 L ((RS)36 must be 0b0)
408 * 93 0b0 C
409 */
410
411 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
412
393 /* ESID = srnum */ 413 /* ESID = srnum */
394 rb |= (srnum & 0xf) << 28; 414 rb |= (srnum & 0xf) << 28;
395 /* Set the valid bit */ 415 /* Set the valid bit */
@@ -400,7 +420,7 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
400 /* VSID = VSID */ 420 /* VSID = VSID */
401 rs |= (value & 0xfffffff) << 12; 421 rs |= (value & 0xfffffff) << 12;
402 /* flags = flags */ 422 /* flags = flags */
403 rs |= ((value >> 27) & 0xf) << 9; 423 rs |= ((value >> 28) & 0x7) << 9;
404 424
405 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); 425 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
406} 426}