diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/head_fsl_booke.S | 20 | ||||
-rw-r--r-- | arch/powerpc/mm/fsl_booke_mmu.c | 6 |
2 files changed, 16 insertions, 10 deletions
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 7aecb39a5a45..d9cc2c288d9e 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -73,8 +73,8 @@ _ENTRY(_start); | |||
73 | /* We try to not make any assumptions about how the boot loader | 73 | /* We try to not make any assumptions about how the boot loader |
74 | * setup or used the TLBs. We invalidate all mappings from the | 74 | * setup or used the TLBs. We invalidate all mappings from the |
75 | * boot loader and load a single entry in TLB1[0] to map the | 75 | * boot loader and load a single entry in TLB1[0] to map the |
76 | * first 16M of kernel memory. Any boot info passed from the | 76 | * first 64M of kernel memory. Any boot info passed from the |
77 | * bootloader needs to live in this first 16M. | 77 | * bootloader needs to live in this first 64M. |
78 | * | 78 | * |
79 | * Requirement on bootloader: | 79 | * Requirement on bootloader: |
80 | * - The page we're executing in needs to reside in TLB1 and | 80 | * - The page we're executing in needs to reside in TLB1 and |
@@ -167,7 +167,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
167 | mtspr SPRN_MAS0,r7 | 167 | mtspr SPRN_MAS0,r7 |
168 | tlbre | 168 | tlbre |
169 | 169 | ||
170 | /* Just modify the entry ID and EPN for the temp mapping */ | 170 | /* Just modify the entry ID, EPN and RPN for the temp mapping */ |
171 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | 171 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ |
172 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | 172 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ |
173 | mtspr SPRN_MAS0,r7 | 173 | mtspr SPRN_MAS0,r7 |
@@ -177,9 +177,12 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
177 | ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l | 177 | ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l |
178 | mtspr SPRN_MAS1,r6 | 178 | mtspr SPRN_MAS1,r6 |
179 | mfspr r6,SPRN_MAS2 | 179 | mfspr r6,SPRN_MAS2 |
180 | li r7,0 /* temp EPN = 0 */ | 180 | lis r7,PHYSICAL_START@h |
181 | rlwimi r7,r6,0,20,31 | 181 | rlwimi r7,r6,0,20,31 |
182 | mtspr SPRN_MAS2,r7 | 182 | mtspr SPRN_MAS2,r7 |
183 | mfspr r6,SPRN_MAS3 | ||
184 | rlwimi r7,r6,0,20,31 | ||
185 | mtspr SPRN_MAS3,r7 | ||
183 | tlbwe | 186 | tlbwe |
184 | 187 | ||
185 | xori r6,r4,1 | 188 | xori r6,r4,1 |
@@ -222,11 +225,11 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
222 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ | 225 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ |
223 | mtspr SPRN_MAS0,r6 | 226 | mtspr SPRN_MAS0,r6 |
224 | lis r6,(MAS1_VALID|MAS1_IPROT)@h | 227 | lis r6,(MAS1_VALID|MAS1_IPROT)@h |
225 | ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l | 228 | ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l |
226 | mtspr SPRN_MAS1,r6 | 229 | mtspr SPRN_MAS1,r6 |
227 | li r7,0 | 230 | li r7,0 |
228 | lis r6,KERNELBASE@h | 231 | lis r6,PAGE_OFFSET@h |
229 | ori r6,r6,KERNELBASE@l | 232 | ori r6,r6,PAGE_OFFSET@l |
230 | rlwimi r6,r7,0,20,31 | 233 | rlwimi r6,r7,0,20,31 |
231 | mtspr SPRN_MAS2,r6 | 234 | mtspr SPRN_MAS2,r6 |
232 | li r7,(MAS3_SX|MAS3_SW|MAS3_SR) | 235 | li r7,(MAS3_SX|MAS3_SW|MAS3_SR) |
@@ -234,6 +237,9 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
234 | tlbwe | 237 | tlbwe |
235 | 238 | ||
236 | /* 7. Jump to KERNELBASE mapping */ | 239 | /* 7. Jump to KERNELBASE mapping */ |
240 | lis r6,KERNELBASE@h | ||
241 | ori r6,r6,KERNELBASE@l | ||
242 | rlwimi r6,r7,0,20,31 | ||
237 | lis r7,MSR_KERNEL@h | 243 | lis r7,MSR_KERNEL@h |
238 | ori r7,r7,MSR_KERNEL@l | 244 | ori r7,r7,MSR_KERNEL@l |
239 | bl 1f /* Find our address */ | 245 | bl 1f /* Find our address */ |
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index 17139daeaff4..c93a966b7e4b 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c | |||
@@ -165,15 +165,15 @@ void invalidate_tlbcam_entry(int index) | |||
165 | void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, | 165 | void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, |
166 | unsigned long cam2) | 166 | unsigned long cam2) |
167 | { | 167 | { |
168 | settlbcam(0, KERNELBASE, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0); | 168 | settlbcam(0, PAGE_OFFSET, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0); |
169 | tlbcam_index++; | 169 | tlbcam_index++; |
170 | if (cam1) { | 170 | if (cam1) { |
171 | tlbcam_index++; | 171 | tlbcam_index++; |
172 | settlbcam(1, KERNELBASE+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0); | 172 | settlbcam(1, PAGE_OFFSET+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0); |
173 | } | 173 | } |
174 | if (cam2) { | 174 | if (cam2) { |
175 | tlbcam_index++; | 175 | tlbcam_index++; |
176 | settlbcam(2, KERNELBASE+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0); | 176 | settlbcam(2, PAGE_OFFSET+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0); |
177 | } | 177 | } |
178 | } | 178 | } |
179 | 179 | ||