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-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts193
1 files changed, 85 insertions, 108 deletions
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 8c75e4e1258f..8a4995a85ba0 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -66,7 +66,7 @@
66 compatible = "fsl-i2c"; 66 compatible = "fsl-i2c";
67 reg = <3000 100>; 67 reg = <3000 100>;
68 interrupts = <2b 2>; 68 interrupts = <2b 2>;
69 interrupt-parent = <40000>; 69 interrupt-parent = <&mpic>;
70 dfsrr; 70 dfsrr;
71 }; 71 };
72 72
@@ -75,7 +75,7 @@
75 compatible = "fsl-i2c"; 75 compatible = "fsl-i2c";
76 reg = <3100 100>; 76 reg = <3100 100>;
77 interrupts = <2b 2>; 77 interrupts = <2b 2>;
78 interrupt-parent = <40000>; 78 interrupt-parent = <&mpic>;
79 dfsrr; 79 dfsrr;
80 }; 80 };
81 81
@@ -85,31 +85,26 @@
85 device_type = "mdio"; 85 device_type = "mdio";
86 compatible = "gianfar"; 86 compatible = "gianfar";
87 reg = <24520 20>; 87 reg = <24520 20>;
88 linux,phandle = <24520>; 88 phy0: ethernet-phy@0 {
89 ethernet-phy@0 { 89 interrupt-parent = <&mpic>;
90 linux,phandle = <2452000>;
91 interrupt-parent = <40000>;
92 interrupts = <4a 1>; 90 interrupts = <4a 1>;
93 reg = <0>; 91 reg = <0>;
94 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
95 }; 93 };
96 ethernet-phy@1 { 94 phy1: ethernet-phy@1 {
97 linux,phandle = <2452001>; 95 interrupt-parent = <&mpic>;
98 interrupt-parent = <40000>;
99 interrupts = <4a 1>; 96 interrupts = <4a 1>;
100 reg = <1>; 97 reg = <1>;
101 device_type = "ethernet-phy"; 98 device_type = "ethernet-phy";
102 }; 99 };
103 ethernet-phy@2 { 100 phy2: ethernet-phy@2 {
104 linux,phandle = <2452002>; 101 interrupt-parent = <&mpic>;
105 interrupt-parent = <40000>;
106 interrupts = <4a 1>; 102 interrupts = <4a 1>;
107 reg = <2>; 103 reg = <2>;
108 device_type = "ethernet-phy"; 104 device_type = "ethernet-phy";
109 }; 105 };
110 ethernet-phy@3 { 106 phy3: ethernet-phy@3 {
111 linux,phandle = <2452003>; 107 interrupt-parent = <&mpic>;
112 interrupt-parent = <40000>;
113 interrupts = <4a 1>; 108 interrupts = <4a 1>;
114 reg = <3>; 109 reg = <3>;
115 device_type = "ethernet-phy"; 110 device_type = "ethernet-phy";
@@ -125,8 +120,8 @@
125 reg = <24000 1000>; 120 reg = <24000 1000>;
126 mac-address = [ 00 E0 0C 00 73 00 ]; 121 mac-address = [ 00 E0 0C 00 73 00 ];
127 interrupts = <1d 2 1e 2 22 2>; 122 interrupts = <1d 2 1e 2 22 2>;
128 interrupt-parent = <40000>; 123 interrupt-parent = <&mpic>;
129 phy-handle = <2452000>; 124 phy-handle = <&phy0>;
130 }; 125 };
131 126
132 ethernet@25000 { 127 ethernet@25000 {
@@ -138,8 +133,8 @@
138 reg = <25000 1000>; 133 reg = <25000 1000>;
139 mac-address = [ 00 E0 0C 00 73 01 ]; 134 mac-address = [ 00 E0 0C 00 73 01 ];
140 interrupts = <23 2 24 2 28 2>; 135 interrupts = <23 2 24 2 28 2>;
141 interrupt-parent = <40000>; 136 interrupt-parent = <&mpic>;
142 phy-handle = <2452001>; 137 phy-handle = <&phy1>;
143 }; 138 };
144 139
145 ethernet@26000 { 140 ethernet@26000 {
@@ -151,8 +146,8 @@
151 reg = <26000 1000>; 146 reg = <26000 1000>;
152 mac-address = [ 00 E0 0C 00 02 FD ]; 147 mac-address = [ 00 E0 0C 00 02 FD ];
153 interrupts = <1F 2 20 2 21 2>; 148 interrupts = <1F 2 20 2 21 2>;
154 interrupt-parent = <40000>; 149 interrupt-parent = <&mpic>;
155 phy-handle = <2452002>; 150 phy-handle = <&phy2>;
156 }; 151 };
157 152
158 ethernet@27000 { 153 ethernet@27000 {
@@ -164,8 +159,8 @@
164 reg = <27000 1000>; 159 reg = <27000 1000>;
165 mac-address = [ 00 E0 0C 00 03 FD ]; 160 mac-address = [ 00 E0 0C 00 03 FD ];
166 interrupts = <25 2 26 2 27 2>; 161 interrupts = <25 2 26 2 27 2>;
167 interrupt-parent = <40000>; 162 interrupt-parent = <&mpic>;
168 phy-handle = <2452003>; 163 phy-handle = <&phy3>;
169 }; 164 };
170 serial@4500 { 165 serial@4500 {
171 device_type = "serial"; 166 device_type = "serial";
@@ -173,7 +168,7 @@
173 reg = <4500 100>; 168 reg = <4500 100>;
174 clock-frequency = <0>; 169 clock-frequency = <0>;
175 interrupts = <2a 2>; 170 interrupts = <2a 2>;
176 interrupt-parent = <40000>; 171 interrupt-parent = <&mpic>;
177 }; 172 };
178 173
179 serial@4600 { 174 serial@4600 {
@@ -182,7 +177,7 @@
182 reg = <4600 100>; 177 reg = <4600 100>;
183 clock-frequency = <0>; 178 clock-frequency = <0>;
184 interrupts = <1c 2>; 179 interrupts = <1c 2>;
185 interrupt-parent = <40000>; 180 interrupt-parent = <&mpic>;
186 }; 181 };
187 182
188 pci@8000 { 183 pci@8000 {
@@ -196,103 +191,102 @@
196 ranges = <02000000 0 80000000 80000000 0 20000000 191 ranges = <02000000 0 80000000 80000000 0 20000000
197 01000000 0 00000000 e2000000 0 00100000>; 192 01000000 0 00000000 e2000000 0 00100000>;
198 clock-frequency = <1fca055>; 193 clock-frequency = <1fca055>;
199 interrupt-parent = <40000>; 194 interrupt-parent = <&mpic>;
200 interrupts = <18 2>; 195 interrupts = <18 2>;
201 interrupt-map-mask = <f800 0 0 7>; 196 interrupt-map-mask = <f800 0 0 7>;
202 interrupt-map = < 197 interrupt-map = <
203 /* IDSEL 0x11 */ 198 /* IDSEL 0x11 */
204 8800 0 0 1 4d0 3 2 199 8800 0 0 1 &i8259 3 2
205 8800 0 0 2 4d0 4 2 200 8800 0 0 2 &i8259 4 2
206 8800 0 0 3 4d0 5 2 201 8800 0 0 3 &i8259 5 2
207 8800 0 0 4 4d0 6 2 202 8800 0 0 4 &i8259 6 2
208 203
209 /* IDSEL 0x12 */ 204 /* IDSEL 0x12 */
210 9000 0 0 1 4d0 4 2 205 9000 0 0 1 &i8259 4 2
211 9000 0 0 2 4d0 5 2 206 9000 0 0 2 &i8259 5 2
212 9000 0 0 3 4d0 6 2 207 9000 0 0 3 &i8259 6 2
213 9000 0 0 4 4d0 3 2 208 9000 0 0 4 &i8259 3 2
214 209
215 /* IDSEL 0x13 */ 210 /* IDSEL 0x13 */
216 9800 0 0 1 4d0 0 0 211 9800 0 0 1 &i8259 0 0
217 9800 0 0 2 4d0 0 0 212 9800 0 0 2 &i8259 0 0
218 9800 0 0 3 4d0 0 0 213 9800 0 0 3 &i8259 0 0
219 9800 0 0 4 4d0 0 0 214 9800 0 0 4 &i8259 0 0
220 215
221 /* IDSEL 0x14 */ 216 /* IDSEL 0x14 */
222 a000 0 0 1 4d0 0 0 217 a000 0 0 1 &i8259 0 0
223 a000 0 0 2 4d0 0 0 218 a000 0 0 2 &i8259 0 0
224 a000 0 0 3 4d0 0 0 219 a000 0 0 3 &i8259 0 0
225 a000 0 0 4 4d0 0 0 220 a000 0 0 4 &i8259 0 0
226 221
227 /* IDSEL 0x15 */ 222 /* IDSEL 0x15 */
228 a800 0 0 1 4d0 0 0 223 a800 0 0 1 &i8259 0 0
229 a800 0 0 2 4d0 0 0 224 a800 0 0 2 &i8259 0 0
230 a800 0 0 3 4d0 0 0 225 a800 0 0 3 &i8259 0 0
231 a800 0 0 4 4d0 0 0 226 a800 0 0 4 &i8259 0 0
232 227
233 /* IDSEL 0x16 */ 228 /* IDSEL 0x16 */
234 b000 0 0 1 4d0 0 0 229 b000 0 0 1 &i8259 0 0
235 b000 0 0 2 4d0 0 0 230 b000 0 0 2 &i8259 0 0
236 b000 0 0 3 4d0 0 0 231 b000 0 0 3 &i8259 0 0
237 b000 0 0 4 4d0 0 0 232 b000 0 0 4 &i8259 0 0
238 233
239 /* IDSEL 0x17 */ 234 /* IDSEL 0x17 */
240 b800 0 0 1 4d0 0 0 235 b800 0 0 1 &i8259 0 0
241 b800 0 0 2 4d0 0 0 236 b800 0 0 2 &i8259 0 0
242 b800 0 0 3 4d0 0 0 237 b800 0 0 3 &i8259 0 0
243 b800 0 0 4 4d0 0 0 238 b800 0 0 4 &i8259 0 0
244 239
245 /* IDSEL 0x18 */ 240 /* IDSEL 0x18 */
246 c000 0 0 1 4d0 0 0 241 c000 0 0 1 &i8259 0 0
247 c000 0 0 2 4d0 0 0 242 c000 0 0 2 &i8259 0 0
248 c000 0 0 3 4d0 0 0 243 c000 0 0 3 &i8259 0 0
249 c000 0 0 4 4d0 0 0 244 c000 0 0 4 &i8259 0 0
250 245
251 /* IDSEL 0x19 */ 246 /* IDSEL 0x19 */
252 c800 0 0 1 4d0 0 0 247 c800 0 0 1 &i8259 0 0
253 c800 0 0 2 4d0 0 0 248 c800 0 0 2 &i8259 0 0
254 c800 0 0 3 4d0 0 0 249 c800 0 0 3 &i8259 0 0
255 c800 0 0 4 4d0 0 0 250 c800 0 0 4 &i8259 0 0
256 251
257 /* IDSEL 0x1a */ 252 /* IDSEL 0x1a */
258 d000 0 0 1 4d0 6 2 253 d000 0 0 1 &i8259 6 2
259 d000 0 0 2 4d0 3 2 254 d000 0 0 2 &i8259 3 2
260 d000 0 0 3 4d0 4 2 255 d000 0 0 3 &i8259 4 2
261 d000 0 0 4 4d0 5 2 256 d000 0 0 4 &i8259 5 2
262 257
263 258
264 /* IDSEL 0x1b */ 259 /* IDSEL 0x1b */
265 d800 0 0 1 4d0 5 2 260 d800 0 0 1 &i8259 5 2
266 d800 0 0 2 4d0 0 0 261 d800 0 0 2 &i8259 0 0
267 d800 0 0 3 4d0 0 0 262 d800 0 0 3 &i8259 0 0
268 d800 0 0 4 4d0 0 0 263 d800 0 0 4 &i8259 0 0
269 264
270 /* IDSEL 0x1c */ 265 /* IDSEL 0x1c */
271 e000 0 0 1 4d0 9 2 266 e000 0 0 1 &i8259 9 2
272 e000 0 0 2 4d0 a 2 267 e000 0 0 2 &i8259 a 2
273 e000 0 0 3 4d0 c 2 268 e000 0 0 3 &i8259 c 2
274 e000 0 0 4 4d0 7 2 269 e000 0 0 4 &i8259 7 2
275 270
276 /* IDSEL 0x1d */ 271 /* IDSEL 0x1d */
277 e800 0 0 1 4d0 9 2 272 e800 0 0 1 &i8259 9 2
278 e800 0 0 2 4d0 a 2 273 e800 0 0 2 &i8259 a 2
279 e800 0 0 3 4d0 b 2 274 e800 0 0 3 &i8259 b 2
280 e800 0 0 4 4d0 0 0 275 e800 0 0 4 &i8259 0 0
281 276
282 /* IDSEL 0x1e */ 277 /* IDSEL 0x1e */
283 f000 0 0 1 4d0 c 2 278 f000 0 0 1 &i8259 c 2
284 f000 0 0 2 4d0 0 0 279 f000 0 0 2 &i8259 0 0
285 f000 0 0 3 4d0 0 0 280 f000 0 0 3 &i8259 0 0
286 f000 0 0 4 4d0 0 0 281 f000 0 0 4 &i8259 0 0
287 282
288 /* IDSEL 0x1f */ 283 /* IDSEL 0x1f */
289 f800 0 0 1 4d0 6 2 284 f800 0 0 1 &i8259 6 2
290 f800 0 0 2 4d0 0 0 285 f800 0 0 2 &i8259 0 0
291 f800 0 0 3 4d0 0 0 286 f800 0 0 3 &i8259 0 0
292 f800 0 0 4 4d0 0 0 287 f800 0 0 4 &i8259 0 0
293 >; 288 >;
294 i8259@4d0 { 289 i8259: i8259@4d0 {
295 linux,phandle = <4d0>;
296 clock-frequency = <0>; 290 clock-frequency = <0>;
297 interrupt-controller; 291 interrupt-controller;
298 device_type = "interrupt-controller"; 292 device_type = "interrupt-controller";
@@ -302,12 +296,11 @@
302 compatible = "chrp,iic"; 296 compatible = "chrp,iic";
303 big-endian; 297 big-endian;
304 interrupts = <49 2>; 298 interrupts = <49 2>;
305 interrupt-parent = <40000>; 299 interrupt-parent = <&mpic>;
306 }; 300 };
307 301
308 }; 302 };
309 pic@40000 { 303 mpic: pic@40000 {
310 linux,phandle = <40000>;
311 clock-frequency = <0>; 304 clock-frequency = <0>;
312 interrupt-controller; 305 interrupt-controller;
313 #address-cells = <0>; 306 #address-cells = <0>;
@@ -316,23 +309,7 @@
316 built-in; 309 built-in;
317 compatible = "chrp,open-pic"; 310 compatible = "chrp,open-pic";
318 device_type = "open-pic"; 311 device_type = "open-pic";
319 big-endian; 312 big-endian;
320 interrupts = <
321 10 2 11 2 12 2 13 2
322 14 2 15 2 16 2 17 2
323 18 2 19 2 1a 2 1b 2
324 1c 2 1d 2 1e 2 1f 2
325 20 2 21 2 22 2 23 2
326 24 2 25 2 26 2 27 2
327 28 2 29 2 2a 2 2b 2
328 2c 2 2d 2 2e 2 2f 2
329 30 2 31 2 32 2 33 2
330 34 2 35 2 36 2 37 2
331 38 2 39 2 2a 2 3b 2
332 3c 2 3d 2 3e 2 3f 2
333 48 1 49 2 4a 1
334 >;
335 interrupt-parent = <40000>;
336 }; 313 };
337 }; 314 };
338}; 315};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 12:44:01 -0500