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-rw-r--r--arch/powerpc/boot/Makefile2
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts2
-rw-r--r--arch/powerpc/include/asm/Kbuild1
-rw-r--r--arch/powerpc/include/asm/atomic.h4
-rw-r--r--arch/powerpc/include/asm/byteorder.h83
-rw-r--r--arch/powerpc/include/asm/hugetlb.h6
-rw-r--r--arch/powerpc/include/asm/swab.h90
-rw-r--r--arch/powerpc/kernel/kprobes.c9
-rw-r--r--arch/powerpc/kernel/prom_parse.c7
-rw-r--r--arch/powerpc/mm/hugetlbpage.c7
-rw-r--r--arch/powerpc/mm/mem.c2
-rw-r--r--arch/powerpc/oprofile/cell/spu_profiler.c2
12 files changed, 117 insertions, 98 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index f32829937aad..ab6dda372438 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -208,7 +208,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
208# 208#
209# Theses are default targets to build images which embed device tree blobs. 209# Theses are default targets to build images which embed device tree blobs.
210# They are only required on boards which do not have FDT support in firmware. 210# They are only required on boards which do not have FDT support in firmware.
211# Boards with newish u-boot firmare can use the uImage target above 211# Boards with newish u-boot firmware can use the uImage target above
212# 212#
213 213
214# Board ports in arch/powerpc/platform/40x/Kconfig 214# Board ports in arch/powerpc/platform/40x/Kconfig
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 3b295e8df53f..43cc68bd3192 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -134,7 +134,7 @@
134 }; 134 };
135 135
136 USB1: usb@e0000400 { 136 USB1: usb@e0000400 {
137 compatible = "ohci-be"; 137 compatible = "ibm,usb-ohci-440epx", "ohci-be";
138 reg = <0x00000000 0xe0000400 0x00000060>; 138 reg = <0x00000000 0xe0000400 0x00000060>;
139 interrupt-parent = <&UIC0>; 139 interrupt-parent = <&UIC0>;
140 interrupts = <0x15 0x8>; 140 interrupts = <0x15 0x8>;
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index 5ab7d7fe198c..9268602de5d0 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -35,3 +35,4 @@ unifdef-y += spu_info.h
35unifdef-y += termios.h 35unifdef-y += termios.h
36unifdef-y += types.h 36unifdef-y += types.h
37unifdef-y += unistd.h 37unifdef-y += unistd.h
38unifdef-y += swab.h
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 499be5bdd6fa..b401950f5259 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -5,7 +5,7 @@
5 * PowerPC atomic operations 5 * PowerPC atomic operations
6 */ 6 */
7 7
8typedef struct { int counter; } atomic_t; 8#include <linux/types.h>
9 9
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11#include <linux/compiler.h> 11#include <linux/compiler.h>
@@ -251,8 +251,6 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
251 251
252#ifdef __powerpc64__ 252#ifdef __powerpc64__
253 253
254typedef struct { long counter; } atomic64_t;
255
256#define ATOMIC64_INIT(i) { (i) } 254#define ATOMIC64_INIT(i) { (i) }
257 255
258static __inline__ long atomic64_read(const atomic64_t *v) 256static __inline__ long atomic64_read(const atomic64_t *v)
diff --git a/arch/powerpc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h
index d5de325472e9..5cca27a41532 100644
--- a/arch/powerpc/include/asm/byteorder.h
+++ b/arch/powerpc/include/asm/byteorder.h
@@ -8,86 +8,7 @@
8 * 2 of the License, or (at your option) any later version. 8 * 2 of the License, or (at your option) any later version.
9 */ 9 */
10 10
11#include <asm/types.h> 11#include <asm/swab.h>
12#include <linux/compiler.h> 12#include <linux/byteorder/big_endian.h>
13
14#define __BIG_ENDIAN
15
16#ifdef __GNUC__
17#ifdef __KERNEL__
18
19static __inline__ __u16 ld_le16(const volatile __u16 *addr)
20{
21 __u16 val;
22
23 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
24 return val;
25}
26#define __arch_swab16p ld_le16
27
28static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
29{
30 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
31}
32
33static inline void __arch_swab16s(__u16 *addr)
34{
35 st_le16(addr, *addr);
36}
37#define __arch_swab16s __arch_swab16s
38
39static __inline__ __u32 ld_le32(const volatile __u32 *addr)
40{
41 __u32 val;
42
43 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
44 return val;
45}
46#define __arch_swab32p ld_le32
47
48static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
49{
50 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
51}
52
53static inline void __arch_swab32s(__u32 *addr)
54{
55 st_le32(addr, *addr);
56}
57#define __arch_swab32s __arch_swab32s
58
59static inline __attribute_const__ __u16 __arch_swab16(__u16 value)
60{
61 __u16 result;
62
63 __asm__("rlwimi %0,%1,8,16,23"
64 : "=r" (result)
65 : "r" (value), "0" (value >> 8));
66 return result;
67}
68#define __arch_swab16 __arch_swab16
69
70static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
71{
72 __u32 result;
73
74 __asm__("rlwimi %0,%1,24,16,23\n\t"
75 "rlwimi %0,%1,8,8,15\n\t"
76 "rlwimi %0,%1,24,0,7"
77 : "=r" (result)
78 : "r" (value), "0" (value >> 24));
79 return result;
80}
81#define __arch_swab32 __arch_swab32
82
83#endif /* __KERNEL__ */
84
85#ifndef __powerpc64__
86#define __SWAB_64_THRU_32__
87#endif /* __powerpc64__ */
88
89#endif /* __GNUC__ */
90
91#include <linux/byteorder.h>
92 13
93#endif /* _ASM_POWERPC_BYTEORDER_H */ 14#endif /* _ASM_POWERPC_BYTEORDER_H */
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 26f0d0ab27a5..b1dafb6a9743 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -18,6 +18,12 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
18 pte_t *ptep); 18 pte_t *ptep);
19 19
20/* 20/*
21 * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs
22 * to override the version in mm/hugetlb.c
23 */
24#define vma_mmu_pagesize vma_mmu_pagesize
25
26/*
21 * If the arch doesn't supply something else, assume that hugepage 27 * If the arch doesn't supply something else, assume that hugepage
22 * size aligned regions are ok without further preparation. 28 * size aligned regions are ok without further preparation.
23 */ 29 */
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
new file mode 100644
index 000000000000..ef824ae4b79c
--- /dev/null
+++ b/arch/powerpc/include/asm/swab.h
@@ -0,0 +1,90 @@
1#ifndef _ASM_POWERPC_SWAB_H
2#define _ASM_POWERPC_SWAB_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <asm/types.h>
12#include <linux/compiler.h>
13
14#ifdef __GNUC__
15
16#ifndef __powerpc64__
17#define __SWAB_64_THRU_32__
18#endif /* __powerpc64__ */
19
20#ifdef __KERNEL__
21
22static __inline__ __u16 ld_le16(const volatile __u16 *addr)
23{
24 __u16 val;
25
26 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
27 return val;
28}
29#define __arch_swab16p ld_le16
30
31static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
32{
33 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
34}
35
36static inline void __arch_swab16s(__u16 *addr)
37{
38 st_le16(addr, *addr);
39}
40#define __arch_swab16s __arch_swab16s
41
42static __inline__ __u32 ld_le32(const volatile __u32 *addr)
43{
44 __u32 val;
45
46 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
47 return val;
48}
49#define __arch_swab32p ld_le32
50
51static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
52{
53 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
54}
55
56static inline void __arch_swab32s(__u32 *addr)
57{
58 st_le32(addr, *addr);
59}
60#define __arch_swab32s __arch_swab32s
61
62static inline __attribute_const__ __u16 __arch_swab16(__u16 value)
63{
64 __u16 result;
65
66 __asm__("rlwimi %0,%1,8,16,23"
67 : "=r" (result)
68 : "r" (value), "0" (value >> 8));
69 return result;
70}
71#define __arch_swab16 __arch_swab16
72
73static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
74{
75 __u32 result;
76
77 __asm__("rlwimi %0,%1,24,16,23\n\t"
78 "rlwimi %0,%1,8,8,15\n\t"
79 "rlwimi %0,%1,24,0,7"
80 : "=r" (result)
81 : "r" (value), "0" (value >> 24));
82 return result;
83}
84#define __arch_swab32 __arch_swab32
85
86#endif /* __KERNEL__ */
87
88#endif /* __GNUC__ */
89
90#endif /* _ASM_POWERPC_SWAB_H */
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index de79915452c8..c9329786073b 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -96,9 +96,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
96 96
97void __kprobes arch_remove_kprobe(struct kprobe *p) 97void __kprobes arch_remove_kprobe(struct kprobe *p)
98{ 98{
99 mutex_lock(&kprobe_mutex); 99 if (p->ainsn.insn) {
100 free_insn_slot(p->ainsn.insn, 0); 100 free_insn_slot(p->ainsn.insn, 0);
101 mutex_unlock(&kprobe_mutex); 101 p->ainsn.insn = NULL;
102 }
102} 103}
103 104
104static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) 105static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
@@ -316,7 +317,7 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p,
316 /* 317 /*
317 * It is possible to have multiple instances associated with a given 318 * It is possible to have multiple instances associated with a given
318 * task either because an multiple functions in the call path 319 * task either because an multiple functions in the call path
319 * have a return probe installed on them, and/or more then one return 320 * have a return probe installed on them, and/or more than one return
320 * return probe was registered for a target function. 321 * return probe was registered for a target function.
321 * 322 *
322 * We can handle this because: 323 * We can handle this because:
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index 8c1335566089..8f0856f312da 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -232,11 +232,6 @@ int of_pci_address_to_resource(struct device_node *dev, int bar,
232} 232}
233EXPORT_SYMBOL_GPL(of_pci_address_to_resource); 233EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
234 234
235static u8 of_irq_pci_swizzle(u8 slot, u8 pin)
236{
237 return (((pin - 1) + slot) % 4) + 1;
238}
239
240int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) 235int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
241{ 236{
242 struct device_node *dn, *ppnode; 237 struct device_node *dn, *ppnode;
@@ -306,7 +301,7 @@ int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
306 /* We can only get here if we hit a P2P bridge with no node, 301 /* We can only get here if we hit a P2P bridge with no node,
307 * let's do standard swizzling and try again 302 * let's do standard swizzling and try again
308 */ 303 */
309 lspec = of_irq_pci_swizzle(PCI_SLOT(pdev->devfn), lspec); 304 lspec = pci_swizzle_interrupt_pin(pdev, lspec);
310 pdev = ppdev; 305 pdev = ppdev;
311 } 306 }
312 307
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 201c7a5486cb..9920d6a7cf29 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -512,6 +512,13 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
512 return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0); 512 return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
513} 513}
514 514
515unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
516{
517 unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
518
519 return 1UL << mmu_psize_to_shift(psize);
520}
521
515/* 522/*
516 * Called by asm hashtable.S for doing lazy icache flush 523 * Called by asm hashtable.S for doing lazy icache flush
517 */ 524 */
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 53b06ebb3f2f..f00f09a77f12 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -132,7 +132,7 @@ int arch_add_memory(int nid, u64 start, u64 size)
132 /* this should work for most non-highmem platforms */ 132 /* this should work for most non-highmem platforms */
133 zone = pgdata->node_zones; 133 zone = pgdata->node_zones;
134 134
135 return __add_pages(zone, start_pfn, nr_pages); 135 return __add_pages(nid, zone, start_pfn, nr_pages);
136} 136}
137#endif /* CONFIG_MEMORY_HOTPLUG */ 137#endif /* CONFIG_MEMORY_HOTPLUG */
138 138
diff --git a/arch/powerpc/oprofile/cell/spu_profiler.c b/arch/powerpc/oprofile/cell/spu_profiler.c
index dd499c3e9da7..83faa958b9d4 100644
--- a/arch/powerpc/oprofile/cell/spu_profiler.c
+++ b/arch/powerpc/oprofile/cell/spu_profiler.c
@@ -49,7 +49,7 @@ void set_spu_profiling_frequency(unsigned int freq_khz, unsigned int cycles_rese
49 * of precision. This is close enough for the purpose at hand. 49 * of precision. This is close enough for the purpose at hand.
50 * 50 *
51 * The value of the timeout should be small enough that the hw 51 * The value of the timeout should be small enough that the hw
52 * trace buffer will not get more then about 1/3 full for the 52 * trace buffer will not get more than about 1/3 full for the
53 * maximum user specified (the LFSR value) hw sampling frequency. 53 * maximum user specified (the LFSR value) hw sampling frequency.
54 * This is to ensure the trace buffer will never fill even if the 54 * This is to ensure the trace buffer will never fill even if the
55 * kernel thread scheduling varies under a heavy system load. 55 * kernel thread scheduling varies under a heavy system load.