12 files changed, 703 insertions, 44 deletions

diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S
new file mode 100644
index 000000000000..21cda085d926
--- /dev/null
+++ b/arch/powerpc/sysdev/6xx-suspend.S
@@ -0,0 +1,52 @@
+/*
+ * Enter and leave sleep state on chips with 6xx-style HID0
+ * power management bits, which don't leave sleep state via reset.
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/ppc_asm.h>
+#include <asm/reg.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+
+_GLOBAL(mpc6xx_enter_standby)
+        mflr    r4
+
+        mfspr   r5, SPRN_HID0
+        rlwinm  r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
+        oris    r5, r5, HID0_SLEEP@h
+        mtspr   SPRN_HID0, r5
+        isync
+
+        lis     r5, ret_from_standby@h
+        ori     r5, r5, ret_from_standby@l
+        mtlr    r5
+
+        rlwinm  r5, r1, 0, 0, 31-THREAD_SHIFT
+        lwz     r6, TI_LOCAL_FLAGS(r5)
+        ori     r6, r6, _TLF_SLEEPING
+        stw     r6, TI_LOCAL_FLAGS(r5)
+
+        mfmsr   r5
+        ori     r5, r5, MSR_EE
+        oris    r5, r5, MSR_POW@h
+        sync
+        mtmsr   r5
+        isync
+
+1:      b       1b
+
+ret_from_standby:
+        mfspr   r5, SPRN_HID0
+        rlwinm  r5, r5, 0, ~HID0_SLEEP
+        mtspr   SPRN_HID0, r5
+
+        mtlr    r4
+        blr
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 6d386d0071a0..dd6dff3ffb0f 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -4,6 +4,7 @@ endif
 
 mpic-msi-obj-$(CONFIG_PCI_MSI)  += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
 obj-$(CONFIG_MPIC)              += mpic.o $(mpic-msi-obj-y)
+fsl-msi-obj-$(CONFIG_PCI_MSI)   += fsl_msi.o
 
 obj-$(CONFIG_PPC_MPC106)        += grackle.o
 obj-$(CONFIG_PPC_DCR_NATIVE)    += dcr-low.o
@@ -11,7 +12,7 @@ obj-$(CONFIG_PPC_PMI)		+= pmi.o
 obj-$(CONFIG_U3_DART)           += dart_iommu.o
 obj-$(CONFIG_MMIO_NVRAM)        += mmio_nvram.o
 obj-$(CONFIG_FSL_SOC)           += fsl_soc.o
-obj-$(CONFIG_FSL_PCI)           += fsl_pci.o
+obj-$(CONFIG_FSL_PCI)           += fsl_pci.o $(fsl-msi-obj-y)
 obj-$(CONFIG_FSL_LBC)           += fsl_lbc.o
 obj-$(CONFIG_RAPIDIO)           += fsl_rio.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
@@ -44,3 +45,7 @@ obj-$(CONFIG_PPC_DCR)		+= dcr.o
 obj-$(CONFIG_8xx)               += mpc8xx_pic.o cpm1.o
 obj-$(CONFIG_UCODE_PATCH)       += micropatch.o
 endif
+
+ifeq ($(CONFIG_SUSPEND),y)
+obj-$(CONFIG_6xx)               += 6xx-suspend.o
+endif
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index 437e48d3ae33..a8ba9983dd5a 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -23,6 +23,107 @@
 #include <asm/prom.h>
 #include <asm/dcr.h>
 
+#ifdef CONFIG_PPC_DCR_MMIO
+static struct device_node *find_dcr_parent(struct device_node *node)
+{
+        struct device_node *par, *tmp;
+        const u32 *p;
+
+        for (par = of_node_get(node); par;) {
+                if (of_get_property(par, "dcr-controller", NULL))
+                        break;
+                p = of_get_property(par, "dcr-parent", NULL);
+                tmp = par;
+                if (p == NULL)
+                        par = of_get_parent(par);
+                else
+                        par = of_find_node_by_phandle(*p);
+                of_node_put(tmp);
+        }
+        return par;
+}
+#endif
+
+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
+
+bool dcr_map_ok_generic(dcr_host_t host)
+{
+        if (host.type == DCR_HOST_NATIVE)
+                return dcr_map_ok_native(host.host.native);
+        else if (host.type == DCR_HOST_MMIO)
+                return dcr_map_ok_mmio(host.host.mmio);
+        else
+                return 0;
+}
+EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
+
+dcr_host_t dcr_map_generic(struct device_node *dev,
+                           unsigned int dcr_n,
+                           unsigned int dcr_c)
+{
+        dcr_host_t host;
+        struct device_node *dp;
+        const char *prop;
+
+        host.type = DCR_HOST_INVALID;
+
+        dp = find_dcr_parent(dev);
+        if (dp == NULL)
+                return host;
+
+        prop = of_get_property(dp, "dcr-access-method", NULL);
+
+        pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);
+
+        if (!strcmp(prop, "native")) {
+                host.type = DCR_HOST_NATIVE;
+                host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
+        } else if (!strcmp(prop, "mmio")) {
+                host.type = DCR_HOST_MMIO;
+                host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
+        }
+
+        of_node_put(dp);
+        return host;
+}
+EXPORT_SYMBOL_GPL(dcr_map_generic);
+
+void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
+{
+        if (host.type == DCR_HOST_NATIVE)
+                dcr_unmap_native(host.host.native, dcr_c);
+        else if (host.type == DCR_HOST_MMIO)
+                dcr_unmap_mmio(host.host.mmio, dcr_c);
+        else /* host.type == DCR_HOST_INVALID */
+                WARN_ON(true);
+}
+EXPORT_SYMBOL_GPL(dcr_unmap_generic);
+
+u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)
+{
+        if (host.type == DCR_HOST_NATIVE)
+                return dcr_read_native(host.host.native, dcr_n);
+        else if (host.type == DCR_HOST_MMIO)
+                return dcr_read_mmio(host.host.mmio, dcr_n);
+        else /* host.type == DCR_HOST_INVALID */
+                WARN_ON(true);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(dcr_read_generic);
+
+void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)
+{
+        if (host.type == DCR_HOST_NATIVE)
+                dcr_write_native(host.host.native, dcr_n, value);
+        else if (host.type == DCR_HOST_MMIO)
+                dcr_write_mmio(host.host.mmio, dcr_n, value);
+        else /* host.type == DCR_HOST_INVALID */
+                WARN_ON(true);
+}
+EXPORT_SYMBOL_GPL(dcr_write_generic);
+
+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
+
 unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
 {
         unsigned int ds;
@@ -47,26 +148,7 @@ unsigned int dcr_resource_len(struct device_node *np, unsigned int index)
 }
 EXPORT_SYMBOL_GPL(dcr_resource_len);
 
-#ifndef CONFIG_PPC_DCR_NATIVE
-
-static struct device_node * find_dcr_parent(struct device_node * node)
-{
-        struct device_node *par, *tmp;
-        const u32 *p;
-
-        for (par = of_node_get(node); par;) {
-                if (of_get_property(par, "dcr-controller", NULL))
-                        break;
-                p = of_get_property(par, "dcr-parent", NULL);
-                tmp = par;
-                if (p == NULL)
-                        par = of_get_parent(par);
-                else
-                        par = of_find_node_by_phandle(*p);
-                of_node_put(tmp);
-        }
-        return par;
-}
+#ifdef CONFIG_PPC_DCR_MMIO
 
 u64 of_translate_dcr_address(struct device_node *dev,
                              unsigned int dcr_n,
@@ -75,7 +157,7 @@ u64 of_translate_dcr_address(struct device_node *dev,
         struct device_node *dp;
         const u32 *p;
         unsigned int stride;
-        u64 ret;
+        u64 ret = OF_BAD_ADDR;
 
         dp = find_dcr_parent(dev);
         if (dp == NULL)
@@ -90,7 +172,7 @@ u64 of_translate_dcr_address(struct device_node *dev,
         if (p == NULL)
                 p = of_get_property(dp, "dcr-mmio-space", NULL);
         if (p == NULL)
-                return OF_BAD_ADDR;
+                goto done;
 
         /* Maybe could do some better range checking here */
         ret = of_translate_address(dp, p);
@@ -98,21 +180,25 @@ u64 of_translate_dcr_address(struct device_node *dev,
                 ret += (u64)(stride) * (u64)dcr_n;
         if (out_stride)
                 *out_stride = stride;
+
+ done:
+        of_node_put(dp);
         return ret;
 }
 
-dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
-                   unsigned int dcr_c)
+dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
+                             unsigned int dcr_n,
+                             unsigned int dcr_c)
 {
-        dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
+        dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
         u64 addr;
 
         pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
                  dev->full_name, dcr_n, dcr_c);
 
         addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
-        pr_debug("translates to addr: 0x%lx, stride: 0x%x\n",
-                 addr, ret.stride);
+        pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",
+                 (unsigned long long) addr, ret.stride);
         if (addr == OF_BAD_ADDR)
                 return ret;
         pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
@@ -124,11 +210,11 @@ dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
         ret.token -= dcr_n * ret.stride;
         return ret;
 }
-EXPORT_SYMBOL_GPL(dcr_map);
+EXPORT_SYMBOL_GPL(dcr_map_mmio);
 
-void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
+void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)
 {
-        dcr_host_t h = host;
+        dcr_host_mmio_t h = host;
 
         if (h.token == NULL)
                 return;
@@ -136,7 +222,11 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
         iounmap(h.token);
         h.token = NULL;
 }
-EXPORT_SYMBOL_GPL(dcr_unmap);
-#else   /* defined(CONFIG_PPC_DCR_NATIVE) */
+EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
+
+#endif /* defined(CONFIG_PPC_DCR_MMIO) */
+
+#ifdef CONFIG_PPC_DCR_NATIVE
 DEFINE_SPINLOCK(dcr_ind_lock);
-#endif  /* !defined(CONFIG_PPC_DCR_NATIVE) */
+#endif  /* defined(CONFIG_PPC_DCR_NATIVE) */
+
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
new file mode 100644
index 000000000000..2c5187cc8a24
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -0,0 +1,429 @@
+/*
+ * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Tony Li <tony.li@freescale.com>
+ *         Jason Jin <Jason.jin@freescale.com>
+ *
+ * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+#include <linux/irq.h>
+#include <linux/bootmem.h>
+#include <linux/bitmap.h>
+#include <linux/msi.h>
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/prom.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+#include "fsl_msi.h"
+
+struct fsl_msi_feature {
+        u32 fsl_pic_ip;
+        u32 msiir_offset;
+};
+
+static struct fsl_msi *fsl_msi;
+
+static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
+{
+        return in_be32(base + (reg >> 2));
+}
+
+/*
+ * We do not need this actually. The MSIR register has been read once
+ * in the cascade interrupt. So, this MSI interrupt has been acked
+*/
+static void fsl_msi_end_irq(unsigned int virq)
+{
+}
+
+static struct irq_chip fsl_msi_chip = {
+        .mask           = mask_msi_irq,
+        .unmask         = unmask_msi_irq,
+        .ack            = fsl_msi_end_irq,
+        .typename       = " FSL-MSI  ",
+};
+
+static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
+                                irq_hw_number_t hw)
+{
+        struct irq_chip *chip = &fsl_msi_chip;
+
+        get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
+
+        set_irq_chip_and_handler(virq, chip, handle_edge_irq);
+
+        return 0;
+}
+
+static struct irq_host_ops fsl_msi_host_ops = {
+        .map = fsl_msi_host_map,
+};
+
+static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
+{
+        unsigned long flags;
+        int order = get_count_order(num);
+        int offset;
+
+        spin_lock_irqsave(&msi->bitmap_lock, flags);
+
+        offset = bitmap_find_free_region(msi->fsl_msi_bitmap,
+                                        NR_MSI_IRQS, order);
+
+        spin_unlock_irqrestore(&msi->bitmap_lock, flags);
+
+        pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n",
+                __func__, num, order, offset);
+
+        return offset;
+}
+
+static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
+{
+        unsigned long flags;
+        int order = get_count_order(num);
+
+        pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n",
+                __func__, num, order, offset);
+
+        spin_lock_irqsave(&msi->bitmap_lock, flags);
+        bitmap_release_region(msi->fsl_msi_bitmap, offset, order);
+        spin_unlock_irqrestore(&msi->bitmap_lock, flags);
+}
+
+static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
+{
+        int i;
+        int len;
+        const u32 *p;
+
+        bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
+                       get_count_order(NR_MSI_IRQS));
+
+        p = of_get_property(msi->of_node, "msi-available-ranges", &len);
+
+        if (!p) {
+                /* No msi-available-ranges property,
+                 * All the 256 MSI interrupts can be used
+                 */
+                fsl_msi_free_hwirqs(msi, 0, 0x100);
+                return 0;
+        }
+
+        if ((len % (2 * sizeof(u32))) != 0) {
+                printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges "
+                       "property on %s\n", msi->of_node->full_name);
+                return -EINVAL;
+        }
+
+        /* Format is: (<u32 start> <u32 count>)+ */
+        len /= 2 * sizeof(u32);
+        for (i = 0; i < len; i++, p += 2)
+                fsl_msi_free_hwirqs(msi, *p, *(p + 1));
+
+        return 0;
+}
+
+static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
+{
+        int rc;
+        int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
+
+        msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
+
+        if (msi_data->fsl_msi_bitmap == NULL) {
+                pr_debug("%s: ENOMEM allocating allocator bitmap!\n",
+                                __func__);
+                return -ENOMEM;
+        }
+
+        rc = fsl_msi_free_dt_hwirqs(msi_data);
+        if (rc)
+                goto out_free;
+
+        return 0;
+out_free:
+        kfree(msi_data->fsl_msi_bitmap);
+
+        msi_data->fsl_msi_bitmap = NULL;
+        return rc;
+
+}
+
+static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
+{
+        if (type == PCI_CAP_ID_MSIX)
+                pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
+
+        return 0;
+}
+
+static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
+{
+        struct msi_desc *entry;
+        struct fsl_msi *msi_data = fsl_msi;
+
+        list_for_each_entry(entry, &pdev->msi_list, list) {
+                if (entry->irq == NO_IRQ)
+                        continue;
+                set_irq_msi(entry->irq, NULL);
+                fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1);
+                irq_dispose_mapping(entry->irq);
+        }
+
+        return;
+}
+
+static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
+                                  struct msi_msg *msg)
+{
+        struct fsl_msi *msi_data = fsl_msi;
+
+        msg->address_lo = msi_data->msi_addr_lo;
+        msg->address_hi = msi_data->msi_addr_hi;
+        msg->data = hwirq;
+
+        pr_debug("%s: allocated srs: %d, ibs: %d\n",
+                __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
+}
+
+static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+{
+        irq_hw_number_t hwirq;
+        int rc;
+        unsigned int virq;
+        struct msi_desc *entry;
+        struct msi_msg msg;
+        struct fsl_msi *msi_data = fsl_msi;
+
+        list_for_each_entry(entry, &pdev->msi_list, list) {
+                hwirq = fsl_msi_alloc_hwirqs(msi_data, 1);
+                if (hwirq < 0) {
+                        rc = hwirq;
+                        pr_debug("%s: fail allocating msi interrupt\n",
+                                        __func__);
+                        goto out_free;
+                }
+
+                virq = irq_create_mapping(msi_data->irqhost, hwirq);
+
+                if (virq == NO_IRQ) {
+                        pr_debug("%s: fail mapping hwirq 0x%lx\n",
+                                        __func__, hwirq);
+                        fsl_msi_free_hwirqs(msi_data, hwirq, 1);
+                        rc = -ENOSPC;
+                        goto out_free;
+                }
+                set_irq_msi(virq, entry);
+
+                fsl_compose_msi_msg(pdev, hwirq, &msg);
+                write_msi_msg(virq, &msg);
+        }
+        return 0;
+
+out_free:
+        return rc;
+}
+
+static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
+{
+        unsigned int cascade_irq;
+        struct fsl_msi *msi_data = fsl_msi;
+        int msir_index = -1;
+        u32 msir_value = 0;
+        u32 intr_index;
+        u32 have_shift = 0;
+
+        spin_lock(&desc->lock);
+        if ((msi_data->feature &  FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
+                if (desc->chip->mask_ack)
+                        desc->chip->mask_ack(irq);
+                else {
+                        desc->chip->mask(irq);
+                        desc->chip->ack(irq);
+                }
+        }
+
+        if (unlikely(desc->status & IRQ_INPROGRESS))
+                goto unlock;
+
+        msir_index = (int)desc->handler_data;
+
+        if (msir_index >= NR_MSI_REG)
+                cascade_irq = NO_IRQ;
+
+        desc->status |= IRQ_INPROGRESS;
+        switch (fsl_msi->feature & FSL_PIC_IP_MASK) {
+        case FSL_PIC_IP_MPIC:
+                msir_value = fsl_msi_read(msi_data->msi_regs,
+                        msir_index * 0x10);
+                break;
+        case FSL_PIC_IP_IPIC:
+                msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
+                break;
+        }
+
+        while (msir_value) {
+                intr_index = ffs(msir_value) - 1;
+
+                cascade_irq = irq_linear_revmap(msi_data->irqhost,
+                                msir_index * IRQS_PER_MSI_REG +
+                                        intr_index + have_shift);
+                if (cascade_irq != NO_IRQ)
+                        generic_handle_irq(cascade_irq);
+                have_shift += intr_index + 1;
+                msir_value = msir_value >> (intr_index + 1);
+        }
+        desc->status &= ~IRQ_INPROGRESS;
+
+        switch (msi_data->feature & FSL_PIC_IP_MASK) {
+        case FSL_PIC_IP_MPIC:
+                desc->chip->eoi(irq);
+                break;
+        case FSL_PIC_IP_IPIC:
+                if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+                        desc->chip->unmask(irq);
+                break;
+        }
+unlock:
+        spin_unlock(&desc->lock);
+}
+
+static int __devinit fsl_of_msi_probe(struct of_device *dev,
+                                const struct of_device_id *match)
+{
+        struct fsl_msi *msi;
+        struct resource res;
+        int err, i, count;
+        int rc;
+        int virt_msir;
+        const u32 *p;
+        struct fsl_msi_feature *features = match->data;
+
+        printk(KERN_DEBUG "Setting up Freescale MSI support\n");
+
+        msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
+        if (!msi) {
+                dev_err(&dev->dev, "No memory for MSI structure\n");
+                err = -ENOMEM;
+                goto error_out;
+        }
+
+        msi->of_node = of_node_get(dev->node);
+
+        msi->irqhost = irq_alloc_host(of_node_get(dev->node),
+                                IRQ_HOST_MAP_LINEAR,
+                                NR_MSI_IRQS, &fsl_msi_host_ops, 0);
+        if (msi->irqhost == NULL) {
+                dev_err(&dev->dev, "No memory for MSI irqhost\n");
+                of_node_put(dev->node);
+                err = -ENOMEM;
+                goto error_out;
+        }
+
+        /* Get the MSI reg base */
+        err = of_address_to_resource(dev->node, 0, &res);
+        if (err) {
+                dev_err(&dev->dev, "%s resource error!\n",
+                                dev->node->full_name);
+                goto error_out;
+        }
+
+        msi->msi_regs = ioremap(res.start, res.end - res.start + 1);
+        if (!msi->msi_regs) {
+                dev_err(&dev->dev, "ioremap problem failed\n");
+                goto error_out;
+        }
+
+        msi->feature = features->fsl_pic_ip;
+
+        msi->irqhost->host_data = msi;
+
+        msi->msi_addr_hi = 0x0;
+        msi->msi_addr_lo = res.start + features->msiir_offset;
+
+        rc = fsl_msi_init_allocator(msi);
+        if (rc) {
+                dev_err(&dev->dev, "Error allocating MSI bitmap\n");
+                goto error_out;
+        }
+
+        p = of_get_property(dev->node, "interrupts", &count);
+        if (!p) {
+                dev_err(&dev->dev, "no interrupts property found on %s\n",
+                                dev->node->full_name);
+                err = -ENODEV;
+                goto error_out;
+        }
+        if (count % 8 != 0) {
+                dev_err(&dev->dev, "Malformed interrupts property on %s\n",
+                                dev->node->full_name);
+                err = -EINVAL;
+                goto error_out;
+        }
+
+        count /= sizeof(u32);
+        for (i = 0; i < count / 2; i++) {
+                if (i > NR_MSI_REG)
+                        break;
+                virt_msir = irq_of_parse_and_map(dev->node, i);
+                if (virt_msir != NO_IRQ) {
+                        set_irq_data(virt_msir, (void *)i);
+                        set_irq_chained_handler(virt_msir, fsl_msi_cascade);
+                }
+        }
+
+        fsl_msi = msi;
+
+        WARN_ON(ppc_md.setup_msi_irqs);
+        ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
+        ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
+        ppc_md.msi_check_device = fsl_msi_check_device;
+        return 0;
+error_out:
+        kfree(msi);
+        return err;
+}
+
+static const struct fsl_msi_feature mpic_msi_feature = {
+        .fsl_pic_ip = FSL_PIC_IP_MPIC,
+        .msiir_offset = 0x140,
+};
+
+static const struct fsl_msi_feature ipic_msi_feature = {
+        .fsl_pic_ip = FSL_PIC_IP_IPIC,
+        .msiir_offset = 0x38,
+};
+
+static const struct of_device_id fsl_of_msi_ids[] = {
+        {
+                .compatible = "fsl,mpic-msi",
+                .data = (void *)&mpic_msi_feature,
+        },
+        {
+                .compatible = "fsl,ipic-msi",
+                .data = (void *)&ipic_msi_feature,
+        },
+        {}
+};
+
+static struct of_platform_driver fsl_of_msi_driver = {
+        .name = "fsl-msi",
+        .match_table = fsl_of_msi_ids,
+        .probe = fsl_of_msi_probe,
+};
+
+static __init int fsl_of_msi_init(void)
+{
+        return of_register_platform_driver(&fsl_of_msi_driver);
+}
+
+subsys_initcall(fsl_of_msi_init);
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
new file mode 100644
index 000000000000..a653468521fa
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Tony Li <tony.li@freescale.com>
+ *         Jason Jin <Jason.jin@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+#ifndef _POWERPC_SYSDEV_FSL_MSI_H
+#define _POWERPC_SYSDEV_FSL_MSI_H
+
+#define NR_MSI_REG              8
+#define IRQS_PER_MSI_REG        32
+#define NR_MSI_IRQS     (NR_MSI_REG * IRQS_PER_MSI_REG)
+
+#define FSL_PIC_IP_MASK 0x0000000F
+#define FSL_PIC_IP_MPIC 0x00000001
+#define FSL_PIC_IP_IPIC 0x00000002
+
+struct fsl_msi {
+        /* Device node of the MSI interrupt*/
+        struct device_node *of_node;
+
+        struct irq_host *irqhost;
+
+        unsigned long cascade_irq;
+
+        u32 msi_addr_lo;
+        u32 msi_addr_hi;
+        void __iomem *msi_regs;
+        u32 feature;
+
+        unsigned long *fsl_msi_bitmap;
+        spinlock_t bitmap_lock;
+};
+
+#endif /* _POWERPC_SYSDEV_FSL_MSI_H */
+
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index bf13c2174a4e..489ca5a397b1 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -106,6 +106,16 @@ void __init setup_pci_cmd(struct pci_controller *hose)
         }
 }
 
+static void __init setup_pci_pcsrbar(struct pci_controller *hose)
+{
+#ifdef CONFIG_PCI_MSI
+        phys_addr_t immr_base;
+
+        immr_base = get_immrbase();
+        early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base);
+#endif
+}
+
 static int fsl_pcie_bus_fixup;
 
 static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
@@ -211,6 +221,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
         /* Setup PEX window registers */
         setup_pci_atmu(hose, &rsrc);
 
+        /* Setup PEXCSRBAR */
+        setup_pci_pcsrbar(hose);
         return 0;
 }
 
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 019657c110b6..ca54563d5c7e 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -433,6 +433,7 @@ static struct i2c_driver_device i2c_devices[] __initdata = {
         {"dallas,ds1340",  "ds1340"},
         {"stm,m41t00",     "m41t00"},
         {"dallas,ds1374",  "ds1374"},
+        {"cirrus,cs4270",  "cs4270"},
 };
 
 static int __init of_find_i2c_driver(struct device_node *node,
@@ -448,6 +449,10 @@ static int __init of_find_i2c_driver(struct device_node *node,
                         return -ENOMEM;
                 return 0;
         }
+
+        pr_warning("fsl_soc.c: unrecognized i2c node %s\n",
+                (const char *) of_get_property(node, "compatible", NULL));
+
         return -ENODEV;
 }
 
@@ -491,6 +496,8 @@ static int __init fsl_i2c_of_init(void)
                 struct resource r[2];
                 struct fsl_i2c_platform_data i2c_data;
                 const unsigned char *flags = NULL;
+                int idx;
+                const u32 *iprop;
 
                 memset(&r, 0, sizeof(r));
                 memset(&i2c_data, 0, sizeof(i2c_data));
@@ -501,7 +508,10 @@ static int __init fsl_i2c_of_init(void)
 
                 of_irq_to_resource(np, 0, &r[1]);
 
-                i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
+                iprop = of_get_property(np, "cell-index", NULL);
+                idx = iprop ? *iprop : i;
+
+                i2c_dev = platform_device_register_simple("fsl-i2c", idx, r, 2);
                 if (IS_ERR(i2c_dev)) {
                         ret = PTR_ERR(i2c_dev);
                         goto err;
@@ -523,7 +533,8 @@ static int __init fsl_i2c_of_init(void)
                 if (ret)
                         goto unreg;
 
-                of_register_i2c_devices(np, i++);
+                of_register_i2c_devices(np, idx);
+                i++;
         }
 
         return 0;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7680001676a6..f99f81abbd5c 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1144,9 +1144,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK)
                           >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
         if (isu_size == 0)
-                mpic->num_sources =
-                        ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
-                         >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
+                if (flags & MPIC_BROKEN_FRR_NIRQS)
+                        mpic->num_sources = mpic->irq_count;
+                else
+                        mpic->num_sources =
+                                ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
+                                 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
 
         /* Map the per-CPU registers */
         for (i = 0; i < mpic->num_cpus; i++) {
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index d272a52ecd24..de3e5e8bc324 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -16,6 +16,7 @@
 #include <asm/hw_irq.h>
 #include <asm/ppc-pci.h>
 
+#include <sysdev/mpic.h>
 
 static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
 {
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 33cbfb22ce3e..68aff6076675 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -95,6 +95,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         unsigned int virq;
         struct msi_desc *entry;
         struct msi_msg msg;
+        int ret;
 
         pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
                  pdev, nvec, type);
@@ -108,8 +109,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
                  * few MSIs for someone, but restrictions will apply to how the
                  * sources can be changed independently.
                  */
-                hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
-                if (hwirq < 0) {
+                ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
+                hwirq = ret;
+                if (ret < 0) {
                         pr_debug("pasemi_msi: failed allocating hwirq\n");
                         return hwirq;
                 }
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 1d5a40899b74..6e2f8686fdfc 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -115,17 +115,19 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         struct msi_desc *entry;
         struct msi_msg msg;
         u64 addr;
+        int ret;
 
         addr = find_ht_magic_addr(pdev);
         msg.address_lo = addr & 0xFFFFFFFF;
         msg.address_hi = addr >> 32;
 
         list_for_each_entry(entry, &pdev->msi_list, list) {
-                hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1);
-                if (hwirq < 0) {
+                ret = mpic_msi_alloc_hwirqs(msi_mpic, 1);
+                if (ret < 0) {
                         pr_debug("u3msi: failed allocating hwirq\n");
-                        return hwirq;
+                        return ret;
                 }
+                hwirq = ret;
 
                 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
                 if (virq == NO_IRQ) {
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index a132e0de8ca5..32e0ad0ebea8 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -15,6 +15,7 @@
 #include <linux/console.h>
 #include <linux/mv643xx.h>
 #include <linux/platform_device.h>
+#include <linux/of_platform.h>
 
 #include <asm/prom.h>
 
@@ -25,6 +26,11 @@
  * PowerPC of_platform_bus_type.  They support platform_bus_type instead.
  */
 
+static struct of_device_id __initdata of_mv64x60_devices[] = {
+        { .compatible = "marvell,mv64306-devctrl", },
+        {}
+};
+
 /*
  * Create MPSC platform devices
  */
@@ -484,6 +490,10 @@ static int __init mv64x60_device_setup(void)
                 of_node_put(np);
         }
 
+        /* Now add every node that is on the device bus */
+        for_each_compatible_node(np, NULL, "marvell,mv64360")
+                of_platform_bus_probe(np, of_mv64x60_devices, NULL);
+
         return 0;
 }
 arch_initcall(mv64x60_device_setup);