diff options
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r-- | arch/powerpc/sysdev/fsl_rio.c | 711 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_rio.h | 20 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_soc.c | 27 |
3 files changed, 504 insertions, 254 deletions
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index af2425e4655f..3d920376f58e 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
@@ -1,5 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * MPC85xx RapidIO support | 2 | * Freescale MPC85xx/MPC86xx RapidIO support |
3 | * | ||
4 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. | ||
5 | * Zhang Wei <wei.zhang@freescale.com> | ||
3 | * | 6 | * |
4 | * Copyright 2005 MontaVista Software, Inc. | 7 | * Copyright 2005 MontaVista Software, Inc. |
5 | * Matt Porter <mporter@kernel.crashing.org> | 8 | * Matt Porter <mporter@kernel.crashing.org> |
@@ -17,12 +20,23 @@ | |||
17 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
18 | #include <linux/rio.h> | 21 | #include <linux/rio.h> |
19 | #include <linux/rio_drv.h> | 22 | #include <linux/rio_drv.h> |
23 | #include <linux/of_platform.h> | ||
24 | #include <linux/delay.h> | ||
20 | 25 | ||
21 | #include <asm/io.h> | 26 | #include <asm/io.h> |
22 | 27 | ||
23 | #define RIO_REGS_BASE (CCSRBAR + 0xc0000) | 28 | /* RapidIO definition irq, which read from OF-tree */ |
29 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) | ||
30 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) | ||
31 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) | ||
32 | |||
24 | #define RIO_ATMU_REGS_OFFSET 0x10c00 | 33 | #define RIO_ATMU_REGS_OFFSET 0x10c00 |
25 | #define RIO_MSG_REGS_OFFSET 0x11000 | 34 | #define RIO_P_MSG_REGS_OFFSET 0x11000 |
35 | #define RIO_S_MSG_REGS_OFFSET 0x13000 | ||
36 | #define RIO_ESCSR 0x158 | ||
37 | #define RIO_CCSR 0x15c | ||
38 | #define RIO_ISR_AACR 0x10120 | ||
39 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ | ||
26 | #define RIO_MAINT_WIN_SIZE 0x400000 | 40 | #define RIO_MAINT_WIN_SIZE 0x400000 |
27 | #define RIO_DBELL_WIN_SIZE 0x1000 | 41 | #define RIO_DBELL_WIN_SIZE 0x1000 |
28 | 42 | ||
@@ -50,18 +64,18 @@ | |||
50 | #define DOORBELL_DSR_TE 0x00000080 | 64 | #define DOORBELL_DSR_TE 0x00000080 |
51 | #define DOORBELL_DSR_QFI 0x00000010 | 65 | #define DOORBELL_DSR_QFI 0x00000010 |
52 | #define DOORBELL_DSR_DIQI 0x00000001 | 66 | #define DOORBELL_DSR_DIQI 0x00000001 |
53 | #define DOORBELL_TID_OFFSET 0x03 | 67 | #define DOORBELL_TID_OFFSET 0x02 |
54 | #define DOORBELL_SID_OFFSET 0x05 | 68 | #define DOORBELL_SID_OFFSET 0x04 |
55 | #define DOORBELL_INFO_OFFSET 0x06 | 69 | #define DOORBELL_INFO_OFFSET 0x06 |
56 | 70 | ||
57 | #define DOORBELL_MESSAGE_SIZE 0x08 | 71 | #define DOORBELL_MESSAGE_SIZE 0x08 |
58 | #define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET)) | 72 | #define DBELL_SID(x) (*(u16 *)(x + DOORBELL_SID_OFFSET)) |
59 | #define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET)) | 73 | #define DBELL_TID(x) (*(u16 *)(x + DOORBELL_TID_OFFSET)) |
60 | #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET)) | 74 | #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET)) |
61 | 75 | ||
62 | struct rio_atmu_regs { | 76 | struct rio_atmu_regs { |
63 | u32 rowtar; | 77 | u32 rowtar; |
64 | u32 pad1; | 78 | u32 rowtear; |
65 | u32 rowbar; | 79 | u32 rowbar; |
66 | u32 pad2; | 80 | u32 pad2; |
67 | u32 rowar; | 81 | u32 rowar; |
@@ -87,7 +101,15 @@ struct rio_msg_regs { | |||
87 | u32 ifqdpar; | 101 | u32 ifqdpar; |
88 | u32 pad6; | 102 | u32 pad6; |
89 | u32 ifqepar; | 103 | u32 ifqepar; |
90 | u32 pad7[250]; | 104 | u32 pad7[226]; |
105 | u32 odmr; | ||
106 | u32 odsr; | ||
107 | u32 res0[4]; | ||
108 | u32 oddpr; | ||
109 | u32 oddatr; | ||
110 | u32 res1[3]; | ||
111 | u32 odretcr; | ||
112 | u32 res2[12]; | ||
91 | u32 dmr; | 113 | u32 dmr; |
92 | u32 dsr; | 114 | u32 dsr; |
93 | u32 pad8; | 115 | u32 pad8; |
@@ -112,20 +134,12 @@ struct rio_tx_desc { | |||
112 | u32 res4; | 134 | u32 res4; |
113 | }; | 135 | }; |
114 | 136 | ||
115 | static u32 regs_win; | 137 | struct rio_dbell_ring { |
116 | static struct rio_atmu_regs *atmu_regs; | ||
117 | static struct rio_atmu_regs *maint_atmu_regs; | ||
118 | static struct rio_atmu_regs *dbell_atmu_regs; | ||
119 | static u32 dbell_win; | ||
120 | static u32 maint_win; | ||
121 | static struct rio_msg_regs *msg_regs; | ||
122 | |||
123 | static struct rio_dbell_ring { | ||
124 | void *virt; | 138 | void *virt; |
125 | dma_addr_t phys; | 139 | dma_addr_t phys; |
126 | } dbell_ring; | 140 | }; |
127 | 141 | ||
128 | static struct rio_msg_tx_ring { | 142 | struct rio_msg_tx_ring { |
129 | void *virt; | 143 | void *virt; |
130 | dma_addr_t phys; | 144 | dma_addr_t phys; |
131 | void *virt_buffer[RIO_MAX_TX_RING_SIZE]; | 145 | void *virt_buffer[RIO_MAX_TX_RING_SIZE]; |
@@ -133,19 +147,35 @@ static struct rio_msg_tx_ring { | |||
133 | int tx_slot; | 147 | int tx_slot; |
134 | int size; | 148 | int size; |
135 | void *dev_id; | 149 | void *dev_id; |
136 | } msg_tx_ring; | 150 | }; |
137 | 151 | ||
138 | static struct rio_msg_rx_ring { | 152 | struct rio_msg_rx_ring { |
139 | void *virt; | 153 | void *virt; |
140 | dma_addr_t phys; | 154 | dma_addr_t phys; |
141 | void *virt_buffer[RIO_MAX_RX_RING_SIZE]; | 155 | void *virt_buffer[RIO_MAX_RX_RING_SIZE]; |
142 | int rx_slot; | 156 | int rx_slot; |
143 | int size; | 157 | int size; |
144 | void *dev_id; | 158 | void *dev_id; |
145 | } msg_rx_ring; | 159 | }; |
160 | |||
161 | struct rio_priv { | ||
162 | void __iomem *regs_win; | ||
163 | struct rio_atmu_regs __iomem *atmu_regs; | ||
164 | struct rio_atmu_regs __iomem *maint_atmu_regs; | ||
165 | struct rio_atmu_regs __iomem *dbell_atmu_regs; | ||
166 | void __iomem *dbell_win; | ||
167 | void __iomem *maint_win; | ||
168 | struct rio_msg_regs __iomem *msg_regs; | ||
169 | struct rio_dbell_ring dbell_ring; | ||
170 | struct rio_msg_tx_ring msg_tx_ring; | ||
171 | struct rio_msg_rx_ring msg_rx_ring; | ||
172 | int bellirq; | ||
173 | int txirq; | ||
174 | int rxirq; | ||
175 | }; | ||
146 | 176 | ||
147 | /** | 177 | /** |
148 | * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message | 178 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message |
149 | * @index: ID of RapidIO interface | 179 | * @index: ID of RapidIO interface |
150 | * @destid: Destination ID of target device | 180 | * @destid: Destination ID of target device |
151 | * @data: 16-bit info field of RapidIO doorbell message | 181 | * @data: 16-bit info field of RapidIO doorbell message |
@@ -153,18 +183,34 @@ static struct rio_msg_rx_ring { | |||
153 | * Sends a MPC85xx doorbell message. Returns %0 on success or | 183 | * Sends a MPC85xx doorbell message. Returns %0 on success or |
154 | * %-EINVAL on failure. | 184 | * %-EINVAL on failure. |
155 | */ | 185 | */ |
156 | static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data) | 186 | static int fsl_rio_doorbell_send(struct rio_mport *mport, |
187 | int index, u16 destid, u16 data) | ||
157 | { | 188 | { |
158 | pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n", | 189 | struct rio_priv *priv = mport->priv; |
190 | pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n", | ||
159 | index, destid, data); | 191 | index, destid, data); |
160 | out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22); | 192 | switch (mport->phy_type) { |
161 | out_be16((void *)(dbell_win), data); | 193 | case RIO_PHY_PARALLEL: |
194 | out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22); | ||
195 | out_be16(priv->dbell_win, data); | ||
196 | break; | ||
197 | case RIO_PHY_SERIAL: | ||
198 | /* In the serial version silicons, such as MPC8548, MPC8641, | ||
199 | * below operations is must be. | ||
200 | */ | ||
201 | out_be32(&priv->msg_regs->odmr, 0x00000000); | ||
202 | out_be32(&priv->msg_regs->odretcr, 0x00000004); | ||
203 | out_be32(&priv->msg_regs->oddpr, destid << 16); | ||
204 | out_be32(&priv->msg_regs->oddatr, data); | ||
205 | out_be32(&priv->msg_regs->odmr, 0x00000001); | ||
206 | break; | ||
207 | } | ||
162 | 208 | ||
163 | return 0; | 209 | return 0; |
164 | } | 210 | } |
165 | 211 | ||
166 | /** | 212 | /** |
167 | * mpc85xx_local_config_read - Generate a MPC85xx local config space read | 213 | * fsl_local_config_read - Generate a MPC85xx local config space read |
168 | * @index: ID of RapdiIO interface | 214 | * @index: ID of RapdiIO interface |
169 | * @offset: Offset into configuration space | 215 | * @offset: Offset into configuration space |
170 | * @len: Length (in bytes) of the maintenance transaction | 216 | * @len: Length (in bytes) of the maintenance transaction |
@@ -173,17 +219,19 @@ static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data) | |||
173 | * Generates a MPC85xx local configuration space read. Returns %0 on | 219 | * Generates a MPC85xx local configuration space read. Returns %0 on |
174 | * success or %-EINVAL on failure. | 220 | * success or %-EINVAL on failure. |
175 | */ | 221 | */ |
176 | static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data) | 222 | static int fsl_local_config_read(struct rio_mport *mport, |
223 | int index, u32 offset, int len, u32 *data) | ||
177 | { | 224 | { |
178 | pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index, | 225 | struct rio_priv *priv = mport->priv; |
226 | pr_debug("fsl_local_config_read: index %d offset %8.8x\n", index, | ||
179 | offset); | 227 | offset); |
180 | *data = in_be32((void *)(regs_win + offset)); | 228 | *data = in_be32(priv->regs_win + offset); |
181 | 229 | ||
182 | return 0; | 230 | return 0; |
183 | } | 231 | } |
184 | 232 | ||
185 | /** | 233 | /** |
186 | * mpc85xx_local_config_write - Generate a MPC85xx local config space write | 234 | * fsl_local_config_write - Generate a MPC85xx local config space write |
187 | * @index: ID of RapdiIO interface | 235 | * @index: ID of RapdiIO interface |
188 | * @offset: Offset into configuration space | 236 | * @offset: Offset into configuration space |
189 | * @len: Length (in bytes) of the maintenance transaction | 237 | * @len: Length (in bytes) of the maintenance transaction |
@@ -192,18 +240,20 @@ static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data) | |||
192 | * Generates a MPC85xx local configuration space write. Returns %0 on | 240 | * Generates a MPC85xx local configuration space write. Returns %0 on |
193 | * success or %-EINVAL on failure. | 241 | * success or %-EINVAL on failure. |
194 | */ | 242 | */ |
195 | static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data) | 243 | static int fsl_local_config_write(struct rio_mport *mport, |
244 | int index, u32 offset, int len, u32 data) | ||
196 | { | 245 | { |
246 | struct rio_priv *priv = mport->priv; | ||
197 | pr_debug | 247 | pr_debug |
198 | ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n", | 248 | ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n", |
199 | index, offset, data); | 249 | index, offset, data); |
200 | out_be32((void *)(regs_win + offset), data); | 250 | out_be32(priv->regs_win + offset, data); |
201 | 251 | ||
202 | return 0; | 252 | return 0; |
203 | } | 253 | } |
204 | 254 | ||
205 | /** | 255 | /** |
206 | * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction | 256 | * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction |
207 | * @index: ID of RapdiIO interface | 257 | * @index: ID of RapdiIO interface |
208 | * @destid: Destination ID of transaction | 258 | * @destid: Destination ID of transaction |
209 | * @hopcount: Number of hops to target device | 259 | * @hopcount: Number of hops to target device |
@@ -215,18 +265,19 @@ static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data) | |||
215 | * success or %-EINVAL on failure. | 265 | * success or %-EINVAL on failure. |
216 | */ | 266 | */ |
217 | static int | 267 | static int |
218 | mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len, | 268 | fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid, |
219 | u32 * val) | 269 | u8 hopcount, u32 offset, int len, u32 *val) |
220 | { | 270 | { |
271 | struct rio_priv *priv = mport->priv; | ||
221 | u8 *data; | 272 | u8 *data; |
222 | 273 | ||
223 | pr_debug | 274 | pr_debug |
224 | ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", | 275 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", |
225 | index, destid, hopcount, offset, len); | 276 | index, destid, hopcount, offset, len); |
226 | out_be32((void *)&maint_atmu_regs->rowtar, | 277 | out_be32(&priv->maint_atmu_regs->rowtar, |
227 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); | 278 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); |
228 | 279 | ||
229 | data = (u8 *) maint_win + offset; | 280 | data = (u8 *) priv->maint_win + offset; |
230 | switch (len) { | 281 | switch (len) { |
231 | case 1: | 282 | case 1: |
232 | *val = in_8((u8 *) data); | 283 | *val = in_8((u8 *) data); |
@@ -243,7 +294,7 @@ mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len, | |||
243 | } | 294 | } |
244 | 295 | ||
245 | /** | 296 | /** |
246 | * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction | 297 | * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction |
247 | * @index: ID of RapdiIO interface | 298 | * @index: ID of RapdiIO interface |
248 | * @destid: Destination ID of transaction | 299 | * @destid: Destination ID of transaction |
249 | * @hopcount: Number of hops to target device | 300 | * @hopcount: Number of hops to target device |
@@ -255,17 +306,18 @@ mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len, | |||
255 | * success or %-EINVAL on failure. | 306 | * success or %-EINVAL on failure. |
256 | */ | 307 | */ |
257 | static int | 308 | static int |
258 | mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset, | 309 | fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, |
259 | int len, u32 val) | 310 | u8 hopcount, u32 offset, int len, u32 val) |
260 | { | 311 | { |
312 | struct rio_priv *priv = mport->priv; | ||
261 | u8 *data; | 313 | u8 *data; |
262 | pr_debug | 314 | pr_debug |
263 | ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", | 315 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", |
264 | index, destid, hopcount, offset, len, val); | 316 | index, destid, hopcount, offset, len, val); |
265 | out_be32((void *)&maint_atmu_regs->rowtar, | 317 | out_be32(&priv->maint_atmu_regs->rowtar, |
266 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); | 318 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); |
267 | 319 | ||
268 | data = (u8 *) maint_win + offset; | 320 | data = (u8 *) priv->maint_win + offset; |
269 | switch (len) { | 321 | switch (len) { |
270 | case 1: | 322 | case 1: |
271 | out_8((u8 *) data, val); | 323 | out_8((u8 *) data, val); |
@@ -296,9 +348,10 @@ int | |||
296 | rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, | 348 | rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, |
297 | void *buffer, size_t len) | 349 | void *buffer, size_t len) |
298 | { | 350 | { |
351 | struct rio_priv *priv = mport->priv; | ||
299 | u32 omr; | 352 | u32 omr; |
300 | struct rio_tx_desc *desc = | 353 | struct rio_tx_desc *desc = (struct rio_tx_desc *)priv->msg_tx_ring.virt |
301 | (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot; | 354 | + priv->msg_tx_ring.tx_slot; |
302 | int ret = 0; | 355 | int ret = 0; |
303 | 356 | ||
304 | pr_debug | 357 | pr_debug |
@@ -311,31 +364,43 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, | |||
311 | } | 364 | } |
312 | 365 | ||
313 | /* Copy and clear rest of buffer */ | 366 | /* Copy and clear rest of buffer */ |
314 | memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len); | 367 | memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer, |
368 | len); | ||
315 | if (len < (RIO_MAX_MSG_SIZE - 4)) | 369 | if (len < (RIO_MAX_MSG_SIZE - 4)) |
316 | memset((void *)((u32) msg_tx_ring. | 370 | memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot] |
317 | virt_buffer[msg_tx_ring.tx_slot] + len), 0, | 371 | + len, 0, RIO_MAX_MSG_SIZE - len); |
318 | RIO_MAX_MSG_SIZE - len); | ||
319 | 372 | ||
320 | /* Set mbox field for message */ | 373 | switch (mport->phy_type) { |
321 | desc->dport = mbox & 0x3; | 374 | case RIO_PHY_PARALLEL: |
375 | /* Set mbox field for message */ | ||
376 | desc->dport = mbox & 0x3; | ||
322 | 377 | ||
323 | /* Enable EOMI interrupt, set priority, and set destid */ | 378 | /* Enable EOMI interrupt, set priority, and set destid */ |
324 | desc->dattr = 0x28000000 | (rdev->destid << 2); | 379 | desc->dattr = 0x28000000 | (rdev->destid << 2); |
380 | break; | ||
381 | case RIO_PHY_SERIAL: | ||
382 | /* Set mbox field for message, and set destid */ | ||
383 | desc->dport = (rdev->destid << 16) | (mbox & 0x3); | ||
384 | |||
385 | /* Enable EOMI interrupt and priority */ | ||
386 | desc->dattr = 0x28000000; | ||
387 | break; | ||
388 | } | ||
325 | 389 | ||
326 | /* Set transfer size aligned to next power of 2 (in double words) */ | 390 | /* Set transfer size aligned to next power of 2 (in double words) */ |
327 | desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len); | 391 | desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len); |
328 | 392 | ||
329 | /* Set snooping and source buffer address */ | 393 | /* Set snooping and source buffer address */ |
330 | desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot]; | 394 | desc->saddr = 0x00000004 |
395 | | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot]; | ||
331 | 396 | ||
332 | /* Increment enqueue pointer */ | 397 | /* Increment enqueue pointer */ |
333 | omr = in_be32((void *)&msg_regs->omr); | 398 | omr = in_be32(&priv->msg_regs->omr); |
334 | out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI); | 399 | out_be32(&priv->msg_regs->omr, omr | RIO_MSG_OMR_MUI); |
335 | 400 | ||
336 | /* Go to next descriptor */ | 401 | /* Go to next descriptor */ |
337 | if (++msg_tx_ring.tx_slot == msg_tx_ring.size) | 402 | if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size) |
338 | msg_tx_ring.tx_slot = 0; | 403 | priv->msg_tx_ring.tx_slot = 0; |
339 | 404 | ||
340 | out: | 405 | out: |
341 | return ret; | 406 | return ret; |
@@ -344,7 +409,7 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, | |||
344 | EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); | 409 | EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); |
345 | 410 | ||
346 | /** | 411 | /** |
347 | * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler | 412 | * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler |
348 | * @irq: Linux interrupt number | 413 | * @irq: Linux interrupt number |
349 | * @dev_instance: Pointer to interrupt-specific data | 414 | * @dev_instance: Pointer to interrupt-specific data |
350 | * | 415 | * |
@@ -352,32 +417,34 @@ EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); | |||
352 | * mailbox event handler and acks the interrupt occurrence. | 417 | * mailbox event handler and acks the interrupt occurrence. |
353 | */ | 418 | */ |
354 | static irqreturn_t | 419 | static irqreturn_t |
355 | mpc85xx_rio_tx_handler(int irq, void *dev_instance) | 420 | fsl_rio_tx_handler(int irq, void *dev_instance) |
356 | { | 421 | { |
357 | int osr; | 422 | int osr; |
358 | struct rio_mport *port = (struct rio_mport *)dev_instance; | 423 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
424 | struct rio_priv *priv = port->priv; | ||
359 | 425 | ||
360 | osr = in_be32((void *)&msg_regs->osr); | 426 | osr = in_be32(&priv->msg_regs->osr); |
361 | 427 | ||
362 | if (osr & RIO_MSG_OSR_TE) { | 428 | if (osr & RIO_MSG_OSR_TE) { |
363 | pr_info("RIO: outbound message transmission error\n"); | 429 | pr_info("RIO: outbound message transmission error\n"); |
364 | out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE); | 430 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE); |
365 | goto out; | 431 | goto out; |
366 | } | 432 | } |
367 | 433 | ||
368 | if (osr & RIO_MSG_OSR_QOI) { | 434 | if (osr & RIO_MSG_OSR_QOI) { |
369 | pr_info("RIO: outbound message queue overflow\n"); | 435 | pr_info("RIO: outbound message queue overflow\n"); |
370 | out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI); | 436 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI); |
371 | goto out; | 437 | goto out; |
372 | } | 438 | } |
373 | 439 | ||
374 | if (osr & RIO_MSG_OSR_EOMI) { | 440 | if (osr & RIO_MSG_OSR_EOMI) { |
375 | u32 dqp = in_be32((void *)&msg_regs->odqdpar); | 441 | u32 dqp = in_be32(&priv->msg_regs->odqdpar); |
376 | int slot = (dqp - msg_tx_ring.phys) >> 5; | 442 | int slot = (dqp - priv->msg_tx_ring.phys) >> 5; |
377 | port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot); | 443 | port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1, |
444 | slot); | ||
378 | 445 | ||
379 | /* Ack the end-of-message interrupt */ | 446 | /* Ack the end-of-message interrupt */ |
380 | out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI); | 447 | out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI); |
381 | } | 448 | } |
382 | 449 | ||
383 | out: | 450 | out: |
@@ -398,6 +465,7 @@ mpc85xx_rio_tx_handler(int irq, void *dev_instance) | |||
398 | int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) | 465 | int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) |
399 | { | 466 | { |
400 | int i, j, rc = 0; | 467 | int i, j, rc = 0; |
468 | struct rio_priv *priv = mport->priv; | ||
401 | 469 | ||
402 | if ((entries < RIO_MIN_TX_RING_SIZE) || | 470 | if ((entries < RIO_MIN_TX_RING_SIZE) || |
403 | (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) { | 471 | (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) { |
@@ -406,54 +474,53 @@ int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entr | |||
406 | } | 474 | } |
407 | 475 | ||
408 | /* Initialize shadow copy ring */ | 476 | /* Initialize shadow copy ring */ |
409 | msg_tx_ring.dev_id = dev_id; | 477 | priv->msg_tx_ring.dev_id = dev_id; |
410 | msg_tx_ring.size = entries; | 478 | priv->msg_tx_ring.size = entries; |
411 | 479 | ||
412 | for (i = 0; i < msg_tx_ring.size; i++) { | 480 | for (i = 0; i < priv->msg_tx_ring.size; i++) { |
413 | if (! | 481 | priv->msg_tx_ring.virt_buffer[i] = |
414 | (msg_tx_ring.virt_buffer[i] = | 482 | dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE, |
415 | dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE, | 483 | &priv->msg_tx_ring.phys_buffer[i], GFP_KERNEL); |
416 | &msg_tx_ring.phys_buffer[i], | 484 | if (!priv->msg_tx_ring.virt_buffer[i]) { |
417 | GFP_KERNEL))) { | ||
418 | rc = -ENOMEM; | 485 | rc = -ENOMEM; |
419 | for (j = 0; j < msg_tx_ring.size; j++) | 486 | for (j = 0; j < priv->msg_tx_ring.size; j++) |
420 | if (msg_tx_ring.virt_buffer[j]) | 487 | if (priv->msg_tx_ring.virt_buffer[j]) |
421 | dma_free_coherent(NULL, | 488 | dma_free_coherent(NULL, |
422 | RIO_MSG_BUFFER_SIZE, | 489 | RIO_MSG_BUFFER_SIZE, |
423 | msg_tx_ring. | 490 | priv->msg_tx_ring. |
424 | virt_buffer[j], | 491 | virt_buffer[j], |
425 | msg_tx_ring. | 492 | priv->msg_tx_ring. |
426 | phys_buffer[j]); | 493 | phys_buffer[j]); |
427 | goto out; | 494 | goto out; |
428 | } | 495 | } |
429 | } | 496 | } |
430 | 497 | ||
431 | /* Initialize outbound message descriptor ring */ | 498 | /* Initialize outbound message descriptor ring */ |
432 | if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL, | 499 | priv->msg_tx_ring.virt = dma_alloc_coherent(NULL, |
433 | msg_tx_ring.size * | 500 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
434 | RIO_MSG_DESC_SIZE, | 501 | &priv->msg_tx_ring.phys, GFP_KERNEL); |
435 | &msg_tx_ring.phys, | 502 | if (!priv->msg_tx_ring.virt) { |
436 | GFP_KERNEL))) { | ||
437 | rc = -ENOMEM; | 503 | rc = -ENOMEM; |
438 | goto out_dma; | 504 | goto out_dma; |
439 | } | 505 | } |
440 | memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE); | 506 | memset(priv->msg_tx_ring.virt, 0, |
441 | msg_tx_ring.tx_slot = 0; | 507 | priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE); |
508 | priv->msg_tx_ring.tx_slot = 0; | ||
442 | 509 | ||
443 | /* Point dequeue/enqueue pointers at first entry in ring */ | 510 | /* Point dequeue/enqueue pointers at first entry in ring */ |
444 | out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys); | 511 | out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys); |
445 | out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys); | 512 | out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys); |
446 | 513 | ||
447 | /* Configure for snooping */ | 514 | /* Configure for snooping */ |
448 | out_be32((void *)&msg_regs->osar, 0x00000004); | 515 | out_be32(&priv->msg_regs->osar, 0x00000004); |
449 | 516 | ||
450 | /* Clear interrupt status */ | 517 | /* Clear interrupt status */ |
451 | out_be32((void *)&msg_regs->osr, 0x000000b3); | 518 | out_be32(&priv->msg_regs->osr, 0x000000b3); |
452 | 519 | ||
453 | /* Hook up outbound message handler */ | 520 | /* Hook up outbound message handler */ |
454 | if ((rc = | 521 | rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0, |
455 | request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0, | 522 | "msg_tx", (void *)mport); |
456 | "msg_tx", (void *)mport)) < 0) | 523 | if (rc < 0) |
457 | goto out_irq; | 524 | goto out_irq; |
458 | 525 | ||
459 | /* | 526 | /* |
@@ -463,28 +530,28 @@ int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entr | |||
463 | * Chaining mode | 530 | * Chaining mode |
464 | * Disable | 531 | * Disable |
465 | */ | 532 | */ |
466 | out_be32((void *)&msg_regs->omr, 0x00100220); | 533 | out_be32(&priv->msg_regs->omr, 0x00100220); |
467 | 534 | ||
468 | /* Set number of entries */ | 535 | /* Set number of entries */ |
469 | out_be32((void *)&msg_regs->omr, | 536 | out_be32(&priv->msg_regs->omr, |
470 | in_be32((void *)&msg_regs->omr) | | 537 | in_be32(&priv->msg_regs->omr) | |
471 | ((get_bitmask_order(entries) - 2) << 12)); | 538 | ((get_bitmask_order(entries) - 2) << 12)); |
472 | 539 | ||
473 | /* Now enable the unit */ | 540 | /* Now enable the unit */ |
474 | out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1); | 541 | out_be32(&priv->msg_regs->omr, in_be32(&priv->msg_regs->omr) | 0x1); |
475 | 542 | ||
476 | out: | 543 | out: |
477 | return rc; | 544 | return rc; |
478 | 545 | ||
479 | out_irq: | 546 | out_irq: |
480 | dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE, | 547 | dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
481 | msg_tx_ring.virt, msg_tx_ring.phys); | 548 | priv->msg_tx_ring.virt, priv->msg_tx_ring.phys); |
482 | 549 | ||
483 | out_dma: | 550 | out_dma: |
484 | for (i = 0; i < msg_tx_ring.size; i++) | 551 | for (i = 0; i < priv->msg_tx_ring.size; i++) |
485 | dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE, | 552 | dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE, |
486 | msg_tx_ring.virt_buffer[i], | 553 | priv->msg_tx_ring.virt_buffer[i], |
487 | msg_tx_ring.phys_buffer[i]); | 554 | priv->msg_tx_ring.phys_buffer[i]); |
488 | 555 | ||
489 | return rc; | 556 | return rc; |
490 | } | 557 | } |
@@ -499,19 +566,20 @@ int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entr | |||
499 | */ | 566 | */ |
500 | void rio_close_outb_mbox(struct rio_mport *mport, int mbox) | 567 | void rio_close_outb_mbox(struct rio_mport *mport, int mbox) |
501 | { | 568 | { |
569 | struct rio_priv *priv = mport->priv; | ||
502 | /* Disable inbound message unit */ | 570 | /* Disable inbound message unit */ |
503 | out_be32((void *)&msg_regs->omr, 0); | 571 | out_be32(&priv->msg_regs->omr, 0); |
504 | 572 | ||
505 | /* Free ring */ | 573 | /* Free ring */ |
506 | dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE, | 574 | dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE, |
507 | msg_tx_ring.virt, msg_tx_ring.phys); | 575 | priv->msg_tx_ring.virt, priv->msg_tx_ring.phys); |
508 | 576 | ||
509 | /* Free interrupt */ | 577 | /* Free interrupt */ |
510 | free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport); | 578 | free_irq(IRQ_RIO_TX(mport), (void *)mport); |
511 | } | 579 | } |
512 | 580 | ||
513 | /** | 581 | /** |
514 | * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler | 582 | * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler |
515 | * @irq: Linux interrupt number | 583 | * @irq: Linux interrupt number |
516 | * @dev_instance: Pointer to interrupt-specific data | 584 | * @dev_instance: Pointer to interrupt-specific data |
517 | * | 585 | * |
@@ -519,16 +587,17 @@ void rio_close_outb_mbox(struct rio_mport *mport, int mbox) | |||
519 | * mailbox event handler and acks the interrupt occurrence. | 587 | * mailbox event handler and acks the interrupt occurrence. |
520 | */ | 588 | */ |
521 | static irqreturn_t | 589 | static irqreturn_t |
522 | mpc85xx_rio_rx_handler(int irq, void *dev_instance) | 590 | fsl_rio_rx_handler(int irq, void *dev_instance) |
523 | { | 591 | { |
524 | int isr; | 592 | int isr; |
525 | struct rio_mport *port = (struct rio_mport *)dev_instance; | 593 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
594 | struct rio_priv *priv = port->priv; | ||
526 | 595 | ||
527 | isr = in_be32((void *)&msg_regs->isr); | 596 | isr = in_be32(&priv->msg_regs->isr); |
528 | 597 | ||
529 | if (isr & RIO_MSG_ISR_TE) { | 598 | if (isr & RIO_MSG_ISR_TE) { |
530 | pr_info("RIO: inbound message reception error\n"); | 599 | pr_info("RIO: inbound message reception error\n"); |
531 | out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE); | 600 | out_be32((void *)&priv->msg_regs->isr, RIO_MSG_ISR_TE); |
532 | goto out; | 601 | goto out; |
533 | } | 602 | } |
534 | 603 | ||
@@ -540,10 +609,10 @@ mpc85xx_rio_rx_handler(int irq, void *dev_instance) | |||
540 | * make the callback with an unknown/invalid mailbox number | 609 | * make the callback with an unknown/invalid mailbox number |
541 | * argument. | 610 | * argument. |
542 | */ | 611 | */ |
543 | port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1); | 612 | port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1); |
544 | 613 | ||
545 | /* Ack the queueing interrupt */ | 614 | /* Ack the queueing interrupt */ |
546 | out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI); | 615 | out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI); |
547 | } | 616 | } |
548 | 617 | ||
549 | out: | 618 | out: |
@@ -564,6 +633,7 @@ mpc85xx_rio_rx_handler(int irq, void *dev_instance) | |||
564 | int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) | 633 | int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) |
565 | { | 634 | { |
566 | int i, rc = 0; | 635 | int i, rc = 0; |
636 | struct rio_priv *priv = mport->priv; | ||
567 | 637 | ||
568 | if ((entries < RIO_MIN_RX_RING_SIZE) || | 638 | if ((entries < RIO_MIN_RX_RING_SIZE) || |
569 | (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) { | 639 | (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) { |
@@ -572,36 +642,35 @@ int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entri | |||
572 | } | 642 | } |
573 | 643 | ||
574 | /* Initialize client buffer ring */ | 644 | /* Initialize client buffer ring */ |
575 | msg_rx_ring.dev_id = dev_id; | 645 | priv->msg_rx_ring.dev_id = dev_id; |
576 | msg_rx_ring.size = entries; | 646 | priv->msg_rx_ring.size = entries; |
577 | msg_rx_ring.rx_slot = 0; | 647 | priv->msg_rx_ring.rx_slot = 0; |
578 | for (i = 0; i < msg_rx_ring.size; i++) | 648 | for (i = 0; i < priv->msg_rx_ring.size; i++) |
579 | msg_rx_ring.virt_buffer[i] = NULL; | 649 | priv->msg_rx_ring.virt_buffer[i] = NULL; |
580 | 650 | ||
581 | /* Initialize inbound message ring */ | 651 | /* Initialize inbound message ring */ |
582 | if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL, | 652 | priv->msg_rx_ring.virt = dma_alloc_coherent(NULL, |
583 | msg_rx_ring.size * | 653 | priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE, |
584 | RIO_MAX_MSG_SIZE, | 654 | &priv->msg_rx_ring.phys, GFP_KERNEL); |
585 | &msg_rx_ring.phys, | 655 | if (!priv->msg_rx_ring.virt) { |
586 | GFP_KERNEL))) { | ||
587 | rc = -ENOMEM; | 656 | rc = -ENOMEM; |
588 | goto out; | 657 | goto out; |
589 | } | 658 | } |
590 | 659 | ||
591 | /* Point dequeue/enqueue pointers at first entry in ring */ | 660 | /* Point dequeue/enqueue pointers at first entry in ring */ |
592 | out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys); | 661 | out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys); |
593 | out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys); | 662 | out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys); |
594 | 663 | ||
595 | /* Clear interrupt status */ | 664 | /* Clear interrupt status */ |
596 | out_be32((void *)&msg_regs->isr, 0x00000091); | 665 | out_be32(&priv->msg_regs->isr, 0x00000091); |
597 | 666 | ||
598 | /* Hook up inbound message handler */ | 667 | /* Hook up inbound message handler */ |
599 | if ((rc = | 668 | rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0, |
600 | request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0, | 669 | "msg_rx", (void *)mport); |
601 | "msg_rx", (void *)mport)) < 0) { | 670 | if (rc < 0) { |
602 | dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE, | 671 | dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE, |
603 | msg_tx_ring.virt_buffer[i], | 672 | priv->msg_tx_ring.virt_buffer[i], |
604 | msg_tx_ring.phys_buffer[i]); | 673 | priv->msg_tx_ring.phys_buffer[i]); |
605 | goto out; | 674 | goto out; |
606 | } | 675 | } |
607 | 676 | ||
@@ -612,15 +681,13 @@ int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entri | |||
612 | * Unmask all interrupt sources | 681 | * Unmask all interrupt sources |
613 | * Disable | 682 | * Disable |
614 | */ | 683 | */ |
615 | out_be32((void *)&msg_regs->imr, 0x001b0060); | 684 | out_be32(&priv->msg_regs->imr, 0x001b0060); |
616 | 685 | ||
617 | /* Set number of queue entries */ | 686 | /* Set number of queue entries */ |
618 | out_be32((void *)&msg_regs->imr, | 687 | setbits32(&priv->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12); |
619 | in_be32((void *)&msg_regs->imr) | | ||
620 | ((get_bitmask_order(entries) - 2) << 12)); | ||
621 | 688 | ||
622 | /* Now enable the unit */ | 689 | /* Now enable the unit */ |
623 | out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1); | 690 | setbits32(&priv->msg_regs->imr, 0x1); |
624 | 691 | ||
625 | out: | 692 | out: |
626 | return rc; | 693 | return rc; |
@@ -636,15 +703,16 @@ int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entri | |||
636 | */ | 703 | */ |
637 | void rio_close_inb_mbox(struct rio_mport *mport, int mbox) | 704 | void rio_close_inb_mbox(struct rio_mport *mport, int mbox) |
638 | { | 705 | { |
706 | struct rio_priv *priv = mport->priv; | ||
639 | /* Disable inbound message unit */ | 707 | /* Disable inbound message unit */ |
640 | out_be32((void *)&msg_regs->imr, 0); | 708 | out_be32(&priv->msg_regs->imr, 0); |
641 | 709 | ||
642 | /* Free ring */ | 710 | /* Free ring */ |
643 | dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE, | 711 | dma_free_coherent(NULL, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE, |
644 | msg_rx_ring.virt, msg_rx_ring.phys); | 712 | priv->msg_rx_ring.virt, priv->msg_rx_ring.phys); |
645 | 713 | ||
646 | /* Free interrupt */ | 714 | /* Free interrupt */ |
647 | free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport); | 715 | free_irq(IRQ_RIO_RX(mport), (void *)mport); |
648 | } | 716 | } |
649 | 717 | ||
650 | /** | 718 | /** |
@@ -659,21 +727,22 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox) | |||
659 | int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) | 727 | int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) |
660 | { | 728 | { |
661 | int rc = 0; | 729 | int rc = 0; |
730 | struct rio_priv *priv = mport->priv; | ||
662 | 731 | ||
663 | pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", | 732 | pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", |
664 | msg_rx_ring.rx_slot); | 733 | priv->msg_rx_ring.rx_slot); |
665 | 734 | ||
666 | if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) { | 735 | if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) { |
667 | printk(KERN_ERR | 736 | printk(KERN_ERR |
668 | "RIO: error adding inbound buffer %d, buffer exists\n", | 737 | "RIO: error adding inbound buffer %d, buffer exists\n", |
669 | msg_rx_ring.rx_slot); | 738 | priv->msg_rx_ring.rx_slot); |
670 | rc = -EINVAL; | 739 | rc = -EINVAL; |
671 | goto out; | 740 | goto out; |
672 | } | 741 | } |
673 | 742 | ||
674 | msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf; | 743 | priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf; |
675 | if (++msg_rx_ring.rx_slot == msg_rx_ring.size) | 744 | if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size) |
676 | msg_rx_ring.rx_slot = 0; | 745 | priv->msg_rx_ring.rx_slot = 0; |
677 | 746 | ||
678 | out: | 747 | out: |
679 | return rc; | 748 | return rc; |
@@ -691,20 +760,21 @@ EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer); | |||
691 | */ | 760 | */ |
692 | void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) | 761 | void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) |
693 | { | 762 | { |
694 | u32 imr; | 763 | struct rio_priv *priv = mport->priv; |
695 | u32 phys_buf, virt_buf; | 764 | u32 phys_buf, virt_buf; |
696 | void *buf = NULL; | 765 | void *buf = NULL; |
697 | int buf_idx; | 766 | int buf_idx; |
698 | 767 | ||
699 | phys_buf = in_be32((void *)&msg_regs->ifqdpar); | 768 | phys_buf = in_be32(&priv->msg_regs->ifqdpar); |
700 | 769 | ||
701 | /* If no more messages, then bail out */ | 770 | /* If no more messages, then bail out */ |
702 | if (phys_buf == in_be32((void *)&msg_regs->ifqepar)) | 771 | if (phys_buf == in_be32(&priv->msg_regs->ifqepar)) |
703 | goto out2; | 772 | goto out2; |
704 | 773 | ||
705 | virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys); | 774 | virt_buf = (u32) priv->msg_rx_ring.virt + (phys_buf |
706 | buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE; | 775 | - priv->msg_rx_ring.phys); |
707 | buf = msg_rx_ring.virt_buffer[buf_idx]; | 776 | buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE; |
777 | buf = priv->msg_rx_ring.virt_buffer[buf_idx]; | ||
708 | 778 | ||
709 | if (!buf) { | 779 | if (!buf) { |
710 | printk(KERN_ERR | 780 | printk(KERN_ERR |
@@ -716,11 +786,10 @@ void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) | |||
716 | memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE); | 786 | memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE); |
717 | 787 | ||
718 | /* Clear the available buffer */ | 788 | /* Clear the available buffer */ |
719 | msg_rx_ring.virt_buffer[buf_idx] = NULL; | 789 | priv->msg_rx_ring.virt_buffer[buf_idx] = NULL; |
720 | 790 | ||
721 | out1: | 791 | out1: |
722 | imr = in_be32((void *)&msg_regs->imr); | 792 | setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI); |
723 | out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI); | ||
724 | 793 | ||
725 | out2: | 794 | out2: |
726 | return buf; | 795 | return buf; |
@@ -729,7 +798,7 @@ void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) | |||
729 | EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); | 798 | EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); |
730 | 799 | ||
731 | /** | 800 | /** |
732 | * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler | 801 | * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler |
733 | * @irq: Linux interrupt number | 802 | * @irq: Linux interrupt number |
734 | * @dev_instance: Pointer to interrupt-specific data | 803 | * @dev_instance: Pointer to interrupt-specific data |
735 | * | 804 | * |
@@ -737,31 +806,31 @@ EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); | |||
737 | * doorbell event handlers and executes a matching event handler. | 806 | * doorbell event handlers and executes a matching event handler. |
738 | */ | 807 | */ |
739 | static irqreturn_t | 808 | static irqreturn_t |
740 | mpc85xx_rio_dbell_handler(int irq, void *dev_instance) | 809 | fsl_rio_dbell_handler(int irq, void *dev_instance) |
741 | { | 810 | { |
742 | int dsr; | 811 | int dsr; |
743 | struct rio_mport *port = (struct rio_mport *)dev_instance; | 812 | struct rio_mport *port = (struct rio_mport *)dev_instance; |
813 | struct rio_priv *priv = port->priv; | ||
744 | 814 | ||
745 | dsr = in_be32((void *)&msg_regs->dsr); | 815 | dsr = in_be32(&priv->msg_regs->dsr); |
746 | 816 | ||
747 | if (dsr & DOORBELL_DSR_TE) { | 817 | if (dsr & DOORBELL_DSR_TE) { |
748 | pr_info("RIO: doorbell reception error\n"); | 818 | pr_info("RIO: doorbell reception error\n"); |
749 | out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE); | 819 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE); |
750 | goto out; | 820 | goto out; |
751 | } | 821 | } |
752 | 822 | ||
753 | if (dsr & DOORBELL_DSR_QFI) { | 823 | if (dsr & DOORBELL_DSR_QFI) { |
754 | pr_info("RIO: doorbell queue full\n"); | 824 | pr_info("RIO: doorbell queue full\n"); |
755 | out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI); | 825 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI); |
756 | goto out; | 826 | goto out; |
757 | } | 827 | } |
758 | 828 | ||
759 | /* XXX Need to check/dispatch until queue empty */ | 829 | /* XXX Need to check/dispatch until queue empty */ |
760 | if (dsr & DOORBELL_DSR_DIQI) { | 830 | if (dsr & DOORBELL_DSR_DIQI) { |
761 | u32 dmsg = | 831 | u32 dmsg = |
762 | (u32) dbell_ring.virt + | 832 | (u32) priv->dbell_ring.virt + |
763 | (in_be32((void *)&msg_regs->dqdpar) & 0xfff); | 833 | (in_be32(&priv->msg_regs->dqdpar) & 0xfff); |
764 | u32 dmr; | ||
765 | struct rio_dbell *dbell; | 834 | struct rio_dbell *dbell; |
766 | int found = 0; | 835 | int found = 0; |
767 | 836 | ||
@@ -784,9 +853,8 @@ mpc85xx_rio_dbell_handler(int irq, void *dev_instance) | |||
784 | ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n", | 853 | ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n", |
785 | DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); | 854 | DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); |
786 | } | 855 | } |
787 | dmr = in_be32((void *)&msg_regs->dmr); | 856 | setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI); |
788 | out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI); | 857 | out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI); |
789 | out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI); | ||
790 | } | 858 | } |
791 | 859 | ||
792 | out: | 860 | out: |
@@ -794,21 +862,22 @@ mpc85xx_rio_dbell_handler(int irq, void *dev_instance) | |||
794 | } | 862 | } |
795 | 863 | ||
796 | /** | 864 | /** |
797 | * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init | 865 | * fsl_rio_doorbell_init - MPC85xx doorbell interface init |
798 | * @mport: Master port implementing the inbound doorbell unit | 866 | * @mport: Master port implementing the inbound doorbell unit |
799 | * | 867 | * |
800 | * Initializes doorbell unit hardware and inbound DMA buffer | 868 | * Initializes doorbell unit hardware and inbound DMA buffer |
801 | * ring. Called from mpc85xx_rio_setup(). Returns %0 on success | 869 | * ring. Called from fsl_rio_setup(). Returns %0 on success |
802 | * or %-ENOMEM on failure. | 870 | * or %-ENOMEM on failure. |
803 | */ | 871 | */ |
804 | static int mpc85xx_rio_doorbell_init(struct rio_mport *mport) | 872 | static int fsl_rio_doorbell_init(struct rio_mport *mport) |
805 | { | 873 | { |
874 | struct rio_priv *priv = mport->priv; | ||
806 | int rc = 0; | 875 | int rc = 0; |
807 | 876 | ||
808 | /* Map outbound doorbell window immediately after maintenance window */ | 877 | /* Map outbound doorbell window immediately after maintenance window */ |
809 | if (!(dbell_win = | 878 | priv->dbell_win = ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE, |
810 | (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE, | 879 | RIO_DBELL_WIN_SIZE); |
811 | RIO_DBELL_WIN_SIZE))) { | 880 | if (!priv->dbell_win) { |
812 | printk(KERN_ERR | 881 | printk(KERN_ERR |
813 | "RIO: unable to map outbound doorbell window\n"); | 882 | "RIO: unable to map outbound doorbell window\n"); |
814 | rc = -ENOMEM; | 883 | rc = -ENOMEM; |
@@ -816,37 +885,36 @@ static int mpc85xx_rio_doorbell_init(struct rio_mport *mport) | |||
816 | } | 885 | } |
817 | 886 | ||
818 | /* Initialize inbound doorbells */ | 887 | /* Initialize inbound doorbells */ |
819 | if (!(dbell_ring.virt = dma_alloc_coherent(NULL, | 888 | priv->dbell_ring.virt = dma_alloc_coherent(NULL, 512 * |
820 | 512 * DOORBELL_MESSAGE_SIZE, | 889 | DOORBELL_MESSAGE_SIZE, &priv->dbell_ring.phys, GFP_KERNEL); |
821 | &dbell_ring.phys, | 890 | if (!priv->dbell_ring.virt) { |
822 | GFP_KERNEL))) { | ||
823 | printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n"); | 891 | printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n"); |
824 | rc = -ENOMEM; | 892 | rc = -ENOMEM; |
825 | iounmap((void *)dbell_win); | 893 | iounmap(priv->dbell_win); |
826 | goto out; | 894 | goto out; |
827 | } | 895 | } |
828 | 896 | ||
829 | /* Point dequeue/enqueue pointers at first entry in ring */ | 897 | /* Point dequeue/enqueue pointers at first entry in ring */ |
830 | out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys); | 898 | out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys); |
831 | out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys); | 899 | out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys); |
832 | 900 | ||
833 | /* Clear interrupt status */ | 901 | /* Clear interrupt status */ |
834 | out_be32((void *)&msg_regs->dsr, 0x00000091); | 902 | out_be32(&priv->msg_regs->dsr, 0x00000091); |
835 | 903 | ||
836 | /* Hook up doorbell handler */ | 904 | /* Hook up doorbell handler */ |
837 | if ((rc = | 905 | rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0, |
838 | request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0, | 906 | "dbell_rx", (void *)mport); |
839 | "dbell_rx", (void *)mport) < 0)) { | 907 | if (rc < 0) { |
840 | iounmap((void *)dbell_win); | 908 | iounmap(priv->dbell_win); |
841 | dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE, | 909 | dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE, |
842 | dbell_ring.virt, dbell_ring.phys); | 910 | priv->dbell_ring.virt, priv->dbell_ring.phys); |
843 | printk(KERN_ERR | 911 | printk(KERN_ERR |
844 | "MPC85xx RIO: unable to request inbound doorbell irq"); | 912 | "MPC85xx RIO: unable to request inbound doorbell irq"); |
845 | goto out; | 913 | goto out; |
846 | } | 914 | } |
847 | 915 | ||
848 | /* Configure doorbells for snooping, 512 entries, and enable */ | 916 | /* Configure doorbells for snooping, 512 entries, and enable */ |
849 | out_be32((void *)&msg_regs->dmr, 0x00108161); | 917 | out_be32(&priv->msg_regs->dmr, 0x00108161); |
850 | 918 | ||
851 | out: | 919 | out: |
852 | return rc; | 920 | return rc; |
@@ -854,7 +922,7 @@ static int mpc85xx_rio_doorbell_init(struct rio_mport *mport) | |||
854 | 922 | ||
855 | static char *cmdline = NULL; | 923 | static char *cmdline = NULL; |
856 | 924 | ||
857 | static int mpc85xx_rio_get_hdid(int index) | 925 | static int fsl_rio_get_hdid(int index) |
858 | { | 926 | { |
859 | /* XXX Need to parse multiple entries in some format */ | 927 | /* XXX Need to parse multiple entries in some format */ |
860 | if (!cmdline) | 928 | if (!cmdline) |
@@ -863,7 +931,7 @@ static int mpc85xx_rio_get_hdid(int index) | |||
863 | return simple_strtol(cmdline, NULL, 0); | 931 | return simple_strtol(cmdline, NULL, 0); |
864 | } | 932 | } |
865 | 933 | ||
866 | static int mpc85xx_rio_get_cmdline(char *s) | 934 | static int fsl_rio_get_cmdline(char *s) |
867 | { | 935 | { |
868 | if (!s) | 936 | if (!s) |
869 | return 0; | 937 | return 0; |
@@ -872,61 +940,266 @@ static int mpc85xx_rio_get_cmdline(char *s) | |||
872 | return 1; | 940 | return 1; |
873 | } | 941 | } |
874 | 942 | ||
875 | __setup("riohdid=", mpc85xx_rio_get_cmdline); | 943 | __setup("riohdid=", fsl_rio_get_cmdline); |
944 | |||
945 | static inline void fsl_rio_info(struct device *dev, u32 ccsr) | ||
946 | { | ||
947 | const char *str; | ||
948 | if (ccsr & 1) { | ||
949 | /* Serial phy */ | ||
950 | switch (ccsr >> 30) { | ||
951 | case 0: | ||
952 | str = "1"; | ||
953 | break; | ||
954 | case 1: | ||
955 | str = "4"; | ||
956 | break; | ||
957 | default: | ||
958 | str = "Unknown"; | ||
959 | break;; | ||
960 | } | ||
961 | dev_info(dev, "Hardware port width: %s\n", str); | ||
962 | |||
963 | switch ((ccsr >> 27) & 7) { | ||
964 | case 0: | ||
965 | str = "Single-lane 0"; | ||
966 | break; | ||
967 | case 1: | ||
968 | str = "Single-lane 2"; | ||
969 | break; | ||
970 | case 2: | ||
971 | str = "Four-lane"; | ||
972 | break; | ||
973 | default: | ||
974 | str = "Unknown"; | ||
975 | break; | ||
976 | } | ||
977 | dev_info(dev, "Training connection status: %s\n", str); | ||
978 | } else { | ||
979 | /* Parallel phy */ | ||
980 | if (!(ccsr & 0x80000000)) | ||
981 | dev_info(dev, "Output port operating in 8-bit mode\n"); | ||
982 | if (!(ccsr & 0x08000000)) | ||
983 | dev_info(dev, "Input port operating in 8-bit mode\n"); | ||
984 | } | ||
985 | } | ||
876 | 986 | ||
877 | /** | 987 | /** |
878 | * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface | 988 | * fsl_rio_setup - Setup MPC85xx RapidIO interface |
879 | * @law_start: Starting physical address of RapidIO LAW | 989 | * @fsl_rio_setup - Setup Freescale PowerPC RapidIO interface |
880 | * @law_size: Size of RapidIO LAW | ||
881 | * | 990 | * |
882 | * Initializes MPC85xx RapidIO hardware interface, configures | 991 | * Initializes MPC85xx RapidIO hardware interface, configures |
883 | * master port with system-specific info, and registers the | 992 | * master port with system-specific info, and registers the |
884 | * master port with the RapidIO subsystem. | 993 | * master port with the RapidIO subsystem. |
885 | */ | 994 | */ |
886 | void mpc85xx_rio_setup(int law_start, int law_size) | 995 | int fsl_rio_setup(struct of_device *dev) |
887 | { | 996 | { |
888 | struct rio_ops *ops; | 997 | struct rio_ops *ops; |
889 | struct rio_mport *port; | 998 | struct rio_mport *port; |
999 | struct rio_priv *priv; | ||
1000 | int rc = 0; | ||
1001 | const u32 *dt_range, *cell; | ||
1002 | struct resource regs; | ||
1003 | int rlen; | ||
1004 | u32 ccsr; | ||
1005 | u64 law_start, law_size; | ||
1006 | int paw, aw, sw; | ||
1007 | |||
1008 | if (!dev->node) { | ||
1009 | dev_err(&dev->dev, "Device OF-Node is NULL"); | ||
1010 | return -EFAULT; | ||
1011 | } | ||
1012 | |||
1013 | rc = of_address_to_resource(dev->node, 0, ®s); | ||
1014 | if (rc) { | ||
1015 | dev_err(&dev->dev, "Can't get %s property 'reg'\n", | ||
1016 | dev->node->full_name); | ||
1017 | return -EFAULT; | ||
1018 | } | ||
1019 | dev_info(&dev->dev, "Of-device full name %s\n", dev->node->full_name); | ||
1020 | dev_info(&dev->dev, "Regs start 0x%08x size 0x%08x\n", regs.start, | ||
1021 | regs.end - regs.start + 1); | ||
1022 | |||
1023 | dt_range = of_get_property(dev->node, "ranges", &rlen); | ||
1024 | if (!dt_range) { | ||
1025 | dev_err(&dev->dev, "Can't get %s property 'ranges'\n", | ||
1026 | dev->node->full_name); | ||
1027 | return -EFAULT; | ||
1028 | } | ||
1029 | |||
1030 | /* Get node address wide */ | ||
1031 | cell = of_get_property(dev->node, "#address-cells", NULL); | ||
1032 | if (cell) | ||
1033 | aw = *cell; | ||
1034 | else | ||
1035 | aw = of_n_addr_cells(dev->node); | ||
1036 | /* Get node size wide */ | ||
1037 | cell = of_get_property(dev->node, "#size-cells", NULL); | ||
1038 | if (cell) | ||
1039 | sw = *cell; | ||
1040 | else | ||
1041 | sw = of_n_size_cells(dev->node); | ||
1042 | /* Get parent address wide wide */ | ||
1043 | paw = of_n_addr_cells(dev->node); | ||
1044 | |||
1045 | law_start = of_read_number(dt_range + aw, paw); | ||
1046 | law_size = of_read_number(dt_range + aw + paw, sw); | ||
1047 | |||
1048 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", | ||
1049 | law_start, law_size); | ||
890 | 1050 | ||
891 | ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL); | 1051 | ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL); |
892 | ops->lcread = mpc85xx_local_config_read; | 1052 | ops->lcread = fsl_local_config_read; |
893 | ops->lcwrite = mpc85xx_local_config_write; | 1053 | ops->lcwrite = fsl_local_config_write; |
894 | ops->cread = mpc85xx_rio_config_read; | 1054 | ops->cread = fsl_rio_config_read; |
895 | ops->cwrite = mpc85xx_rio_config_write; | 1055 | ops->cwrite = fsl_rio_config_write; |
896 | ops->dsend = mpc85xx_rio_doorbell_send; | 1056 | ops->dsend = fsl_rio_doorbell_send; |
897 | 1057 | ||
898 | port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL); | 1058 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); |
899 | port->id = 0; | 1059 | port->id = 0; |
900 | port->index = 0; | 1060 | port->index = 0; |
1061 | |||
1062 | priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL); | ||
1063 | if (!priv) { | ||
1064 | printk(KERN_ERR "Can't alloc memory for 'priv'\n"); | ||
1065 | rc = -ENOMEM; | ||
1066 | goto err; | ||
1067 | } | ||
1068 | |||
901 | INIT_LIST_HEAD(&port->dbells); | 1069 | INIT_LIST_HEAD(&port->dbells); |
902 | port->iores.start = law_start; | 1070 | port->iores.start = law_start; |
903 | port->iores.end = law_start + law_size; | 1071 | port->iores.end = law_start + law_size; |
904 | port->iores.flags = IORESOURCE_MEM; | 1072 | port->iores.flags = IORESOURCE_MEM; |
905 | 1073 | ||
1074 | priv->bellirq = irq_of_parse_and_map(dev->node, 2); | ||
1075 | priv->txirq = irq_of_parse_and_map(dev->node, 3); | ||
1076 | priv->rxirq = irq_of_parse_and_map(dev->node, 4); | ||
1077 | dev_info(&dev->dev, "bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq, | ||
1078 | priv->txirq, priv->rxirq); | ||
1079 | |||
906 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); | 1080 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); |
907 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); | 1081 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); |
908 | rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0); | 1082 | rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0); |
909 | strcpy(port->name, "RIO0 mport"); | 1083 | strcpy(port->name, "RIO0 mport"); |
910 | 1084 | ||
911 | port->ops = ops; | 1085 | port->ops = ops; |
912 | port->host_deviceid = mpc85xx_rio_get_hdid(port->id); | 1086 | port->host_deviceid = fsl_rio_get_hdid(port->id); |
913 | 1087 | ||
1088 | port->priv = priv; | ||
914 | rio_register_mport(port); | 1089 | rio_register_mport(port); |
915 | 1090 | ||
916 | regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000); | 1091 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); |
917 | atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET); | 1092 | |
918 | maint_atmu_regs = atmu_regs + 1; | 1093 | /* Probe the master port phy type */ |
919 | dbell_atmu_regs = atmu_regs + 2; | 1094 | ccsr = in_be32(priv->regs_win + RIO_CCSR); |
920 | msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET); | 1095 | port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL; |
1096 | dev_info(&dev->dev, "RapidIO PHY type: %s\n", | ||
1097 | (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" : | ||
1098 | ((port->phy_type == RIO_PHY_SERIAL) ? "serial" : | ||
1099 | "unknown")); | ||
1100 | /* Checking the port training status */ | ||
1101 | if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) { | ||
1102 | dev_err(&dev->dev, "Port is not ready. " | ||
1103 | "Try to restart connection...\n"); | ||
1104 | switch (port->phy_type) { | ||
1105 | case RIO_PHY_SERIAL: | ||
1106 | /* Disable ports */ | ||
1107 | out_be32(priv->regs_win + RIO_CCSR, 0); | ||
1108 | /* Set 1x lane */ | ||
1109 | setbits32(priv->regs_win + RIO_CCSR, 0x02000000); | ||
1110 | /* Enable ports */ | ||
1111 | setbits32(priv->regs_win + RIO_CCSR, 0x00600000); | ||
1112 | break; | ||
1113 | case RIO_PHY_PARALLEL: | ||
1114 | /* Disable ports */ | ||
1115 | out_be32(priv->regs_win + RIO_CCSR, 0x22000000); | ||
1116 | /* Enable ports */ | ||
1117 | out_be32(priv->regs_win + RIO_CCSR, 0x44000000); | ||
1118 | break; | ||
1119 | } | ||
1120 | msleep(100); | ||
1121 | if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) { | ||
1122 | dev_err(&dev->dev, "Port restart failed.\n"); | ||
1123 | rc = -ENOLINK; | ||
1124 | goto err; | ||
1125 | } | ||
1126 | dev_info(&dev->dev, "Port restart success!\n"); | ||
1127 | } | ||
1128 | fsl_rio_info(&dev->dev, ccsr); | ||
1129 | |||
1130 | port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR)) | ||
1131 | & RIO_PEF_CTLS) >> 4; | ||
1132 | dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n", | ||
1133 | port->sys_size ? 65536 : 256); | ||
1134 | |||
1135 | priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win | ||
1136 | + RIO_ATMU_REGS_OFFSET); | ||
1137 | priv->maint_atmu_regs = priv->atmu_regs + 1; | ||
1138 | priv->dbell_atmu_regs = priv->atmu_regs + 2; | ||
1139 | priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win + | ||
1140 | ((port->phy_type == RIO_PHY_SERIAL) ? | ||
1141 | RIO_S_MSG_REGS_OFFSET : RIO_P_MSG_REGS_OFFSET)); | ||
1142 | |||
1143 | /* Set to receive any dist ID for serial RapidIO controller. */ | ||
1144 | if (port->phy_type == RIO_PHY_SERIAL) | ||
1145 | out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA); | ||
921 | 1146 | ||
922 | /* Configure maintenance transaction window */ | 1147 | /* Configure maintenance transaction window */ |
923 | out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000); | 1148 | out_be32(&priv->maint_atmu_regs->rowbar, 0x000c0000); |
924 | out_be32((void *)&maint_atmu_regs->rowar, 0x80077015); | 1149 | out_be32(&priv->maint_atmu_regs->rowar, 0x80077015); |
925 | 1150 | ||
926 | maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE); | 1151 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); |
927 | 1152 | ||
928 | /* Configure outbound doorbell window */ | 1153 | /* Configure outbound doorbell window */ |
929 | out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400); | 1154 | out_be32(&priv->dbell_atmu_regs->rowbar, 0x000c0400); |
930 | out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b); | 1155 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); |
931 | mpc85xx_rio_doorbell_init(port); | 1156 | fsl_rio_doorbell_init(port); |
1157 | |||
1158 | return 0; | ||
1159 | err: | ||
1160 | if (priv) | ||
1161 | iounmap(priv->regs_win); | ||
1162 | kfree(ops); | ||
1163 | kfree(priv); | ||
1164 | kfree(port); | ||
1165 | return rc; | ||
1166 | } | ||
1167 | |||
1168 | /* The probe function for RapidIO peer-to-peer network. | ||
1169 | */ | ||
1170 | static int __devinit fsl_of_rio_rpn_probe(struct of_device *dev, | ||
1171 | const struct of_device_id *match) | ||
1172 | { | ||
1173 | int rc; | ||
1174 | printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", | ||
1175 | dev->node->full_name); | ||
1176 | |||
1177 | rc = fsl_rio_setup(dev); | ||
1178 | if (rc) | ||
1179 | goto out; | ||
1180 | |||
1181 | /* Enumerate all registered ports */ | ||
1182 | rc = rio_init_mports(); | ||
1183 | out: | ||
1184 | return rc; | ||
1185 | }; | ||
1186 | |||
1187 | static const struct of_device_id fsl_of_rio_rpn_ids[] = { | ||
1188 | { | ||
1189 | .compatible = "fsl,rapidio-delta", | ||
1190 | }, | ||
1191 | {}, | ||
1192 | }; | ||
1193 | |||
1194 | static struct of_platform_driver fsl_of_rio_rpn_driver = { | ||
1195 | .name = "fsl-of-rio", | ||
1196 | .match_table = fsl_of_rio_rpn_ids, | ||
1197 | .probe = fsl_of_rio_rpn_probe, | ||
1198 | }; | ||
1199 | |||
1200 | static __init int fsl_of_rio_rpn_init(void) | ||
1201 | { | ||
1202 | return of_register_platform_driver(&fsl_of_rio_rpn_driver); | ||
932 | } | 1203 | } |
1204 | |||
1205 | subsys_initcall(fsl_of_rio_rpn_init); | ||
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h deleted file mode 100644 index 6d3ff30b1579..000000000000 --- a/arch/powerpc/sysdev/fsl_rio.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * MPC85xx RapidIO definitions | ||
3 | * | ||
4 | * Copyright 2005 MontaVista Software, Inc. | ||
5 | * Matt Porter <mporter@kernel.crashing.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef __PPC_SYSLIB_PPC85XX_RIO_H | ||
14 | #define __PPC_SYSLIB_PPC85XX_RIO_H | ||
15 | |||
16 | #include <linux/init.h> | ||
17 | |||
18 | extern void mpc85xx_rio_setup(int law_start, int law_size); | ||
19 | |||
20 | #endif /* __PPC_SYSLIB_PPC85XX_RIO_H */ | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 7b45670c7af3..324c01b70ddd 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -418,22 +418,21 @@ arch_initcall(gfar_of_init); | |||
418 | #include <linux/i2c.h> | 418 | #include <linux/i2c.h> |
419 | struct i2c_driver_device { | 419 | struct i2c_driver_device { |
420 | char *of_device; | 420 | char *of_device; |
421 | char *i2c_driver; | ||
422 | char *i2c_type; | 421 | char *i2c_type; |
423 | }; | 422 | }; |
424 | 423 | ||
425 | static struct i2c_driver_device i2c_devices[] __initdata = { | 424 | static struct i2c_driver_device i2c_devices[] __initdata = { |
426 | {"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",}, | 425 | {"ricoh,rs5c372a", "rs5c372a"}, |
427 | {"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",}, | 426 | {"ricoh,rs5c372b", "rs5c372b"}, |
428 | {"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",}, | 427 | {"ricoh,rv5c386", "rv5c386"}, |
429 | {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",}, | 428 | {"ricoh,rv5c387a", "rv5c387a"}, |
430 | {"dallas,ds1307", "rtc-ds1307", "ds1307",}, | 429 | {"dallas,ds1307", "ds1307"}, |
431 | {"dallas,ds1337", "rtc-ds1307", "ds1337",}, | 430 | {"dallas,ds1337", "ds1337"}, |
432 | {"dallas,ds1338", "rtc-ds1307", "ds1338",}, | 431 | {"dallas,ds1338", "ds1338"}, |
433 | {"dallas,ds1339", "rtc-ds1307", "ds1339",}, | 432 | {"dallas,ds1339", "ds1339"}, |
434 | {"dallas,ds1340", "rtc-ds1307", "ds1340",}, | 433 | {"dallas,ds1340", "ds1340"}, |
435 | {"stm,m41t00", "rtc-ds1307", "m41t00"}, | 434 | {"stm,m41t00", "m41t00"}, |
436 | {"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",}, | 435 | {"dallas,ds1374", "rtc-ds1374"}, |
437 | }; | 436 | }; |
438 | 437 | ||
439 | static int __init of_find_i2c_driver(struct device_node *node, | 438 | static int __init of_find_i2c_driver(struct device_node *node, |
@@ -444,9 +443,7 @@ static int __init of_find_i2c_driver(struct device_node *node, | |||
444 | for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) { | 443 | for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) { |
445 | if (!of_device_is_compatible(node, i2c_devices[i].of_device)) | 444 | if (!of_device_is_compatible(node, i2c_devices[i].of_device)) |
446 | continue; | 445 | continue; |
447 | if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver, | 446 | if (strlcpy(info->type, i2c_devices[i].i2c_type, |
448 | KOBJ_NAME_LEN) >= KOBJ_NAME_LEN || | ||
449 | strlcpy(info->type, i2c_devices[i].i2c_type, | ||
450 | I2C_NAME_SIZE) >= I2C_NAME_SIZE) | 447 | I2C_NAME_SIZE) >= I2C_NAME_SIZE) |
451 | return -ENOMEM; | 448 | return -ENOMEM; |
452 | return 0; | 449 | return 0; |