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Diffstat (limited to 'arch/powerpc/sysdev/ppc4xx_pci.c')
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index fb368dfde5d4..9f6f73d584d6 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -30,14 +30,12 @@
30#include <asm/machdep.h> 30#include <asm/machdep.h>
31#include <asm/dcr.h> 31#include <asm/dcr.h>
32#include <asm/dcr-regs.h> 32#include <asm/dcr-regs.h>
33#include <mm/mmu_decl.h>
33 34
34#include "ppc4xx_pci.h" 35#include "ppc4xx_pci.h"
35 36
36static int dma_offset_set; 37static int dma_offset_set;
37 38
38/* Move that to a useable header */
39extern unsigned long total_memory;
40
41#define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL)) 39#define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL))
42#define U64_TO_U32_HIGH(val) ((u32)((val) >> 32)) 40#define U64_TO_U32_HIGH(val) ((u32)((val) >> 32))
43 41
@@ -105,7 +103,8 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
105 103
106 /* Default */ 104 /* Default */
107 res->start = 0; 105 res->start = 0;
108 res->end = size = 0x80000000; 106 size = 0x80000000;
107 res->end = size - 1;
109 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; 108 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
110 109
111 /* Get dma-ranges property */ 110 /* Get dma-ranges property */
@@ -167,13 +166,13 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
167 */ 166 */
168 if (size < total_memory) { 167 if (size < total_memory) {
169 printk(KERN_ERR "%s: dma-ranges too small " 168 printk(KERN_ERR "%s: dma-ranges too small "
170 "(size=%llx total_memory=%lx)\n", 169 "(size=%llx total_memory=%llx)\n",
171 hose->dn->full_name, size, total_memory); 170 hose->dn->full_name, size, (u64)total_memory);
172 return -ENXIO; 171 return -ENXIO;
173 } 172 }
174 173
175 /* Check we are a power of 2 size and that base is a multiple of size*/ 174 /* Check we are a power of 2 size and that base is a multiple of size*/
176 if (!is_power_of_2(size) || 175 if ((size & (size - 1)) != 0 ||
177 (res->start & (size - 1)) != 0) { 176 (res->start & (size - 1)) != 0) {
178 printk(KERN_ERR "%s: dma-ranges unaligned\n", 177 printk(KERN_ERR "%s: dma-ranges unaligned\n",
179 hose->dn->full_name); 178 hose->dn->full_name);
@@ -277,9 +276,16 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
277 const int *bus_range; 276 const int *bus_range;
278 int primary = 0; 277 int primary = 0;
279 278
279 /* Check if device is enabled */
280 if (!of_device_is_available(np)) {
281 printk(KERN_INFO "%s: Port disabled via device-tree\n",
282 np->full_name);
283 return;
284 }
285
280 /* Fetch config space registers address */ 286 /* Fetch config space registers address */
281 if (of_address_to_resource(np, 0, &rsrc_cfg)) { 287 if (of_address_to_resource(np, 0, &rsrc_cfg)) {
282 printk(KERN_ERR "%s:Can't get PCI config register base !", 288 printk(KERN_ERR "%s: Can't get PCI config register base !",
283 np->full_name); 289 np->full_name);
284 return; 290 return;
285 } 291 }
@@ -810,7 +816,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
810 switch (port->index) { 816 switch (port->index) {
811 case 0: 817 case 0:
812 mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230); 818 mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230);
813 mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136); 819 mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
814 mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); 820 mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
815 821
816 mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000); 822 mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000);
@@ -821,10 +827,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
821 mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230); 827 mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230);
822 mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230); 828 mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230);
823 mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230); 829 mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230);
824 mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136); 830 mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130);
825 mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136); 831 mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130);
826 mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136); 832 mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130);
827 mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136); 833 mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130);
828 mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006); 834 mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006);
829 mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006); 835 mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006);
830 mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006); 836 mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006);