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Diffstat (limited to 'arch/powerpc/sysdev/mv64x60_pic.c')
-rw-r--r--arch/powerpc/sysdev/mv64x60_pic.c12
1 files changed, 2 insertions, 10 deletions
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index 01d316287772..19e6ef263797 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -202,11 +202,6 @@ static struct irq_chip mv64x60_chip_gpp = {
202 * mv64x60_host_ops functions 202 * mv64x60_host_ops functions
203 */ 203 */
204 204
205static int mv64x60_host_match(struct irq_host *h, struct device_node *np)
206{
207 return mv64x60_irq_host->host_data == np;
208}
209
210static struct irq_chip *mv64x60_chips[] = { 205static struct irq_chip *mv64x60_chips[] = {
211 [MV64x60_LEVEL1_LOW] = &mv64x60_chip_low, 206 [MV64x60_LEVEL1_LOW] = &mv64x60_chip_low,
212 [MV64x60_LEVEL1_HIGH] = &mv64x60_chip_high, 207 [MV64x60_LEVEL1_HIGH] = &mv64x60_chip_high,
@@ -228,7 +223,6 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
228} 223}
229 224
230static struct irq_host_ops mv64x60_host_ops = { 225static struct irq_host_ops mv64x60_host_ops = {
231 .match = mv64x60_host_match,
232 .map = mv64x60_host_map, 226 .map = mv64x60_host_map,
233}; 227};
234 228
@@ -253,14 +247,12 @@ void __init mv64x60_init_irq(void)
253 np = of_find_compatible_node(NULL, NULL, "marvell,mv64x60-pic"); 247 np = of_find_compatible_node(NULL, NULL, "marvell,mv64x60-pic");
254 reg = of_get_property(np, "reg", &size); 248 reg = of_get_property(np, "reg", &size);
255 paddr = of_translate_address(np, reg); 249 paddr = of_translate_address(np, reg);
256 of_node_put(np);
257 mv64x60_irq_reg_base = ioremap(paddr, reg[1]); 250 mv64x60_irq_reg_base = ioremap(paddr, reg[1]);
258 251
259 mv64x60_irq_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, MV64x60_NUM_IRQS, 252 mv64x60_irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
253 MV64x60_NUM_IRQS,
260 &mv64x60_host_ops, MV64x60_NUM_IRQS); 254 &mv64x60_host_ops, MV64x60_NUM_IRQS);
261 255
262 mv64x60_irq_host->host_data = np;
263
264 spin_lock_irqsave(&mv64x60_lock, flags); 256 spin_lock_irqsave(&mv64x60_lock, flags);
265 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK, 257 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
266 mv64x60_cached_gpp_mask); 258 mv64x60_cached_gpp_mask);