diff options
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.c')
-rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 53 |
1 files changed, 32 insertions, 21 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 3b61e8cf3421..6073288fed29 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -205,12 +205,12 @@ static void __init setup_pci_atmu(struct pci_controller *hose, | |||
205 | 205 | ||
206 | if (paddr_hi == paddr_lo) { | 206 | if (paddr_hi == paddr_lo) { |
207 | pr_err("%s: No outbound window space\n", name); | 207 | pr_err("%s: No outbound window space\n", name); |
208 | return ; | 208 | goto out; |
209 | } | 209 | } |
210 | 210 | ||
211 | if (paddr_lo == 0) { | 211 | if (paddr_lo == 0) { |
212 | pr_err("%s: No space for inbound window\n", name); | 212 | pr_err("%s: No space for inbound window\n", name); |
213 | return ; | 213 | goto out; |
214 | } | 214 | } |
215 | 215 | ||
216 | /* setup PCSRBAR/PEXCSRBAR */ | 216 | /* setup PCSRBAR/PEXCSRBAR */ |
@@ -357,6 +357,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose, | |||
357 | (u64)hose->dma_window_size); | 357 | (u64)hose->dma_window_size); |
358 | } | 358 | } |
359 | 359 | ||
360 | out: | ||
360 | iounmap(pci); | 361 | iounmap(pci); |
361 | } | 362 | } |
362 | 363 | ||
@@ -384,26 +385,36 @@ static void __init setup_pci_cmd(struct pci_controller *hose) | |||
384 | void fsl_pcibios_fixup_bus(struct pci_bus *bus) | 385 | void fsl_pcibios_fixup_bus(struct pci_bus *bus) |
385 | { | 386 | { |
386 | struct pci_controller *hose = pci_bus_to_host(bus); | 387 | struct pci_controller *hose = pci_bus_to_host(bus); |
387 | int i; | 388 | int i, is_pcie = 0, no_link; |
388 | 389 | ||
389 | if ((bus->parent == hose->bus) && | 390 | /* The root complex bridge comes up with bogus resources, |
390 | ((fsl_pcie_bus_fixup && | 391 | * we copy the PHB ones in. |
391 | early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) || | 392 | * |
392 | (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK))) | 393 | * With the current generic PCI code, the PHB bus no longer |
393 | { | 394 | * has bus->resource[0..4] set, so things are a bit more |
394 | for (i = 0; i < 4; ++i) { | 395 | * tricky. |
396 | */ | ||
397 | |||
398 | if (fsl_pcie_bus_fixup) | ||
399 | is_pcie = early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP); | ||
400 | no_link = !!(hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK); | ||
401 | |||
402 | if (bus->parent == hose->bus && (is_pcie || no_link)) { | ||
403 | for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; ++i) { | ||
395 | struct resource *res = bus->resource[i]; | 404 | struct resource *res = bus->resource[i]; |
396 | struct resource *par = bus->parent->resource[i]; | 405 | struct resource *par; |
397 | if (res) { | 406 | |
398 | res->start = 0; | 407 | if (!res) |
399 | res->end = 0; | 408 | continue; |
400 | res->flags = 0; | 409 | if (i == 0) |
401 | } | 410 | par = &hose->io_resource; |
402 | if (res && par) { | 411 | else if (i < 4) |
403 | res->start = par->start; | 412 | par = &hose->mem_resources[i-1]; |
404 | res->end = par->end; | 413 | else par = NULL; |
405 | res->flags = par->flags; | 414 | |
406 | } | 415 | res->start = par ? par->start : 0; |
416 | res->end = par ? par->end : 0; | ||
417 | res->flags = par ? par->flags : 0; | ||
407 | } | 418 | } |
408 | } | 419 | } |
409 | } | 420 | } |