diff options
Diffstat (limited to 'arch/powerpc/sysdev/fsl_msi.h')
-rw-r--r-- | arch/powerpc/sysdev/fsl_msi.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h index 50ec4b04c732..420cfcbdac01 100644 --- a/arch/powerpc/sysdev/fsl_msi.h +++ b/arch/powerpc/sysdev/fsl_msi.h | |||
@@ -15,7 +15,6 @@ | |||
15 | 15 | ||
16 | #include <linux/of.h> | 16 | #include <linux/of.h> |
17 | #include <asm/msi_bitmap.h> | 17 | #include <asm/msi_bitmap.h> |
18 | #include <asm/atomic.h> | ||
19 | 18 | ||
20 | #define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */ | 19 | #define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */ |
21 | #define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */ | 20 | #define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */ |
@@ -28,8 +27,6 @@ | |||
28 | #define FSL_PIC_IP_IPIC 0x00000002 | 27 | #define FSL_PIC_IP_IPIC 0x00000002 |
29 | #define FSL_PIC_IP_VMPIC 0x00000003 | 28 | #define FSL_PIC_IP_VMPIC 0x00000003 |
30 | 29 | ||
31 | #define FSL_PIC_FTR_MPIC_4_3 0x00000010 | ||
32 | |||
33 | struct fsl_msi_cascade_data; | 30 | struct fsl_msi_cascade_data; |
34 | 31 | ||
35 | struct fsl_msi { | 32 | struct fsl_msi { |
@@ -40,8 +37,6 @@ struct fsl_msi { | |||
40 | u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */ | 37 | u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */ |
41 | u32 ibs_shift; /* Shift of interrupt bit select */ | 38 | u32 ibs_shift; /* Shift of interrupt bit select */ |
42 | u32 srs_shift; /* Shift of the shared interrupt register select */ | 39 | u32 srs_shift; /* Shift of the shared interrupt register select */ |
43 | u32 msir_num; /* Number of available MSIR regs */ | ||
44 | atomic_t msi_alloc_cnt; /* Counter for MSI hwirq allocations */ | ||
45 | void __iomem *msi_regs; | 40 | void __iomem *msi_regs; |
46 | u32 feature; | 41 | u32 feature; |
47 | struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX]; | 42 | struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX]; |