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Diffstat (limited to 'arch/powerpc/sysdev/dart_iommu.c')
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c19
1 files changed, 15 insertions, 4 deletions
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 4f2680f431b5..bd968a43a48b 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -43,7 +43,6 @@
43#include <asm/iommu.h> 43#include <asm/iommu.h>
44#include <asm/pci-bridge.h> 44#include <asm/pci-bridge.h>
45#include <asm/machdep.h> 45#include <asm/machdep.h>
46#include <asm/abs_addr.h>
47#include <asm/cacheflush.h> 46#include <asm/cacheflush.h>
48#include <asm/ppc-pci.h> 47#include <asm/ppc-pci.h>
49 48
@@ -74,11 +73,16 @@ static int dart_is_u4;
74 73
75#define DBG(...) 74#define DBG(...)
76 75
76static DEFINE_SPINLOCK(invalidate_lock);
77
77static inline void dart_tlb_invalidate_all(void) 78static inline void dart_tlb_invalidate_all(void)
78{ 79{
79 unsigned long l = 0; 80 unsigned long l = 0;
80 unsigned int reg, inv_bit; 81 unsigned int reg, inv_bit;
81 unsigned long limit; 82 unsigned long limit;
83 unsigned long flags;
84
85 spin_lock_irqsave(&invalidate_lock, flags);
82 86
83 DBG("dart: flush\n"); 87 DBG("dart: flush\n");
84 88
@@ -111,12 +115,17 @@ retry:
111 panic("DART: TLB did not flush after waiting a long " 115 panic("DART: TLB did not flush after waiting a long "
112 "time. Buggy U3 ?"); 116 "time. Buggy U3 ?");
113 } 117 }
118
119 spin_unlock_irqrestore(&invalidate_lock, flags);
114} 120}
115 121
116static inline void dart_tlb_invalidate_one(unsigned long bus_rpn) 122static inline void dart_tlb_invalidate_one(unsigned long bus_rpn)
117{ 123{
118 unsigned int reg; 124 unsigned int reg;
119 unsigned int l, limit; 125 unsigned int l, limit;
126 unsigned long flags;
127
128 spin_lock_irqsave(&invalidate_lock, flags);
120 129
121 reg = DART_CNTL_U4_ENABLE | DART_CNTL_U4_IONE | 130 reg = DART_CNTL_U4_ENABLE | DART_CNTL_U4_IONE |
122 (bus_rpn & DART_CNTL_U4_IONE_MASK); 131 (bus_rpn & DART_CNTL_U4_IONE_MASK);
@@ -138,6 +147,8 @@ wait_more:
138 panic("DART: TLB did not flush after waiting a long " 147 panic("DART: TLB did not flush after waiting a long "
139 "time. Buggy U4 ?"); 148 "time. Buggy U4 ?");
140 } 149 }
150
151 spin_unlock_irqrestore(&invalidate_lock, flags);
141} 152}
142 153
143static void dart_flush(struct iommu_table *tbl) 154static void dart_flush(struct iommu_table *tbl)
@@ -167,7 +178,7 @@ static int dart_build(struct iommu_table *tbl, long index,
167 */ 178 */
168 l = npages; 179 l = npages;
169 while (l--) { 180 while (l--) {
170 rpn = virt_to_abs(uaddr) >> DART_PAGE_SHIFT; 181 rpn = __pa(uaddr) >> DART_PAGE_SHIFT;
171 182
172 *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK); 183 *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK);
173 184
@@ -244,7 +255,7 @@ static int __init dart_init(struct device_node *dart_node)
244 panic("DART: Cannot map registers!"); 255 panic("DART: Cannot map registers!");
245 256
246 /* Map in DART table */ 257 /* Map in DART table */
247 dart_vbase = ioremap(virt_to_abs(dart_tablebase), dart_tablesize); 258 dart_vbase = ioremap(__pa(dart_tablebase), dart_tablesize);
248 259
249 /* Fill initial table */ 260 /* Fill initial table */
250 for (i = 0; i < dart_tablesize/4; i++) 261 for (i = 0; i < dart_tablesize/4; i++)
@@ -463,7 +474,7 @@ void __init alloc_dart_table(void)
463 * will blow up an entire large page anyway in the kernel mapping 474 * will blow up an entire large page anyway in the kernel mapping
464 */ 475 */
465 dart_tablebase = (unsigned long) 476 dart_tablebase = (unsigned long)
466 abs_to_virt(memblock_alloc_base(1UL<<24, 1UL<<24, 0x80000000L)); 477 __va(memblock_alloc_base(1UL<<24, 1UL<<24, 0x80000000L));
467 478
468 printk(KERN_INFO "DART table allocated at: %lx\n", dart_tablebase); 479 printk(KERN_INFO "DART table allocated at: %lx\n", dart_tablebase);
469} 480}