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-rw-r--r--arch/powerpc/sysdev/cpm2_common.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index f7a04892400b..73376f9c1560 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -51,6 +51,7 @@ cpm_cpm2_t *cpmp; /* Pointer to comm processor space */
51 * the communication processor devices. 51 * the communication processor devices.
52 */ 52 */
53cpm2_map_t *cpm2_immr; 53cpm2_map_t *cpm2_immr;
54intctl_cpm2_t *cpm2_intctl;
54 55
55#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount 56#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
56 of space for CPM as it is larger 57 of space for CPM as it is larger
@@ -60,6 +61,7 @@ void
60cpm2_reset(void) 61cpm2_reset(void)
61{ 62{
62 cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); 63 cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
64 cpm2_intctl = cpm2_map(im_intctl);
63 65
64 /* Reclaim the DP memory for our use. 66 /* Reclaim the DP memory for our use.
65 */ 67 */
@@ -94,13 +96,15 @@ cpm_setbrg(uint brg, uint rate)
94 /* This is good enough to get SMCs running..... 96 /* This is good enough to get SMCs running.....
95 */ 97 */
96 if (brg < 4) { 98 if (brg < 4) {
97 bp = (uint *)&cpm2_immr->im_brgc1; 99 bp = cpm2_map_size(im_brgc1, 16);
98 } else { 100 } else {
99 bp = (uint *)&cpm2_immr->im_brgc5; 101 bp = cpm2_map_size(im_brgc5, 16);
100 brg -= 4; 102 brg -= 4;
101 } 103 }
102 bp += brg; 104 bp += brg;
103 *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; 105 *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
106
107 cpm2_unmap(bp);
104} 108}
105 109
106/* This function is used to set high speed synchronous baud rate 110/* This function is used to set high speed synchronous baud rate
@@ -112,16 +116,18 @@ cpm2_fastbrg(uint brg, uint rate, int div16)
112 volatile uint *bp; 116 volatile uint *bp;
113 117
114 if (brg < 4) { 118 if (brg < 4) {
115 bp = (uint *)&cpm2_immr->im_brgc1; 119 bp = cpm2_map_size(im_brgc1, 16);
116 } 120 }
117 else { 121 else {
118 bp = (uint *)&cpm2_immr->im_brgc5; 122 bp = cpm2_map_size(im_brgc5, 16);
119 brg -= 4; 123 brg -= 4;
120 } 124 }
121 bp += brg; 125 bp += brg;
122 *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; 126 *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
123 if (div16) 127 if (div16)
124 *bp |= CPM_BRG_DIV16; 128 *bp |= CPM_BRG_DIV16;
129
130 cpm2_unmap(bp);
125} 131}
126 132
127/* 133/*
@@ -132,11 +138,14 @@ static spinlock_t cpm_dpmem_lock;
132 * until the memory subsystem goes up... */ 138 * until the memory subsystem goes up... */
133static rh_block_t cpm_boot_dpmem_rh_block[16]; 139static rh_block_t cpm_boot_dpmem_rh_block[16];
134static rh_info_t cpm_dpmem_info; 140static rh_info_t cpm_dpmem_info;
141static u8* im_dprambase;
135 142
136static void cpm2_dpinit(void) 143static void cpm2_dpinit(void)
137{ 144{
138 spin_lock_init(&cpm_dpmem_lock); 145 spin_lock_init(&cpm_dpmem_lock);
139 146
147 im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
148
140 /* initialize the info header */ 149 /* initialize the info header */
141 rh_init(&cpm_dpmem_info, 1, 150 rh_init(&cpm_dpmem_info, 1,
142 sizeof(cpm_boot_dpmem_rh_block) / 151 sizeof(cpm_boot_dpmem_rh_block) /
@@ -205,6 +214,6 @@ EXPORT_SYMBOL(cpm_dpdump);
205 214
206void *cpm_dpram_addr(uint offset) 215void *cpm_dpram_addr(uint offset)
207{ 216{
208 return (void *)&cpm2_immr->im_dprambase[offset]; 217 return (void *)(im_dprambase + offset);
209} 218}
210EXPORT_SYMBOL(cpm_dpram_addr); 219EXPORT_SYMBOL(cpm_dpram_addr);