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-rw-r--r--arch/powerpc/sysdev/cpm2.c103
1 files changed, 6 insertions, 97 deletions
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index fa70ee31349e..5a6c5dfc53ef 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -46,10 +46,6 @@
46 46
47#include <sysdev/fsl_soc.h> 47#include <sysdev/fsl_soc.h>
48 48
49#ifndef CONFIG_PPC_CPM_NEW_BINDING
50static void cpm2_dpinit(void);
51#endif
52
53cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */ 49cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
54 50
55/* We allocate this here because it is used almost exclusively for 51/* We allocate this here because it is used almost exclusively for
@@ -71,15 +67,17 @@ void __init cpm2_reset(void)
71 67
72 /* Reclaim the DP memory for our use. 68 /* Reclaim the DP memory for our use.
73 */ 69 */
74#ifdef CONFIG_PPC_CPM_NEW_BINDING
75 cpm_muram_init(); 70 cpm_muram_init();
76#else
77 cpm2_dpinit();
78#endif
79 71
80 /* Tell everyone where the comm processor resides. 72 /* Tell everyone where the comm processor resides.
81 */ 73 */
82 cpmp = &cpm2_immr->im_cpm; 74 cpmp = &cpm2_immr->im_cpm;
75
76#ifndef CONFIG_PPC_EARLY_DEBUG_CPM
77 /* Reset the CPM.
78 */
79 cpm_command(CPM_CR_RST, 0);
80#endif
83} 81}
84 82
85static DEFINE_SPINLOCK(cmd_lock); 83static DEFINE_SPINLOCK(cmd_lock);
@@ -347,95 +345,6 @@ int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
347 return ret; 345 return ret;
348} 346}
349 347
350#ifndef CONFIG_PPC_CPM_NEW_BINDING
351/*
352 * dpalloc / dpfree bits.
353 */
354static spinlock_t cpm_dpmem_lock;
355/* 16 blocks should be enough to satisfy all requests
356 * until the memory subsystem goes up... */
357static rh_block_t cpm_boot_dpmem_rh_block[16];
358static rh_info_t cpm_dpmem_info;
359static u8 __iomem *im_dprambase;
360
361static void cpm2_dpinit(void)
362{
363 spin_lock_init(&cpm_dpmem_lock);
364
365 /* initialize the info header */
366 rh_init(&cpm_dpmem_info, 1,
367 sizeof(cpm_boot_dpmem_rh_block) /
368 sizeof(cpm_boot_dpmem_rh_block[0]),
369 cpm_boot_dpmem_rh_block);
370
371 im_dprambase = cpm2_immr;
372
373 /* Attach the usable dpmem area */
374 /* XXX: This is actually crap. CPM_DATAONLY_BASE and
375 * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
376 * varies with the processor and the microcode patches activated.
377 * But the following should be at least safe.
378 */
379 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
380}
381
382/* This function returns an index into the DPRAM area.
383 */
384unsigned long cpm_dpalloc(uint size, uint align)
385{
386 unsigned long start;
387 unsigned long flags;
388
389 spin_lock_irqsave(&cpm_dpmem_lock, flags);
390 cpm_dpmem_info.alignment = align;
391 start = rh_alloc(&cpm_dpmem_info, size, "commproc");
392 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
393
394 return (uint)start;
395}
396EXPORT_SYMBOL(cpm_dpalloc);
397
398int cpm_dpfree(unsigned long offset)
399{
400 int ret;
401 unsigned long flags;
402
403 spin_lock_irqsave(&cpm_dpmem_lock, flags);
404 ret = rh_free(&cpm_dpmem_info, offset);
405 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
406
407 return ret;
408}
409EXPORT_SYMBOL(cpm_dpfree);
410
411/* not sure if this is ever needed */
412unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
413{
414 unsigned long start;
415 unsigned long flags;
416
417 spin_lock_irqsave(&cpm_dpmem_lock, flags);
418 cpm_dpmem_info.alignment = align;
419 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
420 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
421
422 return start;
423}
424EXPORT_SYMBOL(cpm_dpalloc_fixed);
425
426void cpm_dpdump(void)
427{
428 rh_dump(&cpm_dpmem_info);
429}
430EXPORT_SYMBOL(cpm_dpdump);
431
432void *cpm_dpram_addr(unsigned long offset)
433{
434 return (void *)(im_dprambase + offset);
435}
436EXPORT_SYMBOL(cpm_dpram_addr);
437#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
438
439struct cpm2_ioports { 348struct cpm2_ioports {
440 u32 dir, par, sor, odr, dat; 349 u32 dir, par, sor, odr, dat;
441 u32 res[3]; 350 u32 res[3];