1 files changed, 13 insertions, 13 deletions

diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 00852124ff4a..350787c83e22 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -56,32 +56,32 @@ static cpic8xx_t __iomem *cpic_reg;
 
 static struct irq_host *cpm_pic_host;
 
-static void cpm_mask_irq(unsigned int irq)
+static void cpm_mask_irq(struct irq_data *d)
 {
-        unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
 
         clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec));
 }
 
-static void cpm_unmask_irq(unsigned int irq)
+static void cpm_unmask_irq(struct irq_data *d)
 {
-        unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
 
         setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec));
 }
 
-static void cpm_end_irq(unsigned int irq)
+static void cpm_end_irq(struct irq_data *d)
 {
-        unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
 
         out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec));
 }
 
 static struct irq_chip cpm_pic = {
         .name = "CPM PIC",
-        .mask = cpm_mask_irq,
-        .unmask = cpm_unmask_irq,
-        .eoi = cpm_end_irq,
+        .irq_mask = cpm_mask_irq,
+        .irq_unmask = cpm_unmask_irq,
+        .irq_eoi = cpm_end_irq,
 };
 
 int cpm_get_irq(void)
@@ -103,8 +103,8 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
 {
         pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
 
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
-        set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
+        irq_set_status_flags(virq, IRQ_LEVEL);
+        irq_set_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
         return 0;
 }
 
@@ -157,7 +157,7 @@ unsigned int cpm_pic_init(void)
                 goto end;
 
         /* Initialize the CPM interrupt controller. */
-        hwirq = (unsigned int)irq_map[sirq].hwirq;
+        hwirq = (unsigned int)virq_to_hw(sirq);
         out_be32(&cpic_reg->cpic_cicr,
             (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
                 ((hwirq/2) << 13) | CICR_HP_MASK);
@@ -223,7 +223,7 @@ void __init cpm_reset(void)
 
         /* Set SDMA Bus Request priority 5.
          * On 860T, this also enables FEC priority 6.  I am not sure
-         * this is what we realy want for some applications, but the
+         * this is what we really want for some applications, but the
          * manual recommends it.
          * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
          */