11 files changed, 173 insertions, 32 deletions

diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index 426814a2ede3..eba9cb10619c 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -373,7 +373,7 @@ static int ioda_eeh_get_pe_state(struct eeh_pe *pe)
          * moving forward, we have to return operational
          * state during PE reset.
          */
-        if (pe->state & EEH_PE_RESET) {
+        if (pe->state & EEH_PE_CFG_BLOCKED) {
                 result = (EEH_STATE_MMIO_ACTIVE  |
                           EEH_STATE_DMA_ACTIVE   |
                           EEH_STATE_MMIO_ENABLED |
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 3e89cbf55885..1d19e7917d7f 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -169,6 +169,26 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
         }
 
         /*
+         * If the PE contains any one of following adapters, the
+         * PCI config space can't be accessed when dumping EEH log.
+         * Otherwise, we will run into fenced PHB caused by shortage
+         * of outbound credits in the adapter. The PCI config access
+         * should be blocked until PE reset. MMIO access is dropped
+         * by hardware certainly. In order to drop PCI config requests,
+         * one more flag (EEH_PE_CFG_RESTRICTED) is introduced, which
+         * will be checked in the backend for PE state retrival. If
+         * the PE becomes frozen for the first time and the flag has
+         * been set for the PE, we will set EEH_PE_CFG_BLOCKED for
+         * that PE to block its config space.
+         *
+         * Broadcom Austin 4-ports NICs (14e4:1657)
+         * Broadcom Shiner 2-ports 10G NICs (14e4:168e)
+         */
+        if ((dev->vendor == PCI_VENDOR_ID_BROADCOM && dev->device == 0x1657) ||
+            (dev->vendor == PCI_VENDOR_ID_BROADCOM && dev->device == 0x168e))
+                edev->pe->state |= EEH_PE_CFG_RESTRICTED;
+
+        /*
          * Cache the PE primary bus, which can't be fetched when
          * full hotplug is in progress. In that case, all child
          * PCI devices of the PE are expected to be removed prior
@@ -383,6 +403,39 @@ static int powernv_eeh_err_inject(struct eeh_pe *pe, int type, int func,
         return ret;
 }
 
+static inline bool powernv_eeh_cfg_blocked(struct device_node *dn)
+{
+        struct eeh_dev *edev = of_node_to_eeh_dev(dn);
+
+        if (!edev || !edev->pe)
+                return false;
+
+        if (edev->pe->state & EEH_PE_CFG_BLOCKED)
+                return true;
+
+        return false;
+}
+
+static int powernv_eeh_read_config(struct device_node *dn,
+                                   int where, int size, u32 *val)
+{
+        if (powernv_eeh_cfg_blocked(dn)) {
+                *val = 0xFFFFFFFF;
+                return PCIBIOS_SET_FAILED;
+        }
+
+        return pnv_pci_cfg_read(dn, where, size, val);
+}
+
+static int powernv_eeh_write_config(struct device_node *dn,
+                                    int where, int size, u32 val)
+{
+        if (powernv_eeh_cfg_blocked(dn))
+                return PCIBIOS_SET_FAILED;
+
+        return pnv_pci_cfg_write(dn, where, size, val);
+}
+
 /**
  * powernv_eeh_next_error - Retrieve next EEH error to handle
  * @pe: Affected PE
@@ -440,8 +493,8 @@ static struct eeh_ops powernv_eeh_ops = {
         .get_log                = powernv_eeh_get_log,
         .configure_bridge       = powernv_eeh_configure_bridge,
         .err_inject             = powernv_eeh_err_inject,
-        .read_config            = pnv_pci_cfg_read,
-        .write_config           = pnv_pci_cfg_write,
+        .read_config            = powernv_eeh_read_config,
+        .write_config           = powernv_eeh_write_config,
         .next_error             = powernv_eeh_next_error,
         .restore_config         = powernv_eeh_restore_config
 };
diff --git a/arch/powerpc/platforms/powernv/opal-lpc.c b/arch/powerpc/platforms/powernv/opal-lpc.c
index dd2c285ad170..e4169d68cb32 100644
--- a/arch/powerpc/platforms/powernv/opal-lpc.c
+++ b/arch/powerpc/platforms/powernv/opal-lpc.c
@@ -191,7 +191,6 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
 {
         struct lpc_debugfs_entry *lpc = filp->private_data;
         u32 data, pos, len, todo;
-        __be32 bedata;
         int rc;
 
         if (!access_ok(VERIFY_WRITE, ubuf, count))
@@ -214,18 +213,57 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
                                 len = 2;
                 }
                 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
-                                   &bedata, len);
+                                   &data, len);
                 if (rc)
                         return -ENXIO;
-                data = be32_to_cpu(bedata);
+
+                /*
+                 * Now there is some trickery with the data returned by OPAL
+                 * as it's the desired data right justified in a 32-bit BE
+                 * word.
+                 *
+                 * This is a very bad interface and I'm to blame for it :-(
+                 *
+                 * So we can't just apply a 32-bit swap to what comes from OPAL,
+                 * because user space expects the *bytes* to be in their proper
+                 * respective positions (ie, LPC position).
+                 *
+                 * So what we really want to do here is to shift data right
+                 * appropriately on a LE kernel.
+                 *
+                 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that
+                 * order, we have in memory written to by OPAL at the "data"
+                 * pointer:
+                 *
+                 *               Bytes:      OPAL "data"   LE "data"
+                 *   32-bit:   B0 B1 B2 B3   B0B1B2B3      B3B2B1B0
+                 *   16-bit:   B0 B1         0000B0B1      B1B00000
+                 *    8-bit:   B0            000000B0      B0000000
+                 *
+                 * So a BE kernel will have the leftmost of the above in the MSB
+                 * and rightmost in the LSB and can just then "cast" the u32 "data"
+                 * down to the appropriate quantity and write it.
+                 *
+                 * However, an LE kernel can't. It doesn't need to swap because a
+                 * load from data followed by a store to user are going to preserve
+                 * the byte ordering which is the wire byte order which is what the
+                 * user wants, but in order to "crop" to the right size, we need to
+                 * shift right first.
+                 */
                 switch(len) {
                 case 4:
                         rc = __put_user((u32)data, (u32 __user *)ubuf);
                         break;
                 case 2:
+#ifdef __LITTLE_ENDIAN__
+                        data >>= 16;
+#endif
                         rc = __put_user((u16)data, (u16 __user *)ubuf);
                         break;
                 default:
+#ifdef __LITTLE_ENDIAN__
+                        data >>= 24;
+#endif
                         rc = __put_user((u8)data, (u8 __user *)ubuf);
                         break;
                 }
@@ -265,12 +303,31 @@ static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
                         else if (todo > 1 && (pos & 1) == 0)
                                 len = 2;
                 }
+
+                /*
+                 * Similarly to the read case, we have some trickery here but
+                 * it's different to handle. We need to pass the value to OPAL in
+                 * a register whose layout depends on the access size. We want
+                 * to reproduce the memory layout of the user, however we aren't
+                 * doing a load from user and a store to another memory location
+                 * which would achieve that. Here we pass the value to OPAL via
+                 * a register which is expected to contain the "BE" interpretation
+                 * of the byte sequence. IE: for a 32-bit access, byte 0 should be
+                 * in the MSB. So here we *do* need to byteswap on LE.
+                 *
+                 *           User bytes:    LE "data"  OPAL "data"
+                 *  32-bit:  B0 B1 B2 B3    B3B2B1B0   B0B1B2B3
+                 *  16-bit:  B0 B1          0000B1B0   0000B0B1
+                 *   8-bit:  B0             000000B0   000000B0
+                 */
                 switch(len) {
                 case 4:
                         rc = __get_user(data, (u32 __user *)ubuf);
+                        data = cpu_to_be32(data);
                         break;
                 case 2:
                         rc = __get_user(data, (u16 __user *)ubuf);
+                        data = cpu_to_be16(data);
                         break;
                 default:
                         rc = __get_user(data, (u8 __user *)ubuf);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index e9e2450c1fdd..feb549aa3eea 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -58,7 +58,7 @@ END_FTR_SECTION(0, 1);						\
  */
 
 #define OPAL_CALL(name, token)          \
- _GLOBAL(name);                         \
+ _GLOBAL_TOC(name);                     \
         mflr    r0;                     \
         std     r0,16(r1);              \
         li      r0,token;               \
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index b642b0562f5a..d019b081df9d 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -194,6 +194,27 @@ static int __init opal_register_exception_handlers(void)
          * fwnmi area at 0x7000 to provide the glue space to OPAL
          */
         glue = 0x7000;
+
+        /*
+         * Check if we are running on newer firmware that exports
+         * OPAL_HANDLE_HMI token. If yes, then don't ask OPAL to patch
+         * the HMI interrupt and we catch it directly in Linux.
+         *
+         * For older firmware (i.e currently released POWER8 System Firmware
+         * as of today <= SV810_087), we fallback to old behavior and let OPAL
+         * patch the HMI vector and handle it inside OPAL firmware.
+         *
+         * For newer firmware (in development/yet to be released) we will
+         * start catching/handling HMI directly in Linux.
+         */
+        if (!opal_check_token(OPAL_HANDLE_HMI)) {
+                pr_info("opal: Old firmware detected, OPAL handles HMIs.\n");
+                opal_register_exception_handler(
+                                OPAL_HYPERVISOR_MAINTENANCE_HANDLER,
+                                0, glue);
+                glue += 128;
+        }
+
         opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue);
 #endif
 
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index b3ca77ddf36d..b2187d0068b8 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -505,7 +505,7 @@ static bool pnv_pci_cfg_check(struct pci_controller *hose,
         edev = of_node_to_eeh_dev(dn);
         if (edev) {
                 if (edev->pe &&
-                    (edev->pe->state & EEH_PE_RESET))
+                    (edev->pe->state & EEH_PE_CFG_BLOCKED))
                         return false;
 
                 if (edev->mode & EEH_DEV_REMOVED)
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index fdf01b660d59..c22bb1b4beb8 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -25,11 +25,11 @@
 #include <asm/rtas.h>
 
 struct cc_workarea {
-        u32     drc_index;
-        u32     zero;
-        u32     name_offset;
-        u32     prop_length;
-        u32     prop_offset;
+        __be32  drc_index;
+        __be32  zero;
+        __be32  name_offset;
+        __be32  prop_length;
+        __be32  prop_offset;
 };
 
 void dlpar_free_cc_property(struct property *prop)
@@ -49,11 +49,11 @@ static struct property *dlpar_parse_cc_property(struct cc_workarea *ccwa)
         if (!prop)
                 return NULL;
 
-        name = (char *)ccwa + ccwa->name_offset;
+        name = (char *)ccwa + be32_to_cpu(ccwa->name_offset);
         prop->name = kstrdup(name, GFP_KERNEL);
 
-        prop->length = ccwa->prop_length;
-        value = (char *)ccwa + ccwa->prop_offset;
+        prop->length = be32_to_cpu(ccwa->prop_length);
+        value = (char *)ccwa + be32_to_cpu(ccwa->prop_offset);
         prop->value = kmemdup(value, prop->length, GFP_KERNEL);
         if (!prop->value) {
                 dlpar_free_cc_property(prop);
@@ -79,7 +79,7 @@ static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa,
         if (!dn)
                 return NULL;
 
-        name = (char *)ccwa + ccwa->name_offset;
+        name = (char *)ccwa + be32_to_cpu(ccwa->name_offset);
         dn->full_name = kasprintf(GFP_KERNEL, "%s/%s", path, name);
         if (!dn->full_name) {
                 kfree(dn);
@@ -126,7 +126,7 @@ void dlpar_free_cc_nodes(struct device_node *dn)
 #define CALL_AGAIN      -2
 #define ERR_CFG_USE     -9003
 
-struct device_node *dlpar_configure_connector(u32 drc_index,
+struct device_node *dlpar_configure_connector(__be32 drc_index,
                                               struct device_node *parent)
 {
         struct device_node *dn;
@@ -382,7 +382,7 @@ static int dlpar_online_cpu(struct device_node *dn)
                         BUG_ON(get_cpu_current_state(cpu)
                                         != CPU_STATE_OFFLINE);
                         cpu_maps_update_done();
-                        rc = cpu_up(cpu);
+                        rc = device_online(get_cpu_device(cpu));
                         if (rc)
                                 goto out;
                         cpu_maps_update_begin();
@@ -414,7 +414,7 @@ static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
         if (!parent)
                 return -ENODEV;
 
-        dn = dlpar_configure_connector(drc_index, parent);
+        dn = dlpar_configure_connector(cpu_to_be32(drc_index), parent);
         if (!dn)
                 return -EINVAL;
 
@@ -467,7 +467,7 @@ static int dlpar_offline_cpu(struct device_node *dn)
                         if (get_cpu_current_state(cpu) == CPU_STATE_ONLINE) {
                                 set_preferred_offline_state(cpu, CPU_STATE_OFFLINE);
                                 cpu_maps_update_done();
-                                rc = cpu_down(cpu);
+                                rc = device_offline(get_cpu_device(cpu));
                                 if (rc)
                                         goto out;
                                 cpu_maps_update_begin();
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index b174fa751d26..5c375f93c669 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -247,7 +247,7 @@ static int pseries_add_processor(struct device_node *np)
         unsigned int cpu;
         cpumask_var_t candidate_mask, tmp;
         int err = -ENOSPC, len, nthreads, i;
-        const u32 *intserv;
+        const __be32 *intserv;
 
         intserv = of_get_property(np, "ibm,ppc-interrupt-server#s", &len);
         if (!intserv)
@@ -293,7 +293,7 @@ static int pseries_add_processor(struct device_node *np)
         for_each_cpu(cpu, tmp) {
                 BUG_ON(cpu_present(cpu));
                 set_cpu_present(cpu, true);
-                set_hard_smp_processor_id(cpu, *intserv++);
+                set_hard_smp_processor_id(cpu, be32_to_cpu(*intserv++));
         }
         err = 0;
 out_unlock:
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index de1ec54a2a57..e32e00976a94 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -30,7 +30,6 @@
 #include <linux/mm.h>
 #include <linux/memblock.h>
 #include <linux/spinlock.h>
-#include <linux/sched.h>        /* for show_stack */
 #include <linux/string.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
@@ -168,7 +167,7 @@ static int tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
                         printk("\tindex   = 0x%llx\n", (u64)tbl->it_index);
                         printk("\ttcenum  = 0x%llx\n", (u64)tcenum);
                         printk("\ttce val = 0x%llx\n", tce );
-                        show_stack(current, (unsigned long *)__get_SP());
+                        dump_stack();
                 }
 
                 tcenum++;
@@ -257,7 +256,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
                 printk("\tindex   = 0x%llx\n", (u64)tbl->it_index);
                 printk("\tnpages  = 0x%llx\n", (u64)npages);
                 printk("\ttce[0] val = 0x%llx\n", tcep[0]);
-                show_stack(current, (unsigned long *)__get_SP());
+                dump_stack();
         }
         return ret;
 }
@@ -273,7 +272,7 @@ static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages
                         printk("tce_free_pSeriesLP: plpar_tce_put failed. rc=%lld\n", rc);
                         printk("\tindex   = 0x%llx\n", (u64)tbl->it_index);
                         printk("\ttcenum  = 0x%llx\n", (u64)tcenum);
-                        show_stack(current, (unsigned long *)__get_SP());
+                        dump_stack();
                 }
 
                 tcenum++;
@@ -292,7 +291,7 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
                 printk("\trc      = %lld\n", rc);
                 printk("\tindex   = 0x%llx\n", (u64)tbl->it_index);
                 printk("\tnpages  = 0x%llx\n", (u64)npages);
-                show_stack(current, (unsigned long *)__get_SP());
+                dump_stack();
         }
 }
 
@@ -307,7 +306,7 @@ static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
                 printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%lld\n", rc);
                 printk("\tindex   = 0x%llx\n", (u64)tbl->it_index);
                 printk("\ttcenum  = 0x%llx\n", (u64)tcenum);
-                show_stack(current, (unsigned long *)__get_SP());
+                dump_stack();
         }
 
         return tce_ret;
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 8c509d5397c6..f6880d2a40fb 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -43,6 +43,7 @@
 #include <asm/trace.h>
 #include <asm/firmware.h>
 #include <asm/plpar_wrappers.h>
+#include <asm/fadump.h>
 
 #include "pseries.h"
 
@@ -247,8 +248,17 @@ static void pSeries_lpar_hptab_clear(void)
         }
 
 #ifdef __LITTLE_ENDIAN__
-        /* Reset exceptions to big endian */
-        if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
+        /*
+         * Reset exceptions to big endian.
+         *
+         * FIXME this is a hack for kexec, we need to reset the exception
+         * endian before starting the new kernel and this is a convenient place
+         * to do it.
+         *
+         * This is also called on boot when a fadump happens. In that case we
+         * must not change the exception endian mode.
+         */
+        if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active()) {
                 long rc;
 
                 rc = pseries_big_endian_exceptions();
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 361add62abf1..1796c5438cc6 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -56,7 +56,8 @@ extern void hvc_vio_init_early(void);
 /* Dynamic logical Partitioning/Mobility */
 extern void dlpar_free_cc_nodes(struct device_node *);
 extern void dlpar_free_cc_property(struct property *);
-extern struct device_node *dlpar_configure_connector(u32, struct device_node *);
+extern struct device_node *dlpar_configure_connector(__be32,
+                                                struct device_node *);
 extern int dlpar_attach_node(struct device_node *);
 extern int dlpar_detach_node(struct device_node *);