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-rw-r--r--arch/powerpc/platforms/pseries/xics.c718
1 files changed, 429 insertions, 289 deletions
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 2ffebe31cb2d..716972aa9777 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -8,6 +8,9 @@
8 * as published by the Free Software Foundation; either version 8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11
12#undef DEBUG
13
11#include <linux/types.h> 14#include <linux/types.h>
12#include <linux/threads.h> 15#include <linux/threads.h>
13#include <linux/kernel.h> 16#include <linux/kernel.h>
@@ -19,6 +22,7 @@
19#include <linux/gfp.h> 22#include <linux/gfp.h>
20#include <linux/radix-tree.h> 23#include <linux/radix-tree.h>
21#include <linux/cpu.h> 24#include <linux/cpu.h>
25
22#include <asm/firmware.h> 26#include <asm/firmware.h>
23#include <asm/prom.h> 27#include <asm/prom.h>
24#include <asm/io.h> 28#include <asm/io.h>
@@ -31,26 +35,6 @@
31 35
32#include "xics.h" 36#include "xics.h"
33 37
34static unsigned int xics_startup(unsigned int irq);
35static void xics_enable_irq(unsigned int irq);
36static void xics_disable_irq(unsigned int irq);
37static void xics_mask_and_ack_irq(unsigned int irq);
38static void xics_end_irq(unsigned int irq);
39static void xics_set_affinity(unsigned int irq_nr, cpumask_t cpumask);
40
41static struct hw_interrupt_type xics_pic = {
42 .typename = " XICS ",
43 .startup = xics_startup,
44 .enable = xics_enable_irq,
45 .disable = xics_disable_irq,
46 .ack = xics_mask_and_ack_irq,
47 .end = xics_end_irq,
48 .set_affinity = xics_set_affinity
49};
50
51/* This is used to map real irq numbers to virtual */
52static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
53
54#define XICS_IPI 2 38#define XICS_IPI 2
55#define XICS_IRQ_SPURIOUS 0 39#define XICS_IRQ_SPURIOUS 0
56 40
@@ -81,12 +65,12 @@ struct xics_ipl {
81 65
82static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS]; 66static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
83 67
84static int xics_irq_8259_cascade = 0;
85static int xics_irq_8259_cascade_real = 0;
86static unsigned int default_server = 0xFF; 68static unsigned int default_server = 0xFF;
87static unsigned int default_distrib_server = 0; 69static unsigned int default_distrib_server = 0;
88static unsigned int interrupt_server_size = 8; 70static unsigned int interrupt_server_size = 8;
89 71
72static struct irq_host *xics_host;
73
90/* 74/*
91 * XICS only has a single IPI, so encode the messages per CPU 75 * XICS only has a single IPI, so encode the messages per CPU
92 */ 76 */
@@ -98,48 +82,34 @@ static int ibm_set_xive;
98static int ibm_int_on; 82static int ibm_int_on;
99static int ibm_int_off; 83static int ibm_int_off;
100 84
101typedef struct {
102 int (*xirr_info_get)(int cpu);
103 void (*xirr_info_set)(int cpu, int val);
104 void (*cppr_info)(int cpu, u8 val);
105 void (*qirr_info)(int cpu, u8 val);
106} xics_ops;
107 85
86/* Direct HW low level accessors */
108 87
109/* SMP */
110 88
111static int pSeries_xirr_info_get(int n_cpu) 89static inline unsigned int direct_xirr_info_get(int n_cpu)
112{ 90{
113 return in_be32(&xics_per_cpu[n_cpu]->xirr.word); 91 return in_be32(&xics_per_cpu[n_cpu]->xirr.word);
114} 92}
115 93
116static void pSeries_xirr_info_set(int n_cpu, int value) 94static inline void direct_xirr_info_set(int n_cpu, int value)
117{ 95{
118 out_be32(&xics_per_cpu[n_cpu]->xirr.word, value); 96 out_be32(&xics_per_cpu[n_cpu]->xirr.word, value);
119} 97}
120 98
121static void pSeries_cppr_info(int n_cpu, u8 value) 99static inline void direct_cppr_info(int n_cpu, u8 value)
122{ 100{
123 out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value); 101 out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value);
124} 102}
125 103
126static void pSeries_qirr_info(int n_cpu, u8 value) 104static inline void direct_qirr_info(int n_cpu, u8 value)
127{ 105{
128 out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value); 106 out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
129} 107}
130 108
131static xics_ops pSeries_ops = {
132 pSeries_xirr_info_get,
133 pSeries_xirr_info_set,
134 pSeries_cppr_info,
135 pSeries_qirr_info
136};
137 109
138static xics_ops *ops = &pSeries_ops; 110/* LPAR low level accessors */
139 111
140 112
141/* LPAR */
142
143static inline long plpar_eoi(unsigned long xirr) 113static inline long plpar_eoi(unsigned long xirr)
144{ 114{
145 return plpar_hcall_norets(H_EOI, xirr); 115 return plpar_hcall_norets(H_EOI, xirr);
@@ -161,7 +131,7 @@ static inline long plpar_xirr(unsigned long *xirr_ret)
161 return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy); 131 return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy);
162} 132}
163 133
164static int pSeriesLP_xirr_info_get(int n_cpu) 134static inline unsigned int lpar_xirr_info_get(int n_cpu)
165{ 135{
166 unsigned long lpar_rc; 136 unsigned long lpar_rc;
167 unsigned long return_value; 137 unsigned long return_value;
@@ -169,10 +139,10 @@ static int pSeriesLP_xirr_info_get(int n_cpu)
169 lpar_rc = plpar_xirr(&return_value); 139 lpar_rc = plpar_xirr(&return_value);
170 if (lpar_rc != H_SUCCESS) 140 if (lpar_rc != H_SUCCESS)
171 panic(" bad return code xirr - rc = %lx \n", lpar_rc); 141 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
172 return (int)return_value; 142 return (unsigned int)return_value;
173} 143}
174 144
175static void pSeriesLP_xirr_info_set(int n_cpu, int value) 145static inline void lpar_xirr_info_set(int n_cpu, int value)
176{ 146{
177 unsigned long lpar_rc; 147 unsigned long lpar_rc;
178 unsigned long val64 = value & 0xffffffff; 148 unsigned long val64 = value & 0xffffffff;
@@ -183,7 +153,7 @@ static void pSeriesLP_xirr_info_set(int n_cpu, int value)
183 val64); 153 val64);
184} 154}
185 155
186void pSeriesLP_cppr_info(int n_cpu, u8 value) 156static inline void lpar_cppr_info(int n_cpu, u8 value)
187{ 157{
188 unsigned long lpar_rc; 158 unsigned long lpar_rc;
189 159
@@ -192,7 +162,7 @@ void pSeriesLP_cppr_info(int n_cpu, u8 value)
192 panic("bad return code cppr - rc = %lx\n", lpar_rc); 162 panic("bad return code cppr - rc = %lx\n", lpar_rc);
193} 163}
194 164
195static void pSeriesLP_qirr_info(int n_cpu , u8 value) 165static inline void lpar_qirr_info(int n_cpu , u8 value)
196{ 166{
197 unsigned long lpar_rc; 167 unsigned long lpar_rc;
198 168
@@ -201,43 +171,16 @@ static void pSeriesLP_qirr_info(int n_cpu , u8 value)
201 panic("bad return code qirr - rc = %lx\n", lpar_rc); 171 panic("bad return code qirr - rc = %lx\n", lpar_rc);
202} 172}
203 173
204xics_ops pSeriesLP_ops = {
205 pSeriesLP_xirr_info_get,
206 pSeriesLP_xirr_info_set,
207 pSeriesLP_cppr_info,
208 pSeriesLP_qirr_info
209};
210
211static unsigned int xics_startup(unsigned int virq)
212{
213 unsigned int irq;
214
215 irq = irq_offset_down(virq);
216 if (radix_tree_insert(&irq_map, virt_irq_to_real(irq),
217 &virt_irq_to_real_map[irq]) == -ENOMEM)
218 printk(KERN_CRIT "Out of memory creating real -> virtual"
219 " IRQ mapping for irq %u (real 0x%x)\n",
220 virq, virt_irq_to_real(irq));
221 xics_enable_irq(virq);
222 return 0; /* return value is ignored */
223}
224 174
225static unsigned int real_irq_to_virt(unsigned int real_irq) 175/* High level handlers and init code */
226{
227 unsigned int *ptr;
228 176
229 ptr = radix_tree_lookup(&irq_map, real_irq);
230 if (ptr == NULL)
231 return NO_IRQ;
232 return ptr - virt_irq_to_real_map;
233}
234 177
235#ifdef CONFIG_SMP 178#ifdef CONFIG_SMP
236static int get_irq_server(unsigned int irq) 179static int get_irq_server(unsigned int virq)
237{ 180{
238 unsigned int server; 181 unsigned int server;
239 /* For the moment only implement delivery to all cpus or one cpu */ 182 /* For the moment only implement delivery to all cpus or one cpu */
240 cpumask_t cpumask = irq_desc[irq].affinity; 183 cpumask_t cpumask = irq_desc[virq].affinity;
241 cpumask_t tmp = CPU_MASK_NONE; 184 cpumask_t tmp = CPU_MASK_NONE;
242 185
243 if (!distribute_irqs) 186 if (!distribute_irqs)
@@ -258,23 +201,28 @@ static int get_irq_server(unsigned int irq)
258 201
259} 202}
260#else 203#else
261static int get_irq_server(unsigned int irq) 204static int get_irq_server(unsigned int virq)
262{ 205{
263 return default_server; 206 return default_server;
264} 207}
265#endif 208#endif
266 209
267static void xics_enable_irq(unsigned int virq) 210
211static void xics_unmask_irq(unsigned int virq)
268{ 212{
269 unsigned int irq; 213 unsigned int irq;
270 int call_status; 214 int call_status;
271 unsigned int server; 215 unsigned int server;
272 216
273 irq = virt_irq_to_real(irq_offset_down(virq)); 217 pr_debug("xics: unmask virq %d\n", virq);
274 if (irq == XICS_IPI) 218
219 irq = (unsigned int)irq_map[virq].hwirq;
220 pr_debug(" -> map to hwirq 0x%x\n", irq);
221 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
275 return; 222 return;
276 223
277 server = get_irq_server(virq); 224 server = get_irq_server(virq);
225
278 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 226 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
279 DEFAULT_PRIORITY); 227 DEFAULT_PRIORITY);
280 if (call_status != 0) { 228 if (call_status != 0) {
@@ -293,7 +241,7 @@ static void xics_enable_irq(unsigned int virq)
293 } 241 }
294} 242}
295 243
296static void xics_disable_real_irq(unsigned int irq) 244static void xics_mask_real_irq(unsigned int irq)
297{ 245{
298 int call_status; 246 int call_status;
299 unsigned int server; 247 unsigned int server;
@@ -318,75 +266,86 @@ static void xics_disable_real_irq(unsigned int irq)
318 } 266 }
319} 267}
320 268
321static void xics_disable_irq(unsigned int virq) 269static void xics_mask_irq(unsigned int virq)
322{ 270{
323 unsigned int irq; 271 unsigned int irq;
324 272
325 irq = virt_irq_to_real(irq_offset_down(virq)); 273 pr_debug("xics: mask virq %d\n", virq);
326 xics_disable_real_irq(irq); 274
275 irq = (unsigned int)irq_map[virq].hwirq;
276 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
277 return;
278 xics_mask_real_irq(irq);
279}
280
281static unsigned int xics_startup(unsigned int virq)
282{
283 unsigned int irq;
284
285 /* force a reverse mapping of the interrupt so it gets in the cache */
286 irq = (unsigned int)irq_map[virq].hwirq;
287 irq_radix_revmap(xics_host, irq);
288
289 /* unmask it */
290 xics_unmask_irq(virq);
291 return 0;
327} 292}
328 293
329static void xics_end_irq(unsigned int irq) 294static void xics_eoi_direct(unsigned int virq)
330{ 295{
331 int cpu = smp_processor_id(); 296 int cpu = smp_processor_id();
297 unsigned int irq = (unsigned int)irq_map[virq].hwirq;
332 298
333 iosync(); 299 iosync();
334 ops->xirr_info_set(cpu, ((0xff << 24) | 300 direct_xirr_info_set(cpu, (0xff << 24) | irq);
335 (virt_irq_to_real(irq_offset_down(irq)))));
336
337} 301}
338 302
339static void xics_mask_and_ack_irq(unsigned int irq) 303
304static void xics_eoi_lpar(unsigned int virq)
340{ 305{
341 int cpu = smp_processor_id(); 306 int cpu = smp_processor_id();
307 unsigned int irq = (unsigned int)irq_map[virq].hwirq;
342 308
343 if (irq < irq_offset_value()) { 309 iosync();
344 i8259_pic.ack(irq); 310 lpar_xirr_info_set(cpu, (0xff << 24) | irq);
345 iosync();
346 ops->xirr_info_set(cpu, ((0xff<<24) |
347 xics_irq_8259_cascade_real));
348 iosync();
349 }
350} 311}
351 312
352int xics_get_irq(struct pt_regs *regs) 313static inline unsigned int xics_remap_irq(unsigned int vec)
353{ 314{
354 unsigned int cpu = smp_processor_id(); 315 unsigned int irq;
355 unsigned int vec;
356 int irq;
357 316
358 vec = ops->xirr_info_get(cpu);
359 /* (vec >> 24) == old priority */
360 vec &= 0x00ffffff; 317 vec &= 0x00ffffff;
361 318
362 /* for sanity, this had better be < NR_IRQS - 16 */ 319 if (vec == XICS_IRQ_SPURIOUS)
363 if (vec == xics_irq_8259_cascade_real) { 320 return NO_IRQ;
364 irq = i8259_irq(regs); 321 irq = irq_radix_revmap(xics_host, vec);
365 xics_end_irq(irq_offset_up(xics_irq_8259_cascade)); 322 if (likely(irq != NO_IRQ))
366 } else if (vec == XICS_IRQ_SPURIOUS) { 323 return irq;
367 irq = -1; 324
368 } else { 325 printk(KERN_ERR "Interrupt %u (real) is invalid,"
369 irq = real_irq_to_virt(vec); 326 " disabling it.\n", vec);
370 if (irq == NO_IRQ) 327 xics_mask_real_irq(vec);
371 irq = real_irq_to_virt_slowpath(vec); 328 return NO_IRQ;
372 if (irq == NO_IRQ) {
373 printk(KERN_ERR "Interrupt %u (real) is invalid,"
374 " disabling it.\n", vec);
375 xics_disable_real_irq(vec);
376 } else
377 irq = irq_offset_up(irq);
378 }
379 return irq;
380} 329}
381 330
382#ifdef CONFIG_SMP 331static unsigned int xics_get_irq_direct(struct pt_regs *regs)
332{
333 unsigned int cpu = smp_processor_id();
383 334
384static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs) 335 return xics_remap_irq(direct_xirr_info_get(cpu));
336}
337
338static unsigned int xics_get_irq_lpar(struct pt_regs *regs)
385{ 339{
386 int cpu = smp_processor_id(); 340 unsigned int cpu = smp_processor_id();
341
342 return xics_remap_irq(lpar_xirr_info_get(cpu));
343}
387 344
388 ops->qirr_info(cpu, 0xff); 345#ifdef CONFIG_SMP
389 346
347static irqreturn_t xics_ipi_dispatch(int cpu, struct pt_regs *regs)
348{
390 WARN_ON(cpu_is_offline(cpu)); 349 WARN_ON(cpu_is_offline(cpu));
391 350
392 while (xics_ipi_message[cpu].value) { 351 while (xics_ipi_message[cpu].value) {
@@ -418,18 +377,88 @@ static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
418 return IRQ_HANDLED; 377 return IRQ_HANDLED;
419} 378}
420 379
380static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id, struct pt_regs *regs)
381{
382 int cpu = smp_processor_id();
383
384 direct_qirr_info(cpu, 0xff);
385
386 return xics_ipi_dispatch(cpu, regs);
387}
388
389static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id, struct pt_regs *regs)
390{
391 int cpu = smp_processor_id();
392
393 lpar_qirr_info(cpu, 0xff);
394
395 return xics_ipi_dispatch(cpu, regs);
396}
397
421void xics_cause_IPI(int cpu) 398void xics_cause_IPI(int cpu)
422{ 399{
423 ops->qirr_info(cpu, IPI_PRIORITY); 400 if (firmware_has_feature(FW_FEATURE_LPAR))
401 lpar_qirr_info(cpu, IPI_PRIORITY);
402 else
403 direct_qirr_info(cpu, IPI_PRIORITY);
424} 404}
405
425#endif /* CONFIG_SMP */ 406#endif /* CONFIG_SMP */
426 407
408static void xics_set_cpu_priority(int cpu, unsigned char cppr)
409{
410 if (firmware_has_feature(FW_FEATURE_LPAR))
411 lpar_cppr_info(cpu, cppr);
412 else
413 direct_cppr_info(cpu, cppr);
414 iosync();
415}
416
417static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
418{
419 unsigned int irq;
420 int status;
421 int xics_status[2];
422 unsigned long newmask;
423 cpumask_t tmp = CPU_MASK_NONE;
424
425 irq = (unsigned int)irq_map[virq].hwirq;
426 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
427 return;
428
429 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
430
431 if (status) {
432 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
433 "returns %d\n", irq, status);
434 return;
435 }
436
437 /* For the moment only implement delivery to all cpus or one cpu */
438 if (cpus_equal(cpumask, CPU_MASK_ALL)) {
439 newmask = default_distrib_server;
440 } else {
441 cpus_and(tmp, cpu_online_map, cpumask);
442 if (cpus_empty(tmp))
443 return;
444 newmask = get_hard_smp_processor_id(first_cpu(tmp));
445 }
446
447 status = rtas_call(ibm_set_xive, 3, 1, NULL,
448 irq, newmask, xics_status[1]);
449
450 if (status) {
451 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
452 "returns %d\n", irq, status);
453 return;
454 }
455}
456
427void xics_setup_cpu(void) 457void xics_setup_cpu(void)
428{ 458{
429 int cpu = smp_processor_id(); 459 int cpu = smp_processor_id();
430 460
431 ops->cppr_info(cpu, 0xff); 461 xics_set_cpu_priority(cpu, 0xff);
432 iosync();
433 462
434 /* 463 /*
435 * Put the calling processor into the GIQ. This is really only 464 * Put the calling processor into the GIQ. This is really only
@@ -442,72 +471,266 @@ void xics_setup_cpu(void)
442 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); 471 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
443} 472}
444 473
445void xics_init_IRQ(void) 474
475static struct irq_chip xics_pic_direct = {
476 .typename = " XICS ",
477 .startup = xics_startup,
478 .mask = xics_mask_irq,
479 .unmask = xics_unmask_irq,
480 .eoi = xics_eoi_direct,
481 .set_affinity = xics_set_affinity
482};
483
484
485static struct irq_chip xics_pic_lpar = {
486 .typename = " XICS ",
487 .startup = xics_startup,
488 .mask = xics_mask_irq,
489 .unmask = xics_unmask_irq,
490 .eoi = xics_eoi_lpar,
491 .set_affinity = xics_set_affinity
492};
493
494
495static int xics_host_match(struct irq_host *h, struct device_node *node)
496{
497 /* IBM machines have interrupt parents of various funky types for things
498 * like vdevices, events, etc... The trick we use here is to match
499 * everything here except the legacy 8259 which is compatible "chrp,iic"
500 */
501 return !device_is_compatible(node, "chrp,iic");
502}
503
504static int xics_host_map_direct(struct irq_host *h, unsigned int virq,
505 irq_hw_number_t hw, unsigned int flags)
506{
507 unsigned int sense = flags & IRQ_TYPE_SENSE_MASK;
508
509 pr_debug("xics: map_direct virq %d, hwirq 0x%lx, flags: 0x%x\n",
510 virq, hw, flags);
511
512 if (sense && sense != IRQ_TYPE_LEVEL_LOW)
513 printk(KERN_WARNING "xics: using unsupported sense 0x%x"
514 " for irq %d (h: 0x%lx)\n", flags, virq, hw);
515
516 get_irq_desc(virq)->status |= IRQ_LEVEL;
517 set_irq_chip_and_handler(virq, &xics_pic_direct, handle_fasteoi_irq);
518 return 0;
519}
520
521static int xics_host_map_lpar(struct irq_host *h, unsigned int virq,
522 irq_hw_number_t hw, unsigned int flags)
523{
524 unsigned int sense = flags & IRQ_TYPE_SENSE_MASK;
525
526 pr_debug("xics: map_lpar virq %d, hwirq 0x%lx, flags: 0x%x\n",
527 virq, hw, flags);
528
529 if (sense && sense != IRQ_TYPE_LEVEL_LOW)
530 printk(KERN_WARNING "xics: using unsupported sense 0x%x"
531 " for irq %d (h: 0x%lx)\n", flags, virq, hw);
532
533 get_irq_desc(virq)->status |= IRQ_LEVEL;
534 set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq);
535 return 0;
536}
537
538static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
539 u32 *intspec, unsigned int intsize,
540 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
541
542{
543 /* Current xics implementation translates everything
544 * to level. It is not technically right for MSIs but this
545 * is irrelevant at this point. We might get smarter in the future
546 */
547 *out_hwirq = intspec[0];
548 *out_flags = IRQ_TYPE_LEVEL_LOW;
549
550 return 0;
551}
552
553static struct irq_host_ops xics_host_direct_ops = {
554 .match = xics_host_match,
555 .map = xics_host_map_direct,
556 .xlate = xics_host_xlate,
557};
558
559static struct irq_host_ops xics_host_lpar_ops = {
560 .match = xics_host_match,
561 .map = xics_host_map_lpar,
562 .xlate = xics_host_xlate,
563};
564
565static void __init xics_init_host(void)
566{
567 struct irq_host_ops *ops;
568
569 if (firmware_has_feature(FW_FEATURE_LPAR))
570 ops = &xics_host_lpar_ops;
571 else
572 ops = &xics_host_direct_ops;
573 xics_host = irq_alloc_host(IRQ_HOST_MAP_TREE, 0, ops,
574 XICS_IRQ_SPURIOUS);
575 BUG_ON(xics_host == NULL);
576 irq_set_default_host(xics_host);
577}
578
579static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
580 unsigned long size)
446{ 581{
582#ifdef CONFIG_SMP
447 int i; 583 int i;
448 unsigned long intr_size = 0;
449 struct device_node *np;
450 uint *ireg, ilen, indx = 0;
451 unsigned long intr_base = 0;
452 struct xics_interrupt_node {
453 unsigned long addr;
454 unsigned long size;
455 } intnodes[NR_CPUS];
456 584
457 ppc64_boot_msg(0x20, "XICS Init"); 585 /* This may look gross but it's good enough for now, we don't quite
586 * have a hard -> linux processor id matching.
587 */
588 for_each_possible_cpu(i) {
589 if (!cpu_present(i))
590 continue;
591 if (hw_id == get_hard_smp_processor_id(i)) {
592 xics_per_cpu[i] = ioremap(addr, size);
593 return;
594 }
595 }
596#else
597 if (hw_id != 0)
598 return;
599 xics_per_cpu[0] = ioremap(addr, size);
600#endif /* CONFIG_SMP */
601}
458 602
459 ibm_get_xive = rtas_token("ibm,get-xive"); 603static void __init xics_init_one_node(struct device_node *np,
460 ibm_set_xive = rtas_token("ibm,set-xive"); 604 unsigned int *indx)
461 ibm_int_on = rtas_token("ibm,int-on"); 605{
462 ibm_int_off = rtas_token("ibm,int-off"); 606 unsigned int ilen;
607 u32 *ireg;
463 608
464 np = of_find_node_by_type(NULL, "PowerPC-External-Interrupt-Presentation"); 609 /* This code does the theorically broken assumption that the interrupt
465 if (!np) 610 * server numbers are the same as the hard CPU numbers.
466 panic("xics_init_IRQ: can't find interrupt presentation"); 611 * This happens to be the case so far but we are playing with fire...
612 * should be fixed one of these days. -BenH.
613 */
614 ireg = (u32 *)get_property(np, "ibm,interrupt-server-ranges", NULL);
467 615
468nextnode: 616 /* Do that ever happen ? we'll know soon enough... but even good'old
469 ireg = (uint *)get_property(np, "ibm,interrupt-server-ranges", NULL); 617 * f80 does have that property ..
618 */
619 WARN_ON(ireg == NULL);
470 if (ireg) { 620 if (ireg) {
471 /* 621 /*
472 * set node starting index for this node 622 * set node starting index for this node
473 */ 623 */
474 indx = *ireg; 624 *indx = *ireg;
475 } 625 }
476 626 ireg = (u32 *)get_property(np, "reg", &ilen);
477 ireg = (uint *)get_property(np, "reg", &ilen);
478 if (!ireg) 627 if (!ireg)
479 panic("xics_init_IRQ: can't find interrupt reg property"); 628 panic("xics_init_IRQ: can't find interrupt reg property");
480 629
481 while (ilen) { 630 while (ilen >= (4 * sizeof(u32))) {
482 intnodes[indx].addr = (unsigned long)*ireg++ << 32; 631 unsigned long addr, size;
483 ilen -= sizeof(uint); 632
484 intnodes[indx].addr |= *ireg++; 633 /* XXX Use proper OF parsing code here !!! */
485 ilen -= sizeof(uint); 634 addr = (unsigned long)*ireg++ << 32;
486 intnodes[indx].size = (unsigned long)*ireg++ << 32; 635 ilen -= sizeof(u32);
487 ilen -= sizeof(uint); 636 addr |= *ireg++;
488 intnodes[indx].size |= *ireg++; 637 ilen -= sizeof(u32);
489 ilen -= sizeof(uint); 638 size = (unsigned long)*ireg++ << 32;
490 indx++; 639 ilen -= sizeof(u32);
491 if (indx >= NR_CPUS) break; 640 size |= *ireg++;
641 ilen -= sizeof(u32);
642 xics_map_one_cpu(*indx, addr, size);
643 (*indx)++;
644 }
645}
646
647
648static void __init xics_setup_8259_cascade(void)
649{
650 struct device_node *np, *old, *found = NULL;
651 int cascade, naddr;
652 u32 *addrp;
653 unsigned long intack = 0;
654
655 for_each_node_by_type(np, "interrupt-controller")
656 if (device_is_compatible(np, "chrp,iic")) {
657 found = np;
658 break;
659 }
660 if (found == NULL) {
661 printk(KERN_DEBUG "xics: no ISA interrupt controller\n");
662 return;
663 }
664 cascade = irq_of_parse_and_map(found, 0);
665 if (cascade == NO_IRQ) {
666 printk(KERN_ERR "xics: failed to map cascade interrupt");
667 return;
668 }
669 pr_debug("xics: cascade mapped to irq %d\n", cascade);
670
671 for (old = of_node_get(found); old != NULL ; old = np) {
672 np = of_get_parent(old);
673 of_node_put(old);
674 if (np == NULL)
675 break;
676 if (strcmp(np->name, "pci") != 0)
677 continue;
678 addrp = (u32 *)get_property(np, "8259-interrupt-acknowledge", NULL);
679 if (addrp == NULL)
680 continue;
681 naddr = prom_n_addr_cells(np);
682 intack = addrp[naddr-1];
683 if (naddr > 1)
684 intack |= ((unsigned long)addrp[naddr-2]) << 32;
685 }
686 if (intack)
687 printk(KERN_DEBUG "xics: PCI 8259 intack at 0x%016lx\n", intack);
688 i8259_init(found, intack);
689 of_node_put(found);
690 set_irq_chained_handler(cascade, pseries_8259_cascade);
691}
692
693void __init xics_init_IRQ(void)
694{
695 int i;
696 struct device_node *np;
697 u32 *ireg, ilen, indx = 0;
698 int found = 0;
699
700 ppc64_boot_msg(0x20, "XICS Init");
701
702 ibm_get_xive = rtas_token("ibm,get-xive");
703 ibm_set_xive = rtas_token("ibm,set-xive");
704 ibm_int_on = rtas_token("ibm,int-on");
705 ibm_int_off = rtas_token("ibm,int-off");
706
707 for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
708 found = 1;
709 if (firmware_has_feature(FW_FEATURE_LPAR))
710 break;
711 xics_init_one_node(np, &indx);
492 } 712 }
713 if (found == 0)
714 return;
493 715
494 np = of_find_node_by_type(np, "PowerPC-External-Interrupt-Presentation"); 716 xics_init_host();
495 if ((indx < NR_CPUS) && np) goto nextnode;
496 717
497 /* Find the server numbers for the boot cpu. */ 718 /* Find the server numbers for the boot cpu. */
498 for (np = of_find_node_by_type(NULL, "cpu"); 719 for (np = of_find_node_by_type(NULL, "cpu");
499 np; 720 np;
500 np = of_find_node_by_type(np, "cpu")) { 721 np = of_find_node_by_type(np, "cpu")) {
501 ireg = (uint *)get_property(np, "reg", &ilen); 722 ireg = (u32 *)get_property(np, "reg", &ilen);
502 if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) { 723 if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) {
503 ireg = (uint *)get_property(np, "ibm,ppc-interrupt-gserver#s", 724 ireg = (u32 *)get_property(np,
504 &ilen); 725 "ibm,ppc-interrupt-gserver#s",
726 &ilen);
505 i = ilen / sizeof(int); 727 i = ilen / sizeof(int);
506 if (ireg && i > 0) { 728 if (ireg && i > 0) {
507 default_server = ireg[0]; 729 default_server = ireg[0];
508 default_distrib_server = ireg[i-1]; /* take last element */ 730 /* take last element */
731 default_distrib_server = ireg[i-1];
509 } 732 }
510 ireg = (uint *)get_property(np, 733 ireg = (u32 *)get_property(np,
511 "ibm,interrupt-server#-size", NULL); 734 "ibm,interrupt-server#-size", NULL);
512 if (ireg) 735 if (ireg)
513 interrupt_server_size = *ireg; 736 interrupt_server_size = *ireg;
@@ -516,135 +739,48 @@ nextnode:
516 } 739 }
517 of_node_put(np); 740 of_node_put(np);
518 741
519 intr_base = intnodes[0].addr;
520 intr_size = intnodes[0].size;
521
522 np = of_find_node_by_type(NULL, "interrupt-controller");
523 if (!np) {
524 printk(KERN_DEBUG "xics: no ISA interrupt controller\n");
525 xics_irq_8259_cascade_real = -1;
526 xics_irq_8259_cascade = -1;
527 } else {
528 ireg = (uint *) get_property(np, "interrupts", NULL);
529 if (!ireg)
530 panic("xics_init_IRQ: can't find ISA interrupts property");
531
532 xics_irq_8259_cascade_real = *ireg;
533 xics_irq_8259_cascade
534 = virt_irq_create_mapping(xics_irq_8259_cascade_real);
535 i8259_init(0, 0);
536 of_node_put(np);
537 }
538
539 if (firmware_has_feature(FW_FEATURE_LPAR)) 742 if (firmware_has_feature(FW_FEATURE_LPAR))
540 ops = &pSeriesLP_ops; 743 ppc_md.get_irq = xics_get_irq_lpar;
541 else { 744 else
542#ifdef CONFIG_SMP 745 ppc_md.get_irq = xics_get_irq_direct;
543 for_each_possible_cpu(i) {
544 int hard_id;
545
546 /* FIXME: Do this dynamically! --RR */
547 if (!cpu_present(i))
548 continue;
549
550 hard_id = get_hard_smp_processor_id(i);
551 xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
552 intnodes[hard_id].size);
553 }
554#else
555 xics_per_cpu[0] = ioremap(intr_base, intr_size);
556#endif /* CONFIG_SMP */
557 }
558
559 for (i = irq_offset_value(); i < NR_IRQS; ++i)
560 get_irq_desc(i)->chip = &xics_pic;
561 746
562 xics_setup_cpu(); 747 xics_setup_cpu();
563 748
749 xics_setup_8259_cascade();
750
564 ppc64_boot_msg(0x21, "XICS Done"); 751 ppc64_boot_msg(0x21, "XICS Done");
565} 752}
566 753
567/*
568 * We cant do this in init_IRQ because we need the memory subsystem up for
569 * request_irq()
570 */
571static int __init xics_setup_i8259(void)
572{
573 if (ppc64_interrupt_controller == IC_PPC_XIC &&
574 xics_irq_8259_cascade != -1) {
575 if (request_irq(irq_offset_up(xics_irq_8259_cascade),
576 no_action, 0, "8259 cascade", NULL))
577 printk(KERN_ERR "xics_setup_i8259: couldn't get 8259 "
578 "cascade\n");
579 }
580 return 0;
581}
582arch_initcall(xics_setup_i8259);
583 754
584#ifdef CONFIG_SMP 755#ifdef CONFIG_SMP
585void xics_request_IPIs(void) 756void xics_request_IPIs(void)
586{ 757{
587 virt_irq_to_real_map[XICS_IPI] = XICS_IPI; 758 unsigned int ipi;
759
760 ipi = irq_create_mapping(xics_host, XICS_IPI, 0);
761 BUG_ON(ipi == NO_IRQ);
588 762
589 /* 763 /*
590 * IPIs are marked IRQF_DISABLED as they must run with irqs 764 * IPIs are marked IRQF_DISABLED as they must run with irqs
591 * disabled 765 * disabled
592 */ 766 */
593 request_irq(irq_offset_up(XICS_IPI), xics_ipi_action, 767 set_irq_handler(ipi, handle_percpu_irq);
594 IRQF_DISABLED, "IPI", NULL); 768 if (firmware_has_feature(FW_FEATURE_LPAR))
595 get_irq_desc(irq_offset_up(XICS_IPI))->status |= IRQ_PER_CPU; 769 request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED,
596} 770 "IPI", NULL);
597#endif 771 else
598 772 request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED,
599static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) 773 "IPI", NULL);
600{
601 unsigned int irq;
602 int status;
603 int xics_status[2];
604 unsigned long newmask;
605 cpumask_t tmp = CPU_MASK_NONE;
606
607 irq = virt_irq_to_real(irq_offset_down(virq));
608 if (irq == XICS_IPI || irq == NO_IRQ)
609 return;
610
611 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
612
613 if (status) {
614 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
615 "returns %d\n", irq, status);
616 return;
617 }
618
619 /* For the moment only implement delivery to all cpus or one cpu */
620 if (cpus_equal(cpumask, CPU_MASK_ALL)) {
621 newmask = default_distrib_server;
622 } else {
623 cpus_and(tmp, cpu_online_map, cpumask);
624 if (cpus_empty(tmp))
625 return;
626 newmask = get_hard_smp_processor_id(first_cpu(tmp));
627 }
628
629 status = rtas_call(ibm_set_xive, 3, 1, NULL,
630 irq, newmask, xics_status[1]);
631
632 if (status) {
633 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
634 "returns %d\n", irq, status);
635 return;
636 }
637} 774}
775#endif /* CONFIG_SMP */
638 776
639void xics_teardown_cpu(int secondary) 777void xics_teardown_cpu(int secondary)
640{ 778{
641 int cpu = smp_processor_id(); 779 int cpu = smp_processor_id();
780 unsigned int ipi;
781 struct irq_desc *desc;
642 782
643 ops->cppr_info(cpu, 0x00); 783 xics_set_cpu_priority(cpu, 0);
644 iosync();
645
646 /* Clear IPI */
647 ops->qirr_info(cpu, 0xff);
648 784
649 /* 785 /*
650 * we need to EOI the IPI if we got here from kexec down IPI 786 * we need to EOI the IPI if we got here from kexec down IPI
@@ -653,7 +789,13 @@ void xics_teardown_cpu(int secondary)
653 * should we be flagging idle loop instead? 789 * should we be flagging idle loop instead?
654 * or creating some task to be scheduled? 790 * or creating some task to be scheduled?
655 */ 791 */
656 ops->xirr_info_set(cpu, XICS_IPI); 792
793 ipi = irq_find_mapping(xics_host, XICS_IPI);
794 if (ipi == XICS_IRQ_SPURIOUS)
795 return;
796 desc = get_irq_desc(ipi);
797 if (desc->chip && desc->chip->eoi)
798 desc->chip->eoi(XICS_IPI);
657 799
658 /* 800 /*
659 * Some machines need to have at least one cpu in the GIQ, 801 * Some machines need to have at least one cpu in the GIQ,
@@ -661,8 +803,8 @@ void xics_teardown_cpu(int secondary)
661 */ 803 */
662 if (secondary) 804 if (secondary)
663 rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, 805 rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
664 (1UL << interrupt_server_size) - 1 - 806 (1UL << interrupt_server_size) - 1 -
665 default_distrib_server, 0); 807 default_distrib_server, 0);
666} 808}
667 809
668#ifdef CONFIG_HOTPLUG_CPU 810#ifdef CONFIG_HOTPLUG_CPU
@@ -674,8 +816,7 @@ void xics_migrate_irqs_away(void)
674 unsigned int irq, virq, cpu = smp_processor_id(); 816 unsigned int irq, virq, cpu = smp_processor_id();
675 817
676 /* Reject any interrupt that was queued to us... */ 818 /* Reject any interrupt that was queued to us... */
677 ops->cppr_info(cpu, 0); 819 xics_set_cpu_priority(cpu, 0);
678 iosync();
679 820
680 /* remove ourselves from the global interrupt queue */ 821 /* remove ourselves from the global interrupt queue */
681 status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, 822 status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
@@ -683,24 +824,23 @@ void xics_migrate_irqs_away(void)
683 WARN_ON(status < 0); 824 WARN_ON(status < 0);
684 825
685 /* Allow IPIs again... */ 826 /* Allow IPIs again... */
686 ops->cppr_info(cpu, DEFAULT_PRIORITY); 827 xics_set_cpu_priority(cpu, DEFAULT_PRIORITY);
687 iosync();
688 828
689 for_each_irq(virq) { 829 for_each_irq(virq) {
690 irq_desc_t *desc; 830 struct irq_desc *desc;
691 int xics_status[2]; 831 int xics_status[2];
692 unsigned long flags; 832 unsigned long flags;
693 833
694 /* We cant set affinity on ISA interrupts */ 834 /* We cant set affinity on ISA interrupts */
695 if (virq < irq_offset_value()) 835 if (virq < NUM_ISA_INTERRUPTS)
696 continue; 836 continue;
697 837 if (irq_map[virq].host != xics_host)
698 desc = get_irq_desc(virq); 838 continue;
699 irq = virt_irq_to_real(irq_offset_down(virq)); 839 irq = (unsigned int)irq_map[virq].hwirq;
700
701 /* We need to get IPIs still. */ 840 /* We need to get IPIs still. */
702 if (irq == XICS_IPI || irq == NO_IRQ) 841 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
703 continue; 842 continue;
843 desc = get_irq_desc(virq);
704 844
705 /* We only need to migrate enabled IRQS */ 845 /* We only need to migrate enabled IRQS */
706 if (desc == NULL || desc->chip == NULL 846 if (desc == NULL || desc->chip == NULL