diff options
Diffstat (limited to 'arch/powerpc/platforms/powermac/smp.c')
-rw-r--r-- | arch/powerpc/platforms/powermac/smp.c | 154 |
1 files changed, 108 insertions, 46 deletions
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index c95215f4f8b6..a830c5e80657 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c | |||
@@ -840,92 +840,149 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr) | |||
840 | 840 | ||
841 | /* Setup openpic */ | 841 | /* Setup openpic */ |
842 | mpic_setup_this_cpu(); | 842 | mpic_setup_this_cpu(); |
843 | } | ||
843 | 844 | ||
844 | if (cpu_nr == 0) { | 845 | #ifdef CONFIG_HOTPLUG_CPU |
845 | #ifdef CONFIG_PPC64 | 846 | static int smp_core99_cpu_notify(struct notifier_block *self, |
846 | extern void g5_phy_disable_cpu1(void); | 847 | unsigned long action, void *hcpu) |
848 | { | ||
849 | int rc; | ||
847 | 850 | ||
848 | /* Close i2c bus if it was used for tb sync */ | 851 | switch(action) { |
852 | case CPU_UP_PREPARE: | ||
853 | case CPU_UP_PREPARE_FROZEN: | ||
854 | /* Open i2c bus if it was used for tb sync */ | ||
849 | if (pmac_tb_clock_chip_host) { | 855 | if (pmac_tb_clock_chip_host) { |
850 | pmac_i2c_close(pmac_tb_clock_chip_host); | 856 | rc = pmac_i2c_open(pmac_tb_clock_chip_host, 1); |
851 | pmac_tb_clock_chip_host = NULL; | 857 | if (rc) { |
858 | pr_err("Failed to open i2c bus for time sync\n"); | ||
859 | return notifier_from_errno(rc); | ||
860 | } | ||
852 | } | 861 | } |
862 | break; | ||
863 | case CPU_ONLINE: | ||
864 | case CPU_UP_CANCELED: | ||
865 | /* Close i2c bus if it was used for tb sync */ | ||
866 | if (pmac_tb_clock_chip_host) | ||
867 | pmac_i2c_close(pmac_tb_clock_chip_host); | ||
868 | break; | ||
869 | default: | ||
870 | break; | ||
871 | } | ||
872 | return NOTIFY_OK; | ||
873 | } | ||
853 | 874 | ||
854 | /* If we didn't start the second CPU, we must take | 875 | static struct notifier_block __cpuinitdata smp_core99_cpu_nb = { |
855 | * it off the bus | 876 | .notifier_call = smp_core99_cpu_notify, |
856 | */ | 877 | }; |
857 | if (of_machine_is_compatible("MacRISC4") && | 878 | #endif /* CONFIG_HOTPLUG_CPU */ |
858 | num_online_cpus() < 2) | 879 | |
859 | g5_phy_disable_cpu1(); | 880 | static void __init smp_core99_bringup_done(void) |
860 | #endif /* CONFIG_PPC64 */ | 881 | { |
882 | #ifdef CONFIG_PPC64 | ||
883 | extern void g5_phy_disable_cpu1(void); | ||
884 | |||
885 | /* Close i2c bus if it was used for tb sync */ | ||
886 | if (pmac_tb_clock_chip_host) | ||
887 | pmac_i2c_close(pmac_tb_clock_chip_host); | ||
861 | 888 | ||
862 | if (ppc_md.progress) | 889 | /* If we didn't start the second CPU, we must take |
863 | ppc_md.progress("core99_setup_cpu 0 done", 0x349); | 890 | * it off the bus. |
891 | */ | ||
892 | if (of_machine_is_compatible("MacRISC4") && | ||
893 | num_online_cpus() < 2) { | ||
894 | set_cpu_present(1, false); | ||
895 | g5_phy_disable_cpu1(); | ||
864 | } | 896 | } |
865 | } | 897 | #endif /* CONFIG_PPC64 */ |
866 | 898 | ||
899 | #ifdef CONFIG_HOTPLUG_CPU | ||
900 | register_cpu_notifier(&smp_core99_cpu_nb); | ||
901 | #endif | ||
902 | if (ppc_md.progress) | ||
903 | ppc_md.progress("smp_core99_bringup_done", 0x349); | ||
904 | } | ||
867 | 905 | ||
868 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32) | 906 | #ifdef CONFIG_HOTPLUG_CPU |
869 | 907 | ||
870 | int smp_core99_cpu_disable(void) | 908 | static int smp_core99_cpu_disable(void) |
871 | { | 909 | { |
872 | set_cpu_online(smp_processor_id(), false); | 910 | int rc = generic_cpu_disable(); |
911 | if (rc) | ||
912 | return rc; | ||
873 | 913 | ||
874 | /* XXX reset cpu affinity here */ | ||
875 | mpic_cpu_set_priority(0xf); | 914 | mpic_cpu_set_priority(0xf); |
876 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | 915 | |
877 | mb(); | ||
878 | udelay(20); | ||
879 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | ||
880 | return 0; | 916 | return 0; |
881 | } | 917 | } |
882 | 918 | ||
883 | static int cpu_dead[NR_CPUS]; | 919 | #ifdef CONFIG_PPC32 |
884 | 920 | ||
885 | void pmac32_cpu_die(void) | 921 | static void pmac_cpu_die(void) |
886 | { | 922 | { |
923 | int cpu = smp_processor_id(); | ||
924 | |||
887 | local_irq_disable(); | 925 | local_irq_disable(); |
888 | cpu_dead[smp_processor_id()] = 1; | 926 | idle_task_exit(); |
927 | pr_debug("CPU%d offline\n", cpu); | ||
928 | generic_set_cpu_dead(cpu); | ||
929 | smp_wmb(); | ||
889 | mb(); | 930 | mb(); |
890 | low_cpu_die(); | 931 | low_cpu_die(); |
891 | } | 932 | } |
892 | 933 | ||
893 | void smp_core99_cpu_die(unsigned int cpu) | 934 | #else /* CONFIG_PPC32 */ |
935 | |||
936 | static void pmac_cpu_die(void) | ||
894 | { | 937 | { |
895 | int timeout; | 938 | int cpu = smp_processor_id(); |
896 | 939 | ||
897 | timeout = 1000; | 940 | local_irq_disable(); |
898 | while (!cpu_dead[cpu]) { | 941 | idle_task_exit(); |
899 | if (--timeout == 0) { | 942 | |
900 | printk("CPU %u refused to die!\n", cpu); | 943 | /* |
901 | break; | 944 | * turn off as much as possible, we'll be |
902 | } | 945 | * kicked out as this will only be invoked |
903 | msleep(1); | 946 | * on core99 platforms for now ... |
947 | */ | ||
948 | |||
949 | printk(KERN_INFO "CPU#%d offline\n", cpu); | ||
950 | generic_set_cpu_dead(cpu); | ||
951 | smp_wmb(); | ||
952 | |||
953 | /* | ||
954 | * Re-enable interrupts. The NAP code needs to enable them | ||
955 | * anyways, do it now so we deal with the case where one already | ||
956 | * happened while soft-disabled. | ||
957 | * We shouldn't get any external interrupts, only decrementer, and the | ||
958 | * decrementer handler is safe for use on offline CPUs | ||
959 | */ | ||
960 | local_irq_enable(); | ||
961 | |||
962 | while (1) { | ||
963 | /* let's not take timer interrupts too often ... */ | ||
964 | set_dec(0x7fffffff); | ||
965 | |||
966 | /* Enter NAP mode */ | ||
967 | power4_idle(); | ||
904 | } | 968 | } |
905 | cpu_dead[cpu] = 0; | ||
906 | } | 969 | } |
907 | 970 | ||
908 | #endif /* CONFIG_HOTPLUG_CPU && CONFIG_PP32 */ | 971 | #endif /* else CONFIG_PPC32 */ |
972 | #endif /* CONFIG_HOTPLUG_CPU */ | ||
909 | 973 | ||
910 | /* Core99 Macs (dual G4s and G5s) */ | 974 | /* Core99 Macs (dual G4s and G5s) */ |
911 | struct smp_ops_t core99_smp_ops = { | 975 | struct smp_ops_t core99_smp_ops = { |
912 | .message_pass = smp_mpic_message_pass, | 976 | .message_pass = smp_mpic_message_pass, |
913 | .probe = smp_core99_probe, | 977 | .probe = smp_core99_probe, |
978 | .bringup_done = smp_core99_bringup_done, | ||
914 | .kick_cpu = smp_core99_kick_cpu, | 979 | .kick_cpu = smp_core99_kick_cpu, |
915 | .setup_cpu = smp_core99_setup_cpu, | 980 | .setup_cpu = smp_core99_setup_cpu, |
916 | .give_timebase = smp_core99_give_timebase, | 981 | .give_timebase = smp_core99_give_timebase, |
917 | .take_timebase = smp_core99_take_timebase, | 982 | .take_timebase = smp_core99_take_timebase, |
918 | #if defined(CONFIG_HOTPLUG_CPU) | 983 | #if defined(CONFIG_HOTPLUG_CPU) |
919 | # if defined(CONFIG_PPC32) | ||
920 | .cpu_disable = smp_core99_cpu_disable, | 984 | .cpu_disable = smp_core99_cpu_disable, |
921 | .cpu_die = smp_core99_cpu_die, | ||
922 | # endif | ||
923 | # if defined(CONFIG_PPC64) | ||
924 | .cpu_disable = generic_cpu_disable, | ||
925 | .cpu_die = generic_cpu_die, | 985 | .cpu_die = generic_cpu_die, |
926 | /* intentionally do *NOT* assign cpu_enable, | ||
927 | * the generic code will use kick_cpu then! */ | ||
928 | # endif | ||
929 | #endif | 986 | #endif |
930 | }; | 987 | }; |
931 | 988 | ||
@@ -957,5 +1014,10 @@ void __init pmac_setup_smp(void) | |||
957 | smp_ops = &psurge_smp_ops; | 1014 | smp_ops = &psurge_smp_ops; |
958 | } | 1015 | } |
959 | #endif /* CONFIG_PPC32 */ | 1016 | #endif /* CONFIG_PPC32 */ |
1017 | |||
1018 | #ifdef CONFIG_HOTPLUG_CPU | ||
1019 | ppc_md.cpu_die = pmac_cpu_die; | ||
1020 | #endif | ||
960 | } | 1021 | } |
961 | 1022 | ||
1023 | |||