diff options
Diffstat (limited to 'arch/powerpc/platforms/iseries/exception.S')
-rw-r--r-- | arch/powerpc/platforms/iseries/exception.S | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S index 8ff330d026ca..2f581521eb9b 100644 --- a/arch/powerpc/platforms/iseries/exception.S +++ b/arch/powerpc/platforms/iseries/exception.S | |||
@@ -38,12 +38,13 @@ | |||
38 | 38 | ||
39 | .globl system_reset_iSeries | 39 | .globl system_reset_iSeries |
40 | system_reset_iSeries: | 40 | system_reset_iSeries: |
41 | bl .relative_toc | ||
41 | mfspr r13,SPRN_SPRG3 /* Get alpaca address */ | 42 | mfspr r13,SPRN_SPRG3 /* Get alpaca address */ |
42 | LOAD_REG_IMMEDIATE(r23, alpaca) | 43 | LOAD_REG_ADDR(r23, alpaca) |
43 | li r0,ALPACA_SIZE | 44 | li r0,ALPACA_SIZE |
44 | sub r23,r13,r23 | 45 | sub r23,r13,r23 |
45 | divdu r23,r23,r0 /* r23 has cpu number */ | 46 | divdu r23,r23,r0 /* r23 has cpu number */ |
46 | LOAD_REG_IMMEDIATE(r13, paca) | 47 | LOAD_REG_ADDR(r13, paca) |
47 | mulli r0,r23,PACA_SIZE | 48 | mulli r0,r23,PACA_SIZE |
48 | add r13,r13,r0 | 49 | add r13,r13,r0 |
49 | mtspr SPRN_SPRG3,r13 /* Save it away for the future */ | 50 | mtspr SPRN_SPRG3,r13 /* Save it away for the future */ |
@@ -60,14 +61,14 @@ system_reset_iSeries: | |||
60 | mtspr SPRN_CTRLT,r4 | 61 | mtspr SPRN_CTRLT,r4 |
61 | 62 | ||
62 | /* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */ | 63 | /* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */ |
63 | /* In the UP case we'll yeild() later, and we will not access the paca anyway */ | 64 | /* In the UP case we'll yield() later, and we will not access the paca anyway */ |
64 | #ifdef CONFIG_SMP | 65 | #ifdef CONFIG_SMP |
65 | 1: | 66 | 1: |
66 | HMT_LOW | 67 | HMT_LOW |
67 | LOAD_REG_IMMEDIATE(r23, __secondary_hold_spinloop) | 68 | LOAD_REG_ADDR(r23, __secondary_hold_spinloop) |
68 | ld r23,0(r23) | 69 | ld r23,0(r23) |
69 | sync | 70 | sync |
70 | LOAD_REG_IMMEDIATE(r3,current_set) | 71 | LOAD_REG_ADDR(r3,current_set) |
71 | sldi r28,r24,3 /* get current_set[cpu#] */ | 72 | sldi r28,r24,3 /* get current_set[cpu#] */ |
72 | ldx r3,r3,r28 | 73 | ldx r3,r3,r28 |
73 | addi r1,r3,THREAD_SIZE | 74 | addi r1,r3,THREAD_SIZE |
@@ -90,7 +91,7 @@ system_reset_iSeries: | |||
90 | lbz r23,PACAPROCSTART(r13) /* Test if this processor | 91 | lbz r23,PACAPROCSTART(r13) /* Test if this processor |
91 | * should start */ | 92 | * should start */ |
92 | sync | 93 | sync |
93 | LOAD_REG_IMMEDIATE(r3,current_set) | 94 | LOAD_REG_ADDR(r3,current_set) |
94 | sldi r28,r24,3 /* get current_set[cpu#] */ | 95 | sldi r28,r24,3 /* get current_set[cpu#] */ |
95 | ldx r3,r3,r28 | 96 | ldx r3,r3,r28 |
96 | addi r1,r3,THREAD_SIZE | 97 | addi r1,r3,THREAD_SIZE |
@@ -255,8 +256,8 @@ hardware_interrupt_iSeries_masked: | |||
255 | 256 | ||
256 | _INIT_STATIC(__start_initialization_iSeries) | 257 | _INIT_STATIC(__start_initialization_iSeries) |
257 | /* Clear out the BSS */ | 258 | /* Clear out the BSS */ |
258 | LOAD_REG_IMMEDIATE(r11,__bss_stop) | 259 | LOAD_REG_ADDR(r11,__bss_stop) |
259 | LOAD_REG_IMMEDIATE(r8,__bss_start) | 260 | LOAD_REG_ADDR(r8,__bss_start) |
260 | sub r11,r11,r8 /* bss size */ | 261 | sub r11,r11,r8 /* bss size */ |
261 | addi r11,r11,7 /* round up to an even double word */ | 262 | addi r11,r11,7 /* round up to an even double word */ |
262 | rldicl. r11,r11,61,3 /* shift right by 3 */ | 263 | rldicl. r11,r11,61,3 /* shift right by 3 */ |
@@ -267,15 +268,11 @@ _INIT_STATIC(__start_initialization_iSeries) | |||
267 | 3: stdu r0,8(r8) | 268 | 3: stdu r0,8(r8) |
268 | bdnz 3b | 269 | bdnz 3b |
269 | 4: | 270 | 4: |
270 | LOAD_REG_IMMEDIATE(r1,init_thread_union) | 271 | LOAD_REG_ADDR(r1,init_thread_union) |
271 | addi r1,r1,THREAD_SIZE | 272 | addi r1,r1,THREAD_SIZE |
272 | li r0,0 | 273 | li r0,0 |
273 | stdu r0,-STACK_FRAME_OVERHEAD(r1) | 274 | stdu r0,-STACK_FRAME_OVERHEAD(r1) |
274 | 275 | ||
275 | LOAD_REG_IMMEDIATE(r2,__toc_start) | ||
276 | addi r2,r2,0x4000 | ||
277 | addi r2,r2,0x4000 | ||
278 | |||
279 | bl .iSeries_early_setup | 276 | bl .iSeries_early_setup |
280 | bl .early_setup | 277 | bl .early_setup |
281 | 278 | ||