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-rw-r--r--arch/powerpc/platforms/85xx/Kconfig11
-rw-r--r--arch/powerpc/platforms/85xx/Makefile3
-rw-r--r--arch/powerpc/platforms/85xx/misc.c55
-rw-r--r--arch/powerpc/platforms/85xx/mpc8540_ads.h35
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx.h17
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c187
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.h60
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.c47
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.h43
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ds.c (renamed from arch/powerpc/platforms/85xx/mpc8544_ds.c)87
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c55
11 files changed, 211 insertions, 389 deletions
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index f620171ad6b1..7748a3a426db 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -12,6 +12,7 @@ config MPC8540_ADS
12config MPC8560_ADS 12config MPC8560_ADS
13 bool "Freescale MPC8560 ADS" 13 bool "Freescale MPC8560 ADS"
14 select DEFAULT_UIMAGE 14 select DEFAULT_UIMAGE
15 select PPC_CPM_NEW_BINDING
15 help 16 help
16 This option enables support for the MPC 8560 ADS board 17 This option enables support for the MPC 8560 ADS board
17 18
@@ -25,17 +26,17 @@ config MPC85xx_CDS
25config MPC85xx_MDS 26config MPC85xx_MDS
26 bool "Freescale MPC85xx MDS" 27 bool "Freescale MPC85xx MDS"
27 select DEFAULT_UIMAGE 28 select DEFAULT_UIMAGE
28# select QUICC_ENGINE 29 select QUICC_ENGINE
29 help 30 help
30 This option enables support for the MPC85xx MDS board 31 This option enables support for the MPC85xx MDS board
31 32
32config MPC8544_DS 33config MPC85xx_DS
33 bool "Freescale MPC8544 DS" 34 bool "Freescale MPC85xx DS"
34 select PPC_I8259 35 select PPC_I8259
35 select DEFAULT_UIMAGE 36 select DEFAULT_UIMAGE
36 select FSL_ULI1575 37 select FSL_ULI1575
37 help 38 help
38 This option enables support for the MPC8544 DS board 39 This option enables support for the MPC85xx DS (MPC8544 DS) board
39 40
40endchoice 41endchoice
41 42
@@ -58,4 +59,4 @@ config MPC85xx
58 select FSL_PCI if PCI 59 select FSL_PCI if PCI
59 select SERIAL_8250_SHARE_IRQ if SERIAL_8250 60 select SERIAL_8250_SHARE_IRQ if SERIAL_8250
60 default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \ 61 default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
61 || MPC85xx_MDS || MPC8544_DS 62 || MPC85xx_MDS || MPC85xx_DS
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index d70f2d0f9d36..5eca92023ec8 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -1,9 +1,8 @@
1# 1#
2# Makefile for the PowerPC 85xx linux kernel. 2# Makefile for the PowerPC 85xx linux kernel.
3# 3#
4obj-$(CONFIG_PPC_85xx) += misc.o
5obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o 4obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
6obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o 5obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
7obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o 6obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
8obj-$(CONFIG_MPC8544_DS) += mpc8544_ds.o 7obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
9obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o 8obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
diff --git a/arch/powerpc/platforms/85xx/misc.c b/arch/powerpc/platforms/85xx/misc.c
deleted file mode 100644
index 4fe376e9c3b6..000000000000
--- a/arch/powerpc/platforms/85xx/misc.c
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * MPC85xx generic code.
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/irq.h>
14#include <linux/module.h>
15#include <asm/irq.h>
16#include <asm/io.h>
17#include <asm/prom.h>
18#include <sysdev/fsl_soc.h>
19
20static __be32 __iomem *rstcr;
21
22extern void abort(void);
23
24static int __init mpc85xx_rstcr(void)
25{
26 struct device_node *np;
27 np = of_find_node_by_name(NULL, "global-utilities");
28 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
29 const u32 *prop = of_get_property(np, "reg", NULL);
30 if (prop) {
31 /* map reset control register
32 * 0xE00B0 is offset of reset control register
33 */
34 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
35 if (!rstcr)
36 printk (KERN_EMERG "Error: reset control "
37 "register not mapped!\n");
38 }
39 } else
40 printk (KERN_INFO "rstcr compatible register does not exist!\n");
41 if (np)
42 of_node_put(np);
43 return 0;
44}
45
46arch_initcall(mpc85xx_rstcr);
47
48void mpc85xx_restart(char *cmd)
49{
50 local_irq_disable();
51 if (rstcr)
52 /* set reset control register */
53 out_be32(rstcr, 0x2); /* HRESET_REQ */
54 abort();
55}
diff --git a/arch/powerpc/platforms/85xx/mpc8540_ads.h b/arch/powerpc/platforms/85xx/mpc8540_ads.h
deleted file mode 100644
index da82f4c0fdac..000000000000
--- a/arch/powerpc/platforms/85xx/mpc8540_ads.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/powerpc/platforms/85xx/mpc8540_ads.h
3 *
4 * MPC8540ADS board definitions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * Copyright 2004 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#ifndef __MACH_MPC8540ADS_H__
18#define __MACH_MPC8540ADS_H__
19
20#include <linux/initrd.h>
21
22#define BOARD_CCSRBAR ((uint)0xe0000000)
23#define BCSR_ADDR ((uint)0xf8000000)
24#define BCSR_SIZE ((uint)(32 * 1024))
25
26/* PCI interrupt controller */
27#define PIRQA MPC85xx_IRQ_EXT1
28#define PIRQB MPC85xx_IRQ_EXT2
29#define PIRQC MPC85xx_IRQ_EXT3
30#define PIRQD MPC85xx_IRQ_EXT4
31
32/* Offset of CPM register space */
33#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
34
35#endif /* __MACH_MPC8540ADS_H__ */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h b/arch/powerpc/platforms/85xx/mpc85xx.h
deleted file mode 100644
index 5b34deef12b5..000000000000
--- a/arch/powerpc/platforms/85xx/mpc85xx.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/powerpc/platforms/85xx/mpc85xx.h
3 *
4 * MPC85xx soc definitions/function decls
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * Copyright 2005 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17extern void mpc85xx_restart(char *);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 40a828675c7b..bccdc25f83a2 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -17,26 +17,22 @@
17#include <linux/kdev_t.h> 17#include <linux/kdev_t.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/seq_file.h> 19#include <linux/seq_file.h>
20#include <linux/of_platform.h>
20 21
21#include <asm/system.h> 22#include <asm/system.h>
22#include <asm/time.h> 23#include <asm/time.h>
23#include <asm/machdep.h> 24#include <asm/machdep.h>
24#include <asm/pci-bridge.h> 25#include <asm/pci-bridge.h>
25#include <asm/mpc85xx.h>
26#include <asm/prom.h>
27#include <asm/mpic.h> 26#include <asm/mpic.h>
28#include <mm/mmu_decl.h> 27#include <mm/mmu_decl.h>
29#include <asm/udbg.h> 28#include <asm/udbg.h>
30 29
31#include <sysdev/fsl_soc.h> 30#include <sysdev/fsl_soc.h>
32#include <sysdev/fsl_pci.h> 31#include <sysdev/fsl_pci.h>
33#include "mpc85xx.h"
34 32
35#ifdef CONFIG_CPM2 33#ifdef CONFIG_CPM2
36#include <linux/fs_enet_pd.h>
37#include <asm/cpm2.h> 34#include <asm/cpm2.h>
38#include <sysdev/cpm2_pic.h> 35#include <sysdev/cpm2_pic.h>
39#include <asm/fs_pd.h>
40#endif 36#endif
41 37
42#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
@@ -96,10 +92,10 @@ static void __init mpc85xx_ads_pic_init(void)
96 92
97#ifdef CONFIG_CPM2 93#ifdef CONFIG_CPM2
98 /* Setup CPM2 PIC */ 94 /* Setup CPM2 PIC */
99 np = of_find_node_by_type(NULL, "cpm-pic"); 95 np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
100 if (np == NULL) { 96 if (np == NULL) {
101 printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); 97 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
102 return; 98 return;
103 } 99 }
104 irq = irq_of_parse_and_map(np, 0); 100 irq = irq_of_parse_and_map(np, 0);
105 101
@@ -112,87 +108,80 @@ static void __init mpc85xx_ads_pic_init(void)
112 * Setup the architecture 108 * Setup the architecture
113 */ 109 */
114#ifdef CONFIG_CPM2 110#ifdef CONFIG_CPM2
115void init_fcc_ioports(struct fs_platform_info *fpi) 111struct cpm_pin {
112 int port, pin, flags;
113};
114
115static struct cpm_pin mpc8560_ads_pins[] = {
116 /* SCC1 */
117 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
118 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
119 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
120
121 /* SCC2 */
122 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
123 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
124 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
125
126 /* FCC2 */
127 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
128 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
129 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
130 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
131 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
132 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
133 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
134 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
135 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
136 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
137 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
138 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
139 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
140 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
141 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
142 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
143
144 /* FCC3 */
145 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
146 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
147 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
148 {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
149 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
150 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
151 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
152 {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
153 {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
154 {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
155 {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
156 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
157 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
158 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
159 {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
160 {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
161};
162
163static void __init init_ioports(void)
116{ 164{
117 struct io_port *io = cpm2_map(im_ioport); 165 int i;
118 int fcc_no = fs_get_fcc_index(fpi->fs_no); 166
119 int target; 167 for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
120 u32 tempval; 168 struct cpm_pin *pin = &mpc8560_ads_pins[i];
121 169 cpm2_set_pin(pin->port, pin->pin, pin->flags);
122 switch(fcc_no) {
123 case 1:
124 tempval = in_be32(&io->iop_pdirb);
125 tempval &= ~PB2_DIRB0;
126 tempval |= PB2_DIRB1;
127 out_be32(&io->iop_pdirb, tempval);
128
129 tempval = in_be32(&io->iop_psorb);
130 tempval &= ~PB2_PSORB0;
131 tempval |= PB2_PSORB1;
132 out_be32(&io->iop_psorb, tempval);
133
134 tempval = in_be32(&io->iop_pparb);
135 tempval |= (PB2_DIRB0 | PB2_DIRB1);
136 out_be32(&io->iop_pparb, tempval);
137
138 target = CPM_CLK_FCC2;
139 break;
140 case 2:
141 tempval = in_be32(&io->iop_pdirb);
142 tempval &= ~PB3_DIRB0;
143 tempval |= PB3_DIRB1;
144 out_be32(&io->iop_pdirb, tempval);
145
146 tempval = in_be32(&io->iop_psorb);
147 tempval &= ~PB3_PSORB0;
148 tempval |= PB3_PSORB1;
149 out_be32(&io->iop_psorb, tempval);
150
151 tempval = in_be32(&io->iop_pparb);
152 tempval |= (PB3_DIRB0 | PB3_DIRB1);
153 out_be32(&io->iop_pparb, tempval);
154
155 tempval = in_be32(&io->iop_pdirc);
156 tempval |= PC3_DIRC1;
157 out_be32(&io->iop_pdirc, tempval);
158
159 tempval = in_be32(&io->iop_pparc);
160 tempval |= PC3_DIRC1;
161 out_be32(&io->iop_pparc, tempval);
162
163 target = CPM_CLK_FCC3;
164 break;
165 default:
166 printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
167 return;
168 } 170 }
169 171
170 /* Port C has clocks...... */ 172 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
171 tempval = in_be32(&io->iop_psorc); 173 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
172 tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); 174 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
173 out_be32(&io->iop_psorc, tempval); 175 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
174 176 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
175 tempval = in_be32(&io->iop_pdirc); 177 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
176 tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); 178 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
177 out_be32(&io->iop_pdirc, tempval); 179 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
178 tempval = in_be32(&io->iop_pparc);
179 tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
180 out_be32(&io->iop_pparc, tempval);
181
182 cpm2_unmap(io);
183
184 /* Configure Serial Interface clock routing.
185 * First, clear FCC bits to zero,
186 * then set the ones we want.
187 */
188 cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
189 cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
190} 180}
191#endif 181#endif
192 182
193static void __init mpc85xx_ads_setup_arch(void) 183static void __init mpc85xx_ads_setup_arch(void)
194{ 184{
195 struct device_node *cpu;
196#ifdef CONFIG_PCI 185#ifdef CONFIG_PCI
197 struct device_node *np; 186 struct device_node *np;
198#endif 187#endif
@@ -200,25 +189,15 @@ static void __init mpc85xx_ads_setup_arch(void)
200 if (ppc_md.progress) 189 if (ppc_md.progress)
201 ppc_md.progress("mpc85xx_ads_setup_arch()", 0); 190 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
202 191
203 cpu = of_find_node_by_type(NULL, "cpu");
204 if (cpu != 0) {
205 const unsigned int *fp;
206
207 fp = of_get_property(cpu, "clock-frequency", NULL);
208 if (fp != 0)
209 loops_per_jiffy = *fp / HZ;
210 else
211 loops_per_jiffy = 50000000 / HZ;
212 of_node_put(cpu);
213 }
214
215#ifdef CONFIG_CPM2 192#ifdef CONFIG_CPM2
216 cpm2_reset(); 193 cpm2_reset();
194 init_ioports();
217#endif 195#endif
218 196
219#ifdef CONFIG_PCI 197#ifdef CONFIG_PCI
220 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) 198 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
221 fsl_add_bridge(np, 1); 199 fsl_add_bridge(np, 1);
200
222 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 201 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
223#endif 202#endif
224} 203}
@@ -244,6 +223,24 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
244 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); 223 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
245} 224}
246 225
226static struct of_device_id __initdata of_bus_ids[] = {
227 { .name = "soc", },
228 { .type = "soc", },
229 { .name = "cpm", },
230 { .name = "localbus", },
231 {},
232};
233
234static int __init declare_of_platform_devices(void)
235{
236 if (!machine_is(mpc85xx_ads))
237 return 0;
238
239 of_platform_bus_probe(NULL, of_bus_ids, NULL);
240 return 0;
241}
242device_initcall(declare_of_platform_devices);
243
247/* 244/*
248 * Called very early, device-tree isn't unflattened 245 * Called very early, device-tree isn't unflattened
249 */ 246 */
@@ -261,7 +258,7 @@ define_machine(mpc85xx_ads) {
261 .init_IRQ = mpc85xx_ads_pic_init, 258 .init_IRQ = mpc85xx_ads_pic_init,
262 .show_cpuinfo = mpc85xx_ads_show_cpuinfo, 259 .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
263 .get_irq = mpic_get_irq, 260 .get_irq = mpic_get_irq,
264 .restart = mpc85xx_restart, 261 .restart = fsl_rstcr_restart,
265 .calibrate_decr = generic_calibrate_decr, 262 .calibrate_decr = generic_calibrate_decr,
266 .progress = udbg_progress, 263 .progress = udbg_progress,
267}; 264};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.h b/arch/powerpc/platforms/85xx/mpc85xx_ads.h
deleted file mode 100644
index 46c3532992aa..000000000000
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * MPC85xx ADS board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * 2006 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 */
17
18#ifndef __MACH_MPC85XXADS_H
19#define __MACH_MPC85XXADS_H
20
21#include <linux/initrd.h>
22#include <sysdev/fsl_soc.h>
23
24#define BCSR_ADDR ((uint)0xf8000000)
25#define BCSR_SIZE ((uint)(32 * 1024))
26
27#ifdef CONFIG_CPM2
28
29#define MPC85xx_CPM_OFFSET (0x80000)
30
31#define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET)
32#define CPM_IRQ_OFFSET 60
33
34#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
35#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
36#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
37#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
38#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
39#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
40
41/* FCC1 Clock Source Configuration. These can be
42 * redefined in the board specific file.
43 * Can only choose from CLK9-12 */
44#define F1_RXCLK 12
45#define F1_TXCLK 11
46
47/* FCC2 Clock Source Configuration. These can be
48 * redefined in the board specific file.
49 * Can only choose from CLK13-16 */
50#define F2_RXCLK 13
51#define F2_TXCLK 14
52
53/* FCC3 Clock Source Configuration. These can be
54 * redefined in the board specific file.
55 * Can only choose from CLK13-16 */
56#define F3_RXCLK 15
57#define F3_TXCLK 16
58
59#endif /* CONFIG_CPM2 */
60#endif /* __MACH_MPC85XXADS_H */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 2d4cb7847604..4d063eec6210 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -35,9 +35,7 @@
35#include <asm/io.h> 35#include <asm/io.h>
36#include <asm/machdep.h> 36#include <asm/machdep.h>
37#include <asm/ipic.h> 37#include <asm/ipic.h>
38#include <asm/bootinfo.h>
39#include <asm/pci-bridge.h> 38#include <asm/pci-bridge.h>
40#include <asm/mpc85xx.h>
41#include <asm/irq.h> 39#include <asm/irq.h>
42#include <mm/mmu_decl.h> 40#include <mm/mmu_decl.h>
43#include <asm/prom.h> 41#include <asm/prom.h>
@@ -47,7 +45,15 @@
47 45
48#include <sysdev/fsl_soc.h> 46#include <sysdev/fsl_soc.h>
49#include <sysdev/fsl_pci.h> 47#include <sysdev/fsl_pci.h>
50#include "mpc85xx.h" 48
49/* CADMUS info */
50/* xxx - galak, move into device tree */
51#define CADMUS_BASE (0xf8004000)
52#define CADMUS_SIZE (256)
53#define CM_VER (0)
54#define CM_CSR (1)
55#define CM_RST (2)
56
51 57
52static int cds_pci_slot = 2; 58static int cds_pci_slot = 2;
53static volatile u8 *cadmus; 59static volatile u8 *cadmus;
@@ -97,7 +103,7 @@ static void mpc85xx_cds_restart(char *cmd)
97 * If we can't find the VIA chip (maybe the P2P bridge is disabled) 103 * If we can't find the VIA chip (maybe the P2P bridge is disabled)
98 * or the VIA chip reset didn't work, just use the default reset. 104 * or the VIA chip reset didn't work, just use the default reset.
99 */ 105 */
100 mpc85xx_restart(NULL); 106 fsl_rstcr_restart(NULL);
101} 107}
102 108
103static void __init mpc85xx_cds_pci_irq_fixup(struct pci_dev *dev) 109static void __init mpc85xx_cds_pci_irq_fixup(struct pci_dev *dev)
@@ -266,7 +272,6 @@ device_initcall(mpc85xx_cds_8259_attach);
266 */ 272 */
267static void __init mpc85xx_cds_setup_arch(void) 273static void __init mpc85xx_cds_setup_arch(void)
268{ 274{
269 struct device_node *cpu;
270#ifdef CONFIG_PCI 275#ifdef CONFIG_PCI
271 struct device_node *np; 276 struct device_node *np;
272#endif 277#endif
@@ -274,18 +279,6 @@ static void __init mpc85xx_cds_setup_arch(void)
274 if (ppc_md.progress) 279 if (ppc_md.progress)
275 ppc_md.progress("mpc85xx_cds_setup_arch()", 0); 280 ppc_md.progress("mpc85xx_cds_setup_arch()", 0);
276 281
277 cpu = of_find_node_by_type(NULL, "cpu");
278 if (cpu != 0) {
279 const unsigned int *fp;
280
281 fp = of_get_property(cpu, "clock-frequency", NULL);
282 if (fp != 0)
283 loops_per_jiffy = *fp / HZ;
284 else
285 loops_per_jiffy = 500000000 / HZ;
286 of_node_put(cpu);
287 }
288
289 cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE); 282 cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
290 cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1; 283 cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
291 284
@@ -297,14 +290,18 @@ static void __init mpc85xx_cds_setup_arch(void)
297 } 290 }
298 291
299#ifdef CONFIG_PCI 292#ifdef CONFIG_PCI
300 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) { 293 for_each_node_by_type(np, "pci") {
301 struct resource rsrc; 294 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
302 of_address_to_resource(np, 0, &rsrc); 295 of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
303 if ((rsrc.start & 0xfffff) == 0x8000) 296 struct resource rsrc;
304 fsl_add_bridge(np, 1); 297 of_address_to_resource(np, 0, &rsrc);
305 else 298 if ((rsrc.start & 0xfffff) == 0x8000)
306 fsl_add_bridge(np, 0); 299 fsl_add_bridge(np, 1);
300 else
301 fsl_add_bridge(np, 0);
302 }
307 } 303 }
304
308 ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup; 305 ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
309 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 306 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
310#endif 307#endif
@@ -353,7 +350,7 @@ define_machine(mpc85xx_cds) {
353 .restart = mpc85xx_cds_restart, 350 .restart = mpc85xx_cds_restart,
354 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 351 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
355#else 352#else
356 .restart = mpc85xx_restart, 353 .restart = fsl_rstcr_restart,
357#endif 354#endif
358 .calibrate_decr = generic_calibrate_decr, 355 .calibrate_decr = generic_calibrate_decr,
359 .progress = udbg_progress, 356 .progress = udbg_progress,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.h b/arch/powerpc/platforms/85xx/mpc85xx_cds.h
deleted file mode 100644
index b251c9feb3dc..000000000000
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * arch/powerpc/platforms/85xx/mpc85xx_cds.h
3 *
4 * MPC85xx CDS board definitions
5 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 *
8 * Copyright 2004 Freescale Semiconductor, Inc
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#ifndef __MACH_MPC85XX_CDS_H__
18#define __MACH_MPC85XX_CDS_H__
19
20/* CADMUS info */
21#define CADMUS_BASE (0xf8004000)
22#define CADMUS_SIZE (256)
23#define CM_VER (0)
24#define CM_CSR (1)
25#define CM_RST (2)
26
27/* CDS NVRAM/RTC */
28#define CDS_RTC_ADDR (0xf8000000)
29#define CDS_RTC_SIZE (8 * 1024)
30
31/* PCI interrupt controller */
32#define PIRQ0A MPC85xx_IRQ_EXT0
33#define PIRQ0B MPC85xx_IRQ_EXT1
34#define PIRQ0C MPC85xx_IRQ_EXT2
35#define PIRQ0D MPC85xx_IRQ_EXT3
36#define PIRQ1A MPC85xx_IRQ_EXT11
37
38#define NR_8259_INTS 16
39#define CPM_IRQ_OFFSET NR_8259_INTS
40
41#define MPC85xx_OPENPIC_IRQ_OFFSET 80
42
43#endif /* __MACH_MPC85XX_CDS_H__ */
diff --git a/arch/powerpc/platforms/85xx/mpc8544_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 48983bc56d46..59c121a97ac7 100644
--- a/arch/powerpc/platforms/85xx/mpc8544_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * MPC8544 DS Board Setup 2 * MPC85xx DS Board Setup
3 * 3 *
4 * Author Xianghua Xiao (x.xiao@freescale.com) 4 * Author Xianghua Xiao (x.xiao@freescale.com)
5 * Roy Zang <tie-fei.zang@freescale.com> 5 * Roy Zang <tie-fei.zang@freescale.com>
@@ -24,7 +24,6 @@
24#include <asm/time.h> 24#include <asm/time.h>
25#include <asm/machdep.h> 25#include <asm/machdep.h>
26#include <asm/pci-bridge.h> 26#include <asm/pci-bridge.h>
27#include <asm/mpc85xx.h>
28#include <mm/mmu_decl.h> 27#include <mm/mmu_decl.h>
29#include <asm/prom.h> 28#include <asm/prom.h>
30#include <asm/udbg.h> 29#include <asm/udbg.h>
@@ -33,7 +32,6 @@
33 32
34#include <sysdev/fsl_soc.h> 33#include <sysdev/fsl_soc.h>
35#include <sysdev/fsl_pci.h> 34#include <sysdev/fsl_pci.h>
36#include "mpc85xx.h"
37 35
38#undef DEBUG 36#undef DEBUG
39 37
@@ -44,7 +42,7 @@
44#endif 42#endif
45 43
46#ifdef CONFIG_PPC_I8259 44#ifdef CONFIG_PPC_I8259
47static void mpc8544_8259_cascade(unsigned int irq, struct irq_desc *desc) 45static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
48{ 46{
49 unsigned int cascade_irq = i8259_irq(); 47 unsigned int cascade_irq = i8259_irq();
50 48
@@ -55,7 +53,7 @@ static void mpc8544_8259_cascade(unsigned int irq, struct irq_desc *desc)
55} 53}
56#endif /* CONFIG_PPC_I8259 */ 54#endif /* CONFIG_PPC_I8259 */
57 55
58void __init mpc8544_ds_pic_init(void) 56void __init mpc85xx_ds_pic_init(void)
59{ 57{
60 struct mpic *mpic; 58 struct mpic *mpic;
61 struct resource r; 59 struct resource r;
@@ -104,16 +102,17 @@ void __init mpc8544_ds_pic_init(void)
104 return; 102 return;
105 } 103 }
106 104
107 DBG("mpc8544ds: cascade mapped to irq %d\n", cascade_irq); 105 DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
108 106
109 i8259_init(cascade_node, 0); 107 i8259_init(cascade_node, 0);
110 of_node_put(cascade_node); 108 of_node_put(cascade_node);
111 109
112 set_irq_chained_handler(cascade_irq, mpc8544_8259_cascade); 110 set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
113#endif /* CONFIG_PPC_I8259 */ 111#endif /* CONFIG_PPC_I8259 */
114} 112}
115 113
116#ifdef CONFIG_PCI 114#ifdef CONFIG_PCI
115static int primary_phb_addr;
117extern int uses_fsl_uli_m1575; 116extern int uses_fsl_uli_m1575;
118extern int uli_exclude_device(struct pci_controller *hose, 117extern int uli_exclude_device(struct pci_controller *hose,
119 u_char bus, u_char devfn); 118 u_char bus, u_char devfn);
@@ -121,13 +120,13 @@ extern int uli_exclude_device(struct pci_controller *hose,
121static int mpc85xx_exclude_device(struct pci_controller *hose, 120static int mpc85xx_exclude_device(struct pci_controller *hose,
122 u_char bus, u_char devfn) 121 u_char bus, u_char devfn)
123{ 122{
124 struct device_node* node; 123 struct device_node* node;
125 struct resource rsrc; 124 struct resource rsrc;
126 125
127 node = (struct device_node *)hose->arch_data; 126 node = (struct device_node *)hose->arch_data;
128 of_address_to_resource(node, 0, &rsrc); 127 of_address_to_resource(node, 0, &rsrc);
129 128
130 if ((rsrc.start & 0xfffff) == 0xb000) { 129 if ((rsrc.start & 0xfffff) == primary_phb_addr) {
131 return uli_exclude_device(hose, bus, devfn); 130 return uli_exclude_device(hose, bus, devfn);
132 } 131 }
133 132
@@ -138,29 +137,33 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
138/* 137/*
139 * Setup the architecture 138 * Setup the architecture
140 */ 139 */
141static void __init mpc8544_ds_setup_arch(void) 140static void __init mpc85xx_ds_setup_arch(void)
142{ 141{
143#ifdef CONFIG_PCI 142#ifdef CONFIG_PCI
144 struct device_node *np; 143 struct device_node *np;
145#endif 144#endif
146 145
147 if (ppc_md.progress) 146 if (ppc_md.progress)
148 ppc_md.progress("mpc8544_ds_setup_arch()", 0); 147 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
149 148
150#ifdef CONFIG_PCI 149#ifdef CONFIG_PCI
151 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) { 150 for_each_node_by_type(np, "pci") {
152 struct resource rsrc; 151 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
153 of_address_to_resource(np, 0, &rsrc); 152 of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
154 if ((rsrc.start & 0xfffff) == 0xb000) 153 struct resource rsrc;
155 fsl_add_bridge(np, 1); 154 of_address_to_resource(np, 0, &rsrc);
156 else 155 if ((rsrc.start & 0xfffff) == primary_phb_addr)
157 fsl_add_bridge(np, 0); 156 fsl_add_bridge(np, 1);
157 else
158 fsl_add_bridge(np, 0);
159 }
158 } 160 }
161
159 uses_fsl_uli_m1575 = 1; 162 uses_fsl_uli_m1575 = 1;
160 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 163 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
161#endif 164#endif
162 165
163 printk("MPC8544 DS board from Freescale Semiconductor\n"); 166 printk("MPC85xx DS board from Freescale Semiconductor\n");
164} 167}
165 168
166/* 169/*
@@ -170,19 +173,57 @@ static int __init mpc8544_ds_probe(void)
170{ 173{
171 unsigned long root = of_get_flat_dt_root(); 174 unsigned long root = of_get_flat_dt_root();
172 175
173 return of_flat_dt_is_compatible(root, "MPC8544DS"); 176 if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
177#ifdef CONFIG_PCI
178 primary_phb_addr = 0xb000;
179#endif
180 return 1;
181 } else {
182 return 0;
183 }
184}
185
186/*
187 * Called very early, device-tree isn't unflattened
188 */
189static int __init mpc8572_ds_probe(void)
190{
191 unsigned long root = of_get_flat_dt_root();
192
193 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
194#ifdef CONFIG_PCI
195 primary_phb_addr = 0x8000;
196#endif
197 return 1;
198 } else {
199 return 0;
200 }
174} 201}
175 202
176define_machine(mpc8544_ds) { 203define_machine(mpc8544_ds) {
177 .name = "MPC8544 DS", 204 .name = "MPC8544 DS",
178 .probe = mpc8544_ds_probe, 205 .probe = mpc8544_ds_probe,
179 .setup_arch = mpc8544_ds_setup_arch, 206 .setup_arch = mpc85xx_ds_setup_arch,
180 .init_IRQ = mpc8544_ds_pic_init, 207 .init_IRQ = mpc85xx_ds_pic_init,
208#ifdef CONFIG_PCI
209 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
210#endif
211 .get_irq = mpic_get_irq,
212 .restart = fsl_rstcr_restart,
213 .calibrate_decr = generic_calibrate_decr,
214 .progress = udbg_progress,
215};
216
217define_machine(mpc8572_ds) {
218 .name = "MPC8572 DS",
219 .probe = mpc8572_ds_probe,
220 .setup_arch = mpc85xx_ds_setup_arch,
221 .init_IRQ = mpc85xx_ds_pic_init,
181#ifdef CONFIG_PCI 222#ifdef CONFIG_PCI
182 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 223 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
183#endif 224#endif
184 .get_irq = mpic_get_irq, 225 .get_irq = mpic_get_irq,
185 .restart = mpc85xx_restart, 226 .restart = fsl_rstcr_restart,
186 .calibrate_decr = generic_calibrate_decr, 227 .calibrate_decr = generic_calibrate_decr,
187 .progress = udbg_progress, 228 .progress = udbg_progress,
188}; 229};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 7ca7e676f1c4..61b3eedf41b9 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -38,9 +38,7 @@
38#include <asm/time.h> 38#include <asm/time.h>
39#include <asm/io.h> 39#include <asm/io.h>
40#include <asm/machdep.h> 40#include <asm/machdep.h>
41#include <asm/bootinfo.h>
42#include <asm/pci-bridge.h> 41#include <asm/pci-bridge.h>
43#include <asm/mpc85xx.h>
44#include <asm/irq.h> 42#include <asm/irq.h>
45#include <mm/mmu_decl.h> 43#include <mm/mmu_decl.h>
46#include <asm/prom.h> 44#include <asm/prom.h>
@@ -51,8 +49,6 @@
51#include <asm/qe_ic.h> 49#include <asm/qe_ic.h>
52#include <asm/mpic.h> 50#include <asm/mpic.h>
53 51
54#include "mpc85xx.h"
55
56#undef DEBUG 52#undef DEBUG
57#ifdef DEBUG 53#ifdef DEBUG
58#define DBG(fmt...) udbg_printf(fmt) 54#define DBG(fmt...) udbg_printf(fmt)
@@ -73,17 +69,6 @@ static void __init mpc85xx_mds_setup_arch(void)
73 if (ppc_md.progress) 69 if (ppc_md.progress)
74 ppc_md.progress("mpc85xx_mds_setup_arch()", 0); 70 ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
75 71
76 np = of_find_node_by_type(NULL, "cpu");
77 if (np != NULL) {
78 const unsigned int *fp =
79 of_get_property(np, "clock-frequency", NULL);
80 if (fp != NULL)
81 loops_per_jiffy = *fp / HZ;
82 else
83 loops_per_jiffy = 50000000 / HZ;
84 of_node_put(np);
85 }
86
87 /* Map BCSR area */ 72 /* Map BCSR area */
88 np = of_find_node_by_name(NULL, "bcsr"); 73 np = of_find_node_by_name(NULL, "bcsr");
89 if (np != NULL) { 74 if (np != NULL) {
@@ -95,9 +80,17 @@ static void __init mpc85xx_mds_setup_arch(void)
95 } 80 }
96 81
97#ifdef CONFIG_PCI 82#ifdef CONFIG_PCI
98 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) 83 for_each_node_by_type(np, "pci") {
99 fsl_add_bridge(np, 1); 84 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
100 of_node_put(np); 85 of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
86 struct resource rsrc;
87 of_address_to_resource(np, 0, &rsrc);
88 if ((rsrc.start & 0xfffff) == 0x8000)
89 fsl_add_bridge(np, 1);
90 else
91 fsl_add_bridge(np, 0);
92 }
93 }
101#endif 94#endif
102 95
103#ifdef CONFIG_QUICC_ENGINE 96#ifdef CONFIG_QUICC_ENGINE
@@ -119,18 +112,22 @@ static void __init mpc85xx_mds_setup_arch(void)
119 } 112 }
120 113
121 if (bcsr_regs) { 114 if (bcsr_regs) {
122 u8 bcsr_phy; 115#define BCSR_UCC1_GETH_EN (0x1 << 7)
116#define BCSR_UCC2_GETH_EN (0x1 << 7)
117#define BCSR_UCC1_MODE_MSK (0x3 << 4)
118#define BCSR_UCC2_MODE_MSK (0x3 << 0)
123 119
124 /* Reset the Ethernet PHY */ 120 /* Turn off UCC1 & UCC2 */
125 bcsr_phy = in_be8(&bcsr_regs[9]); 121 clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
126 bcsr_phy &= ~0x20; 122 clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
127 out_be8(&bcsr_regs[9], bcsr_phy);
128 123
129 udelay(1000); 124 /* Mode is RGMII, all bits clear */
125 clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK |
126 BCSR_UCC2_MODE_MSK);
130 127
131 bcsr_phy = in_be8(&bcsr_regs[9]); 128 /* Turn UCC1 & UCC2 on */
132 bcsr_phy |= 0x20; 129 setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
133 out_be8(&bcsr_regs[9], bcsr_phy); 130 setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
134 131
135 iounmap(bcsr_regs); 132 iounmap(bcsr_regs);
136 } 133 }
@@ -186,7 +183,7 @@ static void __init mpc85xx_mds_pic_init(void)
186 if (!np) 183 if (!np)
187 return; 184 return;
188 185
189 qe_ic_init(np, 0); 186 qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);
190 of_node_put(np); 187 of_node_put(np);
191#endif /* CONFIG_QUICC_ENGINE */ 188#endif /* CONFIG_QUICC_ENGINE */
192} 189}
@@ -204,7 +201,7 @@ define_machine(mpc85xx_mds) {
204 .setup_arch = mpc85xx_mds_setup_arch, 201 .setup_arch = mpc85xx_mds_setup_arch,
205 .init_IRQ = mpc85xx_mds_pic_init, 202 .init_IRQ = mpc85xx_mds_pic_init,
206 .get_irq = mpic_get_irq, 203 .get_irq = mpic_get_irq,
207 .restart = mpc85xx_restart, 204 .restart = fsl_rstcr_restart,
208 .calibrate_decr = generic_calibrate_decr, 205 .calibrate_decr = generic_calibrate_decr,
209 .progress = udbg_progress, 206 .progress = udbg_progress,
210#ifdef CONFIG_PCI 207#ifdef CONFIG_PCI
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 15:43:11 -0500