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-rw-r--r--arch/powerpc/platforms/85xx/Kconfig23
-rw-r--r--arch/powerpc/platforms/85xx/Makefile1
-rw-r--r--arch/powerpc/platforms/85xx/corenet_ds.c125
-rw-r--r--arch/powerpc/platforms/85xx/corenet_ds.h19
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c1
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_rdb.c34
-rw-r--r--arch/powerpc/platforms/85xx/p4080_ds.c74
-rw-r--r--arch/powerpc/platforms/85xx/socrates_fpga_pic.c6
8 files changed, 274 insertions, 9 deletions
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index d3a975e8fd3e..d95121894eb7 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -1,6 +1,7 @@
1menuconfig MPC85xx 1menuconfig FSL_SOC_BOOKE
2 bool "Machine Type" 2 bool "Freescale Book-E Machine Type"
3 depends on PPC_85xx 3 depends on PPC_85xx || PPC_BOOK3E
4 select FSL_SOC
4 select PPC_UDBG_16550 5 select PPC_UDBG_16550
5 select MPIC 6 select MPIC
6 select PPC_PCI_CHOICE 7 select PPC_PCI_CHOICE
@@ -8,7 +9,7 @@ menuconfig MPC85xx
8 select SERIAL_8250_SHARE_IRQ if SERIAL_8250 9 select SERIAL_8250_SHARE_IRQ if SERIAL_8250
9 default y 10 default y
10 11
11if MPC85xx 12if FSL_SOC_BOOKE
12 13
13config MPC8540_ADS 14config MPC8540_ADS
14 bool "Freescale MPC8540 ADS" 15 bool "Freescale MPC8540 ADS"
@@ -144,7 +145,19 @@ config SBC8560
144 help 145 help
145 This option enables support for the Wind River SBC8560 board 146 This option enables support for the Wind River SBC8560 board
146 147
147endif # MPC85xx 148config P4080_DS
149 bool "Freescale P4080 DS"
150 select DEFAULT_UIMAGE
151 select PPC_FSL_BOOK3E
152 select PPC_E500MC
153 select PHYS_64BIT
154 select SWIOTLB
155 select MPC8xxx_GPIO
156 select HAS_RAPIDIO
157 help
158 This option enables support for the P4080 DS board
159
160endif # FSL_SOC_BOOKE
148 161
149config TQM85xx 162config TQM85xx
150 bool 163 bool
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 9098aea0cf32..387c128f2c8c 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
10obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o 10obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
11obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o 11obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
12obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o 12obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
13obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o
13obj-$(CONFIG_STX_GP3) += stx_gp3.o 14obj-$(CONFIG_STX_GP3) += stx_gp3.o
14obj-$(CONFIG_TQM85xx) += tqm85xx.o 15obj-$(CONFIG_TQM85xx) += tqm85xx.o
15obj-$(CONFIG_SBC8560) += sbc8560.o 16obj-$(CONFIG_SBC8560) += sbc8560.o
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
new file mode 100644
index 000000000000..534c2ecc89d9
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -0,0 +1,125 @@
1/*
2 * Corenet based SoC DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/lmb.h>
20
21#include <asm/system.h>
22#include <asm/time.h>
23#include <asm/machdep.h>
24#include <asm/pci-bridge.h>
25#include <mm/mmu_decl.h>
26#include <asm/prom.h>
27#include <asm/udbg.h>
28#include <asm/mpic.h>
29
30#include <linux/of_platform.h>
31#include <sysdev/fsl_soc.h>
32#include <sysdev/fsl_pci.h>
33
34void __init corenet_ds_pic_init(void)
35{
36 struct mpic *mpic;
37 struct resource r;
38 struct device_node *np = NULL;
39 unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
40 MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
41
42 np = of_find_node_by_type(np, "open-pic");
43
44 if (np == NULL) {
45 printk(KERN_ERR "Could not find open-pic node\n");
46 return;
47 }
48
49 if (of_address_to_resource(np, 0, &r)) {
50 printk(KERN_ERR "Failed to map mpic register space\n");
51 of_node_put(np);
52 return;
53 }
54
55 if (ppc_md.get_irq == mpic_get_coreint_irq)
56 flags |= MPIC_ENABLE_COREINT;
57
58 mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC ");
59 BUG_ON(mpic == NULL);
60
61 mpic_init(mpic);
62}
63
64#ifdef CONFIG_PCI
65static int primary_phb_addr;
66#endif
67
68/*
69 * Setup the architecture
70 */
71#ifdef CONFIG_SMP
72void __init mpc85xx_smp_init(void);
73#endif
74
75void __init corenet_ds_setup_arch(void)
76{
77#ifdef CONFIG_PCI
78 struct device_node *np;
79 struct pci_controller *hose;
80#endif
81 dma_addr_t max = 0xffffffff;
82
83#ifdef CONFIG_SMP
84 mpc85xx_smp_init();
85#endif
86
87#ifdef CONFIG_PCI
88 for_each_compatible_node(np, "pci", "fsl,p4080-pcie") {
89 struct resource rsrc;
90 of_address_to_resource(np, 0, &rsrc);
91 if ((rsrc.start & 0xfffff) == primary_phb_addr)
92 fsl_add_bridge(np, 1);
93 else
94 fsl_add_bridge(np, 0);
95
96 hose = pci_find_hose_for_OF_device(np);
97 max = min(max, hose->dma_window_base_cur +
98 hose->dma_window_size);
99 }
100#endif
101
102#ifdef CONFIG_SWIOTLB
103 if (lmb_end_of_DRAM() > max) {
104 ppc_swiotlb_enable = 1;
105 set_pci_dma_ops(&swiotlb_dma_ops);
106 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
107 }
108#endif
109 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
110}
111
112static const struct of_device_id of_device_ids[] __devinitconst = {
113 {
114 .compatible = "simple-bus"
115 },
116 {
117 .compatible = "fsl,rapidio-delta",
118 },
119 {}
120};
121
122int __init corenet_ds_publish_devices(void)
123{
124 return of_platform_bus_probe(NULL, of_device_ids, NULL);
125}
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.h b/arch/powerpc/platforms/85xx/corenet_ds.h
new file mode 100644
index 000000000000..ddd700b23031
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/corenet_ds.h
@@ -0,0 +1,19 @@
1/*
2 * Corenet based SoC DS Setup
3 *
4 * Copyright 2009 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef CORENET_DS_H
13#define CORENET_DS_H
14
15extern void __init corenet_ds_pic_init(void);
16extern void __init corenet_ds_setup_arch(void);
17extern int __init corenet_ds_publish_devices(void);
18
19#endif
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 3909d57b86e3..c5028a2e5a58 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -301,6 +301,7 @@ static struct of_device_id mpc85xx_ids[] = {
301 { .compatible = "fsl,qe", }, 301 { .compatible = "fsl,qe", },
302 { .compatible = "gianfar", }, 302 { .compatible = "gianfar", },
303 { .compatible = "fsl,rapidio-delta", }, 303 { .compatible = "fsl,rapidio-delta", },
304 { .compatible = "fsl,mpc8548-guts", },
304 {}, 305 {},
305}; 306};
306 307
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index c8468de4acf6..088f30b0c088 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -44,6 +44,7 @@ void __init mpc85xx_rdb_pic_init(void)
44 struct mpic *mpic; 44 struct mpic *mpic;
45 struct resource r; 45 struct resource r;
46 struct device_node *np; 46 struct device_node *np;
47 unsigned long root = of_get_flat_dt_root();
47 48
48 np = of_find_node_by_type(NULL, "open-pic"); 49 np = of_find_node_by_type(NULL, "open-pic");
49 if (np == NULL) { 50 if (np == NULL) {
@@ -57,11 +58,18 @@ void __init mpc85xx_rdb_pic_init(void)
57 return; 58 return;
58 } 59 }
59 60
60 mpic = mpic_alloc(np, r.start, 61 if (of_flat_dt_is_compatible(root, "fsl,85XXRDB-CAMP")) {
62 mpic = mpic_alloc(np, r.start,
63 MPIC_PRIMARY |
64 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
65 0, 256, " OpenPIC ");
66 } else {
67 mpic = mpic_alloc(np, r.start,
61 MPIC_PRIMARY | MPIC_WANTS_RESET | 68 MPIC_PRIMARY | MPIC_WANTS_RESET |
62 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | 69 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
63 MPIC_SINGLE_DEST_CPU, 70 MPIC_SINGLE_DEST_CPU,
64 0, 256, " OpenPIC "); 71 0, 256, " OpenPIC ");
72 }
65 73
66 BUG_ON(mpic == NULL); 74 BUG_ON(mpic == NULL);
67 of_node_put(np); 75 of_node_put(np);
@@ -113,6 +121,7 @@ static int __init mpc85xxrdb_publish_devices(void)
113 return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL); 121 return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL);
114} 122}
115machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices); 123machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices);
124machine_device_initcall(p1020_rdb, mpc85xxrdb_publish_devices);
116 125
117/* 126/*
118 * Called very early, device-tree isn't unflattened 127 * Called very early, device-tree isn't unflattened
@@ -126,6 +135,15 @@ static int __init p2020_rdb_probe(void)
126 return 0; 135 return 0;
127} 136}
128 137
138static int __init p1020_rdb_probe(void)
139{
140 unsigned long root = of_get_flat_dt_root();
141
142 if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
143 return 1;
144 return 0;
145}
146
129define_machine(p2020_rdb) { 147define_machine(p2020_rdb) {
130 .name = "P2020 RDB", 148 .name = "P2020 RDB",
131 .probe = p2020_rdb_probe, 149 .probe = p2020_rdb_probe,
@@ -139,3 +157,17 @@ define_machine(p2020_rdb) {
139 .calibrate_decr = generic_calibrate_decr, 157 .calibrate_decr = generic_calibrate_decr,
140 .progress = udbg_progress, 158 .progress = udbg_progress,
141}; 159};
160
161define_machine(p1020_rdb) {
162 .name = "P1020 RDB",
163 .probe = p1020_rdb_probe,
164 .setup_arch = mpc85xx_rdb_setup_arch,
165 .init_IRQ = mpc85xx_rdb_pic_init,
166#ifdef CONFIG_PCI
167 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
168#endif
169 .get_irq = mpic_get_irq,
170 .restart = fsl_rstcr_restart,
171 .calibrate_decr = generic_calibrate_decr,
172 .progress = udbg_progress,
173};
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c
new file mode 100644
index 000000000000..84170460497b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p4080_ds.c
@@ -0,0 +1,74 @@
1/*
2 * P4080 DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19
20#include <asm/system.h>
21#include <asm/time.h>
22#include <asm/machdep.h>
23#include <asm/pci-bridge.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28
29#include <linux/of_platform.h>
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32
33#include "corenet_ds.h"
34
35#ifdef CONFIG_PCI
36static int primary_phb_addr;
37#endif
38
39/*
40 * Called very early, device-tree isn't unflattened
41 */
42static int __init p4080_ds_probe(void)
43{
44 unsigned long root = of_get_flat_dt_root();
45
46 if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) {
47#ifdef CONFIG_PCI
48 /* treat PCIe1 as primary,
49 * shouldn't matter as we have no ISA on the board
50 */
51 primary_phb_addr = 0x0000;
52#endif
53 return 1;
54 } else {
55 return 0;
56 }
57}
58
59define_machine(p4080_ds) {
60 .name = "P4080 DS",
61 .probe = p4080_ds_probe,
62 .setup_arch = corenet_ds_setup_arch,
63 .init_IRQ = corenet_ds_pic_init,
64#ifdef CONFIG_PCI
65 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
66#endif
67 .get_irq = mpic_get_coreint_irq,
68 .restart = fsl_rstcr_restart,
69 .calibrate_decr = generic_calibrate_decr,
70 .progress = udbg_progress,
71};
72
73machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
74machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 60edf63d0157..e5da5f62b24a 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -232,7 +232,7 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
232} 232}
233 233
234static struct irq_chip socrates_fpga_pic_chip = { 234static struct irq_chip socrates_fpga_pic_chip = {
235 .typename = " FPGA-PIC ", 235 .name = " FPGA-PIC ",
236 .ack = socrates_fpga_pic_ack, 236 .ack = socrates_fpga_pic_ack,
237 .mask = socrates_fpga_pic_mask, 237 .mask = socrates_fpga_pic_mask,
238 .mask_ack = socrates_fpga_pic_mask_ack, 238 .mask_ack = socrates_fpga_pic_mask_ack,
@@ -245,7 +245,7 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
245 irq_hw_number_t hwirq) 245 irq_hw_number_t hwirq)
246{ 246{
247 /* All interrupts are LEVEL sensitive */ 247 /* All interrupts are LEVEL sensitive */
248 get_irq_desc(virq)->status |= IRQ_LEVEL; 248 irq_to_desc(virq)->status |= IRQ_LEVEL;
249 set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, 249 set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip,
250 handle_fasteoi_irq); 250 handle_fasteoi_irq);
251 251
@@ -253,7 +253,7 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
253} 253}
254 254
255static int socrates_fpga_pic_host_xlate(struct irq_host *h, 255static int socrates_fpga_pic_host_xlate(struct irq_host *h,
256 struct device_node *ct, u32 *intspec, unsigned int intsize, 256 struct device_node *ct, const u32 *intspec, unsigned int intsize,
257 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 257 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
258{ 258{
259 struct socrates_fpga_irq_info *fpga_irq = &fpga_irqs[intspec[0]]; 259 struct socrates_fpga_irq_info *fpga_irq = &fpga_irqs[intspec[0]];