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-rw-r--r--arch/powerpc/platforms/44x/warp-nand.c105
1 files changed, 105 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
new file mode 100644
index 000000000000..84ab78ff8c03
--- /dev/null
+++ b/arch/powerpc/platforms/44x/warp-nand.c
@@ -0,0 +1,105 @@
1/*
2 * PIKA Warp(tm) NAND flash specific routines
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 */
7
8#include <linux/platform_device.h>
9#include <linux/mtd/mtd.h>
10#include <linux/mtd/map.h>
11#include <linux/mtd/partitions.h>
12#include <linux/mtd/nand.h>
13#include <linux/mtd/ndfc.h>
14
15#ifdef CONFIG_MTD_NAND_NDFC
16
17#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
18
19#define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL
20#define WARP_NAND_FLASH_REG_SIZE 0x2000
21
22static struct resource warp_ndfc = {
23 .start = WARP_NAND_FLASH_REG_ADDR,
24 .end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE,
25 .flags = IORESOURCE_MEM,
26};
27
28static struct mtd_partition nand_parts[] = {
29 {
30 .name = "kernel",
31 .offset = 0,
32 .size = 0x0200000
33 },
34 {
35 .name = "root",
36 .offset = 0x0200000,
37 .size = 0x3400000
38 },
39 {
40 .name = "user",
41 .offset = 0x3600000,
42 .size = 0x0A00000
43 },
44};
45
46struct ndfc_controller_settings warp_ndfc_settings = {
47 .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
48 .ndfc_erpn = 0,
49};
50
51static struct ndfc_chip_settings warp_chip0_settings = {
52 .bank_settings = 0x80002222,
53};
54
55struct platform_nand_ctrl warp_nand_ctrl = {
56 .priv = &warp_ndfc_settings,
57};
58
59static struct platform_device warp_ndfc_device = {
60 .name = "ndfc-nand",
61 .id = 0,
62 .dev = {
63 .platform_data = &warp_nand_ctrl,
64 },
65 .num_resources = 1,
66 .resource = &warp_ndfc,
67};
68
69static struct nand_ecclayout nand_oob_16 = {
70 .eccbytes = 3,
71 .eccpos = { 0, 1, 2, 3, 6, 7 },
72 .oobfree = { {.offset = 8, .length = 16} }
73};
74
75static struct platform_nand_chip warp_nand_chip0 = {
76 .nr_chips = 1,
77 .chip_offset = CS_NAND_0,
78 .nr_partitions = ARRAY_SIZE(nand_parts),
79 .partitions = nand_parts,
80 .chip_delay = 50,
81 .ecclayout = &nand_oob_16,
82 .priv = &warp_chip0_settings,
83};
84
85static struct platform_device warp_nand_device = {
86 .name = "ndfc-chip",
87 .id = 0,
88 .num_resources = 1,
89 .resource = &warp_ndfc,
90 .dev = {
91 .platform_data = &warp_nand_chip0,
92 .parent = &warp_ndfc_device.dev,
93 }
94};
95
96static int warp_setup_nand_flash(void)
97{
98 platform_device_register(&warp_ndfc_device);
99 platform_device_register(&warp_nand_device);
100
101 return 0;
102}
103device_initcall(warp_setup_nand_flash);
104
105#endif