1 files changed, 14 insertions, 10 deletions

diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 96a64d6a8bdf..7466374d2787 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -561,18 +561,13 @@ static int power8_generic_events[] = {
 static u64 power8_bhrb_filter_map(u64 branch_sample_type)
 {
         u64 pmu_bhrb_filter = 0;
-        u64 br_privilege = branch_sample_type & ONLY_PLM;
 
-        /* BHRB and regular PMU events share the same prvillege state
+        /* BHRB and regular PMU events share the same privilege state
          * filter configuration. BHRB is always recorded along with a
-         * regular PMU event. So privilege state filter criteria for BHRB
-         * and the companion PMU events has to be the same. As a default
-         * "perf record" tool sets all privillege bits ON when no filter
-         * criteria is provided in the command line. So as along as all
-         * privillege bits are ON or they are OFF, we are good to go.
+         * regular PMU event. As the privilege state filter is handled
+         * in the basic PMC configuration of the accompanying regular
+         * PMU event, we ignore any separate BHRB specific request.
          */
-        if ((br_privilege != 7) && (br_privilege != 0))
-                return -1;
 
         /* No branch filter requested */
         if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY)
@@ -621,10 +616,19 @@ static struct power_pmu power8_pmu = {
 
 static int __init init_power8_pmu(void)
 {
+        int rc;
+
         if (!cur_cpu_spec->oprofile_cpu_type ||
             strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power8"))
                 return -ENODEV;
 
-        return register_power_pmu(&power8_pmu);
+        rc = register_power_pmu(&power8_pmu);
+        if (rc)
+                return rc;
+
+        /* Tell userspace that EBB is supported */
+        cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_EBB;
+
+        return 0;
 }
 early_initcall(init_power8_pmu);