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-rw-r--r--arch/powerpc/mm/hash_low_32.S8
-rw-r--r--arch/powerpc/mm/hash_low_64.S156
-rw-r--r--arch/powerpc/mm/numa.c6
-rw-r--r--arch/powerpc/mm/tlb_low_64e.S10
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S16
5 files changed, 95 insertions, 101 deletions
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index b13d58932bf6..115347f74ce5 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -184,7 +184,7 @@ _GLOBAL(add_hash_page)
184 add r3,r3,r0 /* note create_hpte trims to 24 bits */ 184 add r3,r3,r0 /* note create_hpte trims to 24 bits */
185 185
186#ifdef CONFIG_SMP 186#ifdef CONFIG_SMP
187 rlwinm r8,r1,0,0,(31-THREAD_SHIFT) /* use cpu number to make tag */ 187 CURRENT_THREAD_INFO(r8, r1) /* use cpu number to make tag */
188 lwz r8,TI_CPU(r8) /* to go in mmu_hash_lock */ 188 lwz r8,TI_CPU(r8) /* to go in mmu_hash_lock */
189 oris r8,r8,12 189 oris r8,r8,12
190#endif /* CONFIG_SMP */ 190#endif /* CONFIG_SMP */
@@ -545,7 +545,7 @@ _GLOBAL(flush_hash_pages)
545#ifdef CONFIG_SMP 545#ifdef CONFIG_SMP
546 addis r9,r7,mmu_hash_lock@ha 546 addis r9,r7,mmu_hash_lock@ha
547 addi r9,r9,mmu_hash_lock@l 547 addi r9,r9,mmu_hash_lock@l
548 rlwinm r8,r1,0,0,(31-THREAD_SHIFT) 548 CURRENT_THREAD_INFO(r8, r1)
549 add r8,r8,r7 549 add r8,r8,r7
550 lwz r8,TI_CPU(r8) 550 lwz r8,TI_CPU(r8)
551 oris r8,r8,9 551 oris r8,r8,9
@@ -639,7 +639,7 @@ _GLOBAL(flush_hash_patch_B)
639 */ 639 */
640_GLOBAL(_tlbie) 640_GLOBAL(_tlbie)
641#ifdef CONFIG_SMP 641#ifdef CONFIG_SMP
642 rlwinm r8,r1,0,0,(31-THREAD_SHIFT) 642 CURRENT_THREAD_INFO(r8, r1)
643 lwz r8,TI_CPU(r8) 643 lwz r8,TI_CPU(r8)
644 oris r8,r8,11 644 oris r8,r8,11
645 mfmsr r10 645 mfmsr r10
@@ -677,7 +677,7 @@ _GLOBAL(_tlbie)
677 */ 677 */
678_GLOBAL(_tlbia) 678_GLOBAL(_tlbia)
679#if defined(CONFIG_SMP) 679#if defined(CONFIG_SMP)
680 rlwinm r8,r1,0,0,(31-THREAD_SHIFT) 680 CURRENT_THREAD_INFO(r8, r1)
681 lwz r8,TI_CPU(r8) 681 lwz r8,TI_CPU(r8)
682 oris r8,r8,10 682 oris r8,r8,10
683 mfmsr r10 683 mfmsr r10
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index a242b5d7cbe4..602aeb06d298 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -34,14 +34,6 @@
34 * | CR save area (SP + 8) 34 * | CR save area (SP + 8)
35 * SP ---> +-- Back chain (SP + 0) 35 * SP ---> +-- Back chain (SP + 0)
36 */ 36 */
37#define STACKFRAMESIZE 256
38
39/* Save parameters offsets */
40#define STK_PARM(i) (STACKFRAMESIZE + 48 + ((i)-3)*8)
41
42/* Save non-volatile offsets */
43#define STK_REG(i) (112 + ((i)-14)*8)
44
45 37
46#ifndef CONFIG_PPC_64K_PAGES 38#ifndef CONFIG_PPC_64K_PAGES
47 39
@@ -64,9 +56,9 @@ _GLOBAL(__hash_page_4K)
64 std r0,16(r1) 56 std r0,16(r1)
65 stdu r1,-STACKFRAMESIZE(r1) 57 stdu r1,-STACKFRAMESIZE(r1)
66 /* Save all params that we need after a function call */ 58 /* Save all params that we need after a function call */
67 std r6,STK_PARM(r6)(r1) 59 std r6,STK_PARAM(R6)(r1)
68 std r8,STK_PARM(r8)(r1) 60 std r8,STK_PARAM(R8)(r1)
69 std r9,STK_PARM(r9)(r1) 61 std r9,STK_PARAM(R9)(r1)
70 62
71 /* Save non-volatile registers. 63 /* Save non-volatile registers.
72 * r31 will hold "old PTE" 64 * r31 will hold "old PTE"
@@ -75,11 +67,11 @@ _GLOBAL(__hash_page_4K)
75 * r28 is a hash value 67 * r28 is a hash value
76 * r27 is hashtab mask (maybe dynamic patched instead ?) 68 * r27 is hashtab mask (maybe dynamic patched instead ?)
77 */ 69 */
78 std r27,STK_REG(r27)(r1) 70 std r27,STK_REG(R27)(r1)
79 std r28,STK_REG(r28)(r1) 71 std r28,STK_REG(R28)(r1)
80 std r29,STK_REG(r29)(r1) 72 std r29,STK_REG(R29)(r1)
81 std r30,STK_REG(r30)(r1) 73 std r30,STK_REG(R30)(r1)
82 std r31,STK_REG(r31)(r1) 74 std r31,STK_REG(R31)(r1)
83 75
84 /* Step 1: 76 /* Step 1:
85 * 77 *
@@ -162,7 +154,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
162 /* At this point, r3 contains new PP bits, save them in 154 /* At this point, r3 contains new PP bits, save them in
163 * place of "access" in the param area (sic) 155 * place of "access" in the param area (sic)
164 */ 156 */
165 std r3,STK_PARM(r4)(r1) 157 std r3,STK_PARAM(R4)(r1)
166 158
167 /* Get htab_hash_mask */ 159 /* Get htab_hash_mask */
168 ld r4,htab_hash_mask@got(2) 160 ld r4,htab_hash_mask@got(2)
@@ -192,11 +184,11 @@ htab_insert_pte:
192 rldicr r3,r0,3,63-3 /* r3 = (hash & mask) << 3 */ 184 rldicr r3,r0,3,63-3 /* r3 = (hash & mask) << 3 */
193 185
194 /* Call ppc_md.hpte_insert */ 186 /* Call ppc_md.hpte_insert */
195 ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ 187 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
196 mr r4,r29 /* Retrieve va */ 188 mr r4,r29 /* Retrieve va */
197 li r7,0 /* !bolted, !secondary */ 189 li r7,0 /* !bolted, !secondary */
198 li r8,MMU_PAGE_4K /* page size */ 190 li r8,MMU_PAGE_4K /* page size */
199 ld r9,STK_PARM(r9)(r1) /* segment size */ 191 ld r9,STK_PARAM(R9)(r1) /* segment size */
200_GLOBAL(htab_call_hpte_insert1) 192_GLOBAL(htab_call_hpte_insert1)
201 bl . /* Patched by htab_finish_init() */ 193 bl . /* Patched by htab_finish_init() */
202 cmpdi 0,r3,0 194 cmpdi 0,r3,0
@@ -215,11 +207,11 @@ _GLOBAL(htab_call_hpte_insert1)
215 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ 207 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */
216 208
217 /* Call ppc_md.hpte_insert */ 209 /* Call ppc_md.hpte_insert */
218 ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ 210 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
219 mr r4,r29 /* Retrieve va */ 211 mr r4,r29 /* Retrieve va */
220 li r7,HPTE_V_SECONDARY /* !bolted, secondary */ 212 li r7,HPTE_V_SECONDARY /* !bolted, secondary */
221 li r8,MMU_PAGE_4K /* page size */ 213 li r8,MMU_PAGE_4K /* page size */
222 ld r9,STK_PARM(r9)(r1) /* segment size */ 214 ld r9,STK_PARAM(R9)(r1) /* segment size */
223_GLOBAL(htab_call_hpte_insert2) 215_GLOBAL(htab_call_hpte_insert2)
224 bl . /* Patched by htab_finish_init() */ 216 bl . /* Patched by htab_finish_init() */
225 cmpdi 0,r3,0 217 cmpdi 0,r3,0
@@ -255,15 +247,15 @@ htab_pte_insert_ok:
255 * (maybe add eieio may be good still ?) 247 * (maybe add eieio may be good still ?)
256 */ 248 */
257htab_write_out_pte: 249htab_write_out_pte:
258 ld r6,STK_PARM(r6)(r1) 250 ld r6,STK_PARAM(R6)(r1)
259 std r30,0(r6) 251 std r30,0(r6)
260 li r3, 0 252 li r3, 0
261htab_bail: 253htab_bail:
262 ld r27,STK_REG(r27)(r1) 254 ld r27,STK_REG(R27)(r1)
263 ld r28,STK_REG(r28)(r1) 255 ld r28,STK_REG(R28)(r1)
264 ld r29,STK_REG(r29)(r1) 256 ld r29,STK_REG(R29)(r1)
265 ld r30,STK_REG(r30)(r1) 257 ld r30,STK_REG(R30)(r1)
266 ld r31,STK_REG(r31)(r1) 258 ld r31,STK_REG(R31)(r1)
267 addi r1,r1,STACKFRAMESIZE 259 addi r1,r1,STACKFRAMESIZE
268 ld r0,16(r1) 260 ld r0,16(r1)
269 mtlr r0 261 mtlr r0
@@ -288,8 +280,8 @@ htab_modify_pte:
288 /* Call ppc_md.hpte_updatepp */ 280 /* Call ppc_md.hpte_updatepp */
289 mr r5,r29 /* va */ 281 mr r5,r29 /* va */
290 li r6,MMU_PAGE_4K /* page size */ 282 li r6,MMU_PAGE_4K /* page size */
291 ld r7,STK_PARM(r9)(r1) /* segment size */ 283 ld r7,STK_PARAM(R9)(r1) /* segment size */
292 ld r8,STK_PARM(r8)(r1) /* get "local" param */ 284 ld r8,STK_PARAM(R8)(r1) /* get "local" param */
293_GLOBAL(htab_call_hpte_updatepp) 285_GLOBAL(htab_call_hpte_updatepp)
294 bl . /* Patched by htab_finish_init() */ 286 bl . /* Patched by htab_finish_init() */
295 287
@@ -312,7 +304,7 @@ htab_wrong_access:
312 304
313htab_pte_insert_failure: 305htab_pte_insert_failure:
314 /* Bail out restoring old PTE */ 306 /* Bail out restoring old PTE */
315 ld r6,STK_PARM(r6)(r1) 307 ld r6,STK_PARAM(R6)(r1)
316 std r31,0(r6) 308 std r31,0(r6)
317 li r3,-1 309 li r3,-1
318 b htab_bail 310 b htab_bail
@@ -340,9 +332,9 @@ _GLOBAL(__hash_page_4K)
340 std r0,16(r1) 332 std r0,16(r1)
341 stdu r1,-STACKFRAMESIZE(r1) 333 stdu r1,-STACKFRAMESIZE(r1)
342 /* Save all params that we need after a function call */ 334 /* Save all params that we need after a function call */
343 std r6,STK_PARM(r6)(r1) 335 std r6,STK_PARAM(R6)(r1)
344 std r8,STK_PARM(r8)(r1) 336 std r8,STK_PARAM(R8)(r1)
345 std r9,STK_PARM(r9)(r1) 337 std r9,STK_PARAM(R9)(r1)
346 338
347 /* Save non-volatile registers. 339 /* Save non-volatile registers.
348 * r31 will hold "old PTE" 340 * r31 will hold "old PTE"
@@ -353,13 +345,13 @@ _GLOBAL(__hash_page_4K)
353 * r26 is the hidx mask 345 * r26 is the hidx mask
354 * r25 is the index in combo page 346 * r25 is the index in combo page
355 */ 347 */
356 std r25,STK_REG(r25)(r1) 348 std r25,STK_REG(R25)(r1)
357 std r26,STK_REG(r26)(r1) 349 std r26,STK_REG(R26)(r1)
358 std r27,STK_REG(r27)(r1) 350 std r27,STK_REG(R27)(r1)
359 std r28,STK_REG(r28)(r1) 351 std r28,STK_REG(R28)(r1)
360 std r29,STK_REG(r29)(r1) 352 std r29,STK_REG(R29)(r1)
361 std r30,STK_REG(r30)(r1) 353 std r30,STK_REG(R30)(r1)
362 std r31,STK_REG(r31)(r1) 354 std r31,STK_REG(R31)(r1)
363 355
364 /* Step 1: 356 /* Step 1:
365 * 357 *
@@ -452,7 +444,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
452 /* At this point, r3 contains new PP bits, save them in 444 /* At this point, r3 contains new PP bits, save them in
453 * place of "access" in the param area (sic) 445 * place of "access" in the param area (sic)
454 */ 446 */
455 std r3,STK_PARM(r4)(r1) 447 std r3,STK_PARAM(R4)(r1)
456 448
457 /* Get htab_hash_mask */ 449 /* Get htab_hash_mask */
458 ld r4,htab_hash_mask@got(2) 450 ld r4,htab_hash_mask@got(2)
@@ -473,7 +465,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
473 andis. r0,r31,_PAGE_COMBO@h 465 andis. r0,r31,_PAGE_COMBO@h
474 beq htab_inval_old_hpte 466 beq htab_inval_old_hpte
475 467
476 ld r6,STK_PARM(r6)(r1) 468 ld r6,STK_PARAM(R6)(r1)
477 ori r26,r6,0x8000 /* Load the hidx mask */ 469 ori r26,r6,0x8000 /* Load the hidx mask */
478 ld r26,0(r26) 470 ld r26,0(r26)
479 addi r5,r25,36 /* Check actual HPTE_SUB bit, this */ 471 addi r5,r25,36 /* Check actual HPTE_SUB bit, this */
@@ -495,11 +487,11 @@ htab_special_pfn:
495 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */ 487 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
496 488
497 /* Call ppc_md.hpte_insert */ 489 /* Call ppc_md.hpte_insert */
498 ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ 490 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
499 mr r4,r29 /* Retrieve va */ 491 mr r4,r29 /* Retrieve va */
500 li r7,0 /* !bolted, !secondary */ 492 li r7,0 /* !bolted, !secondary */
501 li r8,MMU_PAGE_4K /* page size */ 493 li r8,MMU_PAGE_4K /* page size */
502 ld r9,STK_PARM(r9)(r1) /* segment size */ 494 ld r9,STK_PARAM(R9)(r1) /* segment size */
503_GLOBAL(htab_call_hpte_insert1) 495_GLOBAL(htab_call_hpte_insert1)
504 bl . /* patched by htab_finish_init() */ 496 bl . /* patched by htab_finish_init() */
505 cmpdi 0,r3,0 497 cmpdi 0,r3,0
@@ -522,11 +514,11 @@ _GLOBAL(htab_call_hpte_insert1)
522 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ 514 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */
523 515
524 /* Call ppc_md.hpte_insert */ 516 /* Call ppc_md.hpte_insert */
525 ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ 517 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
526 mr r4,r29 /* Retrieve va */ 518 mr r4,r29 /* Retrieve va */
527 li r7,HPTE_V_SECONDARY /* !bolted, secondary */ 519 li r7,HPTE_V_SECONDARY /* !bolted, secondary */
528 li r8,MMU_PAGE_4K /* page size */ 520 li r8,MMU_PAGE_4K /* page size */
529 ld r9,STK_PARM(r9)(r1) /* segment size */ 521 ld r9,STK_PARAM(R9)(r1) /* segment size */
530_GLOBAL(htab_call_hpte_insert2) 522_GLOBAL(htab_call_hpte_insert2)
531 bl . /* patched by htab_finish_init() */ 523 bl . /* patched by htab_finish_init() */
532 cmpdi 0,r3,0 524 cmpdi 0,r3,0
@@ -559,8 +551,8 @@ htab_inval_old_hpte:
559 mr r4,r31 /* PTE.pte */ 551 mr r4,r31 /* PTE.pte */
560 li r5,0 /* PTE.hidx */ 552 li r5,0 /* PTE.hidx */
561 li r6,MMU_PAGE_64K /* psize */ 553 li r6,MMU_PAGE_64K /* psize */
562 ld r7,STK_PARM(r9)(r1) /* ssize */ 554 ld r7,STK_PARAM(R9)(r1) /* ssize */
563 ld r8,STK_PARM(r8)(r1) /* local */ 555 ld r8,STK_PARAM(R8)(r1) /* local */
564 bl .flush_hash_page 556 bl .flush_hash_page
565 /* Clear out _PAGE_HPTE_SUB bits in the new linux PTE */ 557 /* Clear out _PAGE_HPTE_SUB bits in the new linux PTE */
566 lis r0,_PAGE_HPTE_SUB@h 558 lis r0,_PAGE_HPTE_SUB@h
@@ -576,7 +568,7 @@ htab_pte_insert_ok:
576 /* Insert slot number & secondary bit in PTE second half, 568 /* Insert slot number & secondary bit in PTE second half,
577 * clear _PAGE_BUSY and set approriate HPTE slot bit 569 * clear _PAGE_BUSY and set approriate HPTE slot bit
578 */ 570 */
579 ld r6,STK_PARM(r6)(r1) 571 ld r6,STK_PARAM(R6)(r1)
580 li r0,_PAGE_BUSY 572 li r0,_PAGE_BUSY
581 andc r30,r30,r0 573 andc r30,r30,r0
582 /* HPTE SUB bit */ 574 /* HPTE SUB bit */
@@ -597,13 +589,13 @@ htab_pte_insert_ok:
597 std r30,0(r6) 589 std r30,0(r6)
598 li r3, 0 590 li r3, 0
599htab_bail: 591htab_bail:
600 ld r25,STK_REG(r25)(r1) 592 ld r25,STK_REG(R25)(r1)
601 ld r26,STK_REG(r26)(r1) 593 ld r26,STK_REG(R26)(r1)
602 ld r27,STK_REG(r27)(r1) 594 ld r27,STK_REG(R27)(r1)
603 ld r28,STK_REG(r28)(r1) 595 ld r28,STK_REG(R28)(r1)
604 ld r29,STK_REG(r29)(r1) 596 ld r29,STK_REG(R29)(r1)
605 ld r30,STK_REG(r30)(r1) 597 ld r30,STK_REG(R30)(r1)
606 ld r31,STK_REG(r31)(r1) 598 ld r31,STK_REG(R31)(r1)
607 addi r1,r1,STACKFRAMESIZE 599 addi r1,r1,STACKFRAMESIZE
608 ld r0,16(r1) 600 ld r0,16(r1)
609 mtlr r0 601 mtlr r0
@@ -630,8 +622,8 @@ htab_modify_pte:
630 /* Call ppc_md.hpte_updatepp */ 622 /* Call ppc_md.hpte_updatepp */
631 mr r5,r29 /* va */ 623 mr r5,r29 /* va */
632 li r6,MMU_PAGE_4K /* page size */ 624 li r6,MMU_PAGE_4K /* page size */
633 ld r7,STK_PARM(r9)(r1) /* segment size */ 625 ld r7,STK_PARAM(R9)(r1) /* segment size */
634 ld r8,STK_PARM(r8)(r1) /* get "local" param */ 626 ld r8,STK_PARAM(R8)(r1) /* get "local" param */
635_GLOBAL(htab_call_hpte_updatepp) 627_GLOBAL(htab_call_hpte_updatepp)
636 bl . /* patched by htab_finish_init() */ 628 bl . /* patched by htab_finish_init() */
637 629
@@ -644,7 +636,7 @@ _GLOBAL(htab_call_hpte_updatepp)
644 /* Clear the BUSY bit and Write out the PTE */ 636 /* Clear the BUSY bit and Write out the PTE */
645 li r0,_PAGE_BUSY 637 li r0,_PAGE_BUSY
646 andc r30,r30,r0 638 andc r30,r30,r0
647 ld r6,STK_PARM(r6)(r1) 639 ld r6,STK_PARAM(R6)(r1)
648 std r30,0(r6) 640 std r30,0(r6)
649 li r3,0 641 li r3,0
650 b htab_bail 642 b htab_bail
@@ -657,7 +649,7 @@ htab_wrong_access:
657 649
658htab_pte_insert_failure: 650htab_pte_insert_failure:
659 /* Bail out restoring old PTE */ 651 /* Bail out restoring old PTE */
660 ld r6,STK_PARM(r6)(r1) 652 ld r6,STK_PARAM(R6)(r1)
661 std r31,0(r6) 653 std r31,0(r6)
662 li r3,-1 654 li r3,-1
663 b htab_bail 655 b htab_bail
@@ -677,9 +669,9 @@ _GLOBAL(__hash_page_64K)
677 std r0,16(r1) 669 std r0,16(r1)
678 stdu r1,-STACKFRAMESIZE(r1) 670 stdu r1,-STACKFRAMESIZE(r1)
679 /* Save all params that we need after a function call */ 671 /* Save all params that we need after a function call */
680 std r6,STK_PARM(r6)(r1) 672 std r6,STK_PARAM(R6)(r1)
681 std r8,STK_PARM(r8)(r1) 673 std r8,STK_PARAM(R8)(r1)
682 std r9,STK_PARM(r9)(r1) 674 std r9,STK_PARAM(R9)(r1)
683 675
684 /* Save non-volatile registers. 676 /* Save non-volatile registers.
685 * r31 will hold "old PTE" 677 * r31 will hold "old PTE"
@@ -688,11 +680,11 @@ _GLOBAL(__hash_page_64K)
688 * r28 is a hash value 680 * r28 is a hash value
689 * r27 is hashtab mask (maybe dynamic patched instead ?) 681 * r27 is hashtab mask (maybe dynamic patched instead ?)
690 */ 682 */
691 std r27,STK_REG(r27)(r1) 683 std r27,STK_REG(R27)(r1)
692 std r28,STK_REG(r28)(r1) 684 std r28,STK_REG(R28)(r1)
693 std r29,STK_REG(r29)(r1) 685 std r29,STK_REG(R29)(r1)
694 std r30,STK_REG(r30)(r1) 686 std r30,STK_REG(R30)(r1)
695 std r31,STK_REG(r31)(r1) 687 std r31,STK_REG(R31)(r1)
696 688
697 /* Step 1: 689 /* Step 1:
698 * 690 *
@@ -780,7 +772,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
780 /* At this point, r3 contains new PP bits, save them in 772 /* At this point, r3 contains new PP bits, save them in
781 * place of "access" in the param area (sic) 773 * place of "access" in the param area (sic)
782 */ 774 */
783 std r3,STK_PARM(r4)(r1) 775 std r3,STK_PARAM(R4)(r1)
784 776
785 /* Get htab_hash_mask */ 777 /* Get htab_hash_mask */
786 ld r4,htab_hash_mask@got(2) 778 ld r4,htab_hash_mask@got(2)
@@ -813,11 +805,11 @@ ht64_insert_pte:
813 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */ 805 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
814 806
815 /* Call ppc_md.hpte_insert */ 807 /* Call ppc_md.hpte_insert */
816 ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ 808 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
817 mr r4,r29 /* Retrieve va */ 809 mr r4,r29 /* Retrieve va */
818 li r7,0 /* !bolted, !secondary */ 810 li r7,0 /* !bolted, !secondary */
819 li r8,MMU_PAGE_64K 811 li r8,MMU_PAGE_64K
820 ld r9,STK_PARM(r9)(r1) /* segment size */ 812 ld r9,STK_PARAM(R9)(r1) /* segment size */
821_GLOBAL(ht64_call_hpte_insert1) 813_GLOBAL(ht64_call_hpte_insert1)
822 bl . /* patched by htab_finish_init() */ 814 bl . /* patched by htab_finish_init() */
823 cmpdi 0,r3,0 815 cmpdi 0,r3,0
@@ -836,11 +828,11 @@ _GLOBAL(ht64_call_hpte_insert1)
836 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ 828 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */
837 829
838 /* Call ppc_md.hpte_insert */ 830 /* Call ppc_md.hpte_insert */
839 ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ 831 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
840 mr r4,r29 /* Retrieve va */ 832 mr r4,r29 /* Retrieve va */
841 li r7,HPTE_V_SECONDARY /* !bolted, secondary */ 833 li r7,HPTE_V_SECONDARY /* !bolted, secondary */
842 li r8,MMU_PAGE_64K 834 li r8,MMU_PAGE_64K
843 ld r9,STK_PARM(r9)(r1) /* segment size */ 835 ld r9,STK_PARAM(R9)(r1) /* segment size */
844_GLOBAL(ht64_call_hpte_insert2) 836_GLOBAL(ht64_call_hpte_insert2)
845 bl . /* patched by htab_finish_init() */ 837 bl . /* patched by htab_finish_init() */
846 cmpdi 0,r3,0 838 cmpdi 0,r3,0
@@ -876,15 +868,15 @@ ht64_pte_insert_ok:
876 * (maybe add eieio may be good still ?) 868 * (maybe add eieio may be good still ?)
877 */ 869 */
878ht64_write_out_pte: 870ht64_write_out_pte:
879 ld r6,STK_PARM(r6)(r1) 871 ld r6,STK_PARAM(R6)(r1)
880 std r30,0(r6) 872 std r30,0(r6)
881 li r3, 0 873 li r3, 0
882ht64_bail: 874ht64_bail:
883 ld r27,STK_REG(r27)(r1) 875 ld r27,STK_REG(R27)(r1)
884 ld r28,STK_REG(r28)(r1) 876 ld r28,STK_REG(R28)(r1)
885 ld r29,STK_REG(r29)(r1) 877 ld r29,STK_REG(R29)(r1)
886 ld r30,STK_REG(r30)(r1) 878 ld r30,STK_REG(R30)(r1)
887 ld r31,STK_REG(r31)(r1) 879 ld r31,STK_REG(R31)(r1)
888 addi r1,r1,STACKFRAMESIZE 880 addi r1,r1,STACKFRAMESIZE
889 ld r0,16(r1) 881 ld r0,16(r1)
890 mtlr r0 882 mtlr r0
@@ -909,8 +901,8 @@ ht64_modify_pte:
909 /* Call ppc_md.hpte_updatepp */ 901 /* Call ppc_md.hpte_updatepp */
910 mr r5,r29 /* va */ 902 mr r5,r29 /* va */
911 li r6,MMU_PAGE_64K 903 li r6,MMU_PAGE_64K
912 ld r7,STK_PARM(r9)(r1) /* segment size */ 904 ld r7,STK_PARAM(R9)(r1) /* segment size */
913 ld r8,STK_PARM(r8)(r1) /* get "local" param */ 905 ld r8,STK_PARAM(R8)(r1) /* get "local" param */
914_GLOBAL(ht64_call_hpte_updatepp) 906_GLOBAL(ht64_call_hpte_updatepp)
915 bl . /* patched by htab_finish_init() */ 907 bl . /* patched by htab_finish_init() */
916 908
@@ -933,7 +925,7 @@ ht64_wrong_access:
933 925
934ht64_pte_insert_failure: 926ht64_pte_insert_failure:
935 /* Bail out restoring old PTE */ 927 /* Bail out restoring old PTE */
936 ld r6,STK_PARM(r6)(r1) 928 ld r6,STK_PARAM(R6)(r1)
937 std r31,0(r6) 929 std r31,0(r6)
938 li r3,-1 930 li r3,-1
939 b ht64_bail 931 b ht64_bail
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index b6edbb3b4a54..39b159751c35 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -340,6 +340,8 @@ static int __init find_min_common_depth(void)
340 dbg("Using form 1 affinity\n"); 340 dbg("Using form 1 affinity\n");
341 form1_affinity = 1; 341 form1_affinity = 1;
342 } 342 }
343
344 of_node_put(chosen);
343 } 345 }
344 } 346 }
345 347
@@ -635,11 +637,11 @@ static inline int __init read_usm_ranges(const u32 **usm)
635 */ 637 */
636static void __init parse_drconf_memory(struct device_node *memory) 638static void __init parse_drconf_memory(struct device_node *memory)
637{ 639{
638 const u32 *dm, *usm; 640 const u32 *uninitialized_var(dm), *usm;
639 unsigned int n, rc, ranges, is_kexec_kdump = 0; 641 unsigned int n, rc, ranges, is_kexec_kdump = 0;
640 unsigned long lmb_size, base, size, sz; 642 unsigned long lmb_size, base, size, sz;
641 int nid; 643 int nid;
642 struct assoc_arrays aa; 644 struct assoc_arrays aa = { .arrays = NULL };
643 645
644 n = of_get_drconf_memory(memory, &dm); 646 n = of_get_drconf_memory(memory, &dm);
645 if (!n) 647 if (!n)
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index ff672bd8fea9..f09d48e3268d 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -126,7 +126,7 @@ BEGIN_MMU_FTR_SECTION
126 /* Set the TLB reservation and search for existing entry. Then load 126 /* Set the TLB reservation and search for existing entry. Then load
127 * the entry. 127 * the entry.
128 */ 128 */
129 PPC_TLBSRX_DOT(0,r16) 129 PPC_TLBSRX_DOT(0,R16)
130 ldx r14,r14,r15 /* grab pgd entry */ 130 ldx r14,r14,r15 /* grab pgd entry */
131 beq normal_tlb_miss_done /* tlb exists already, bail */ 131 beq normal_tlb_miss_done /* tlb exists already, bail */
132MMU_FTR_SECTION_ELSE 132MMU_FTR_SECTION_ELSE
@@ -395,7 +395,7 @@ BEGIN_MMU_FTR_SECTION
395 /* Set the TLB reservation and search for existing entry. Then load 395 /* Set the TLB reservation and search for existing entry. Then load
396 * the entry. 396 * the entry.
397 */ 397 */
398 PPC_TLBSRX_DOT(0,r16) 398 PPC_TLBSRX_DOT(0,R16)
399 ld r14,0(r10) 399 ld r14,0(r10)
400 beq normal_tlb_miss_done 400 beq normal_tlb_miss_done
401MMU_FTR_SECTION_ELSE 401MMU_FTR_SECTION_ELSE
@@ -528,7 +528,7 @@ BEGIN_MMU_FTR_SECTION
528 /* Search if we already have a TLB entry for that virtual address, and 528 /* Search if we already have a TLB entry for that virtual address, and
529 * if we do, bail out. 529 * if we do, bail out.
530 */ 530 */
531 PPC_TLBSRX_DOT(0,r16) 531 PPC_TLBSRX_DOT(0,R16)
532 beq virt_page_table_tlb_miss_done 532 beq virt_page_table_tlb_miss_done
533END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_TLBRSRV) 533END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_TLBRSRV)
534 534
@@ -779,7 +779,7 @@ htw_tlb_miss:
779 * 779 *
780 * MAS1:IND should be already set based on MAS4 780 * MAS1:IND should be already set based on MAS4
781 */ 781 */
782 PPC_TLBSRX_DOT(0,r16) 782 PPC_TLBSRX_DOT(0,R16)
783 beq htw_tlb_miss_done 783 beq htw_tlb_miss_done
784 784
785 /* Now, we need to walk the page tables. First check if we are in 785 /* Now, we need to walk the page tables. First check if we are in
@@ -919,7 +919,7 @@ tlb_load_linear:
919 mtspr SPRN_MAS1,r15 919 mtspr SPRN_MAS1,r15
920 920
921 /* Already somebody there ? */ 921 /* Already somebody there ? */
922 PPC_TLBSRX_DOT(0,r16) 922 PPC_TLBSRX_DOT(0,R16)
923 beq tlb_load_linear_done 923 beq tlb_load_linear_done
924 924
925 /* Now we build the remaining MAS. MAS0 and 2 should be fine 925 /* Now we build the remaining MAS. MAS0 and 2 should be fine
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 7c63c0ed4f1b..fab919fd1384 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -266,7 +266,7 @@ BEGIN_MMU_FTR_SECTION
266 andi. r3,r3,MMUCSR0_TLBFI@l 266 andi. r3,r3,MMUCSR0_TLBFI@l
267 bne 1b 267 bne 1b
268MMU_FTR_SECTION_ELSE 268MMU_FTR_SECTION_ELSE
269 PPC_TLBILX_ALL(0,0) 269 PPC_TLBILX_ALL(0,R0)
270ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 270ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
271 msync 271 msync
272 isync 272 isync
@@ -279,7 +279,7 @@ BEGIN_MMU_FTR_SECTION
279 wrteei 0 279 wrteei 0
280 mfspr r4,SPRN_MAS6 /* save MAS6 */ 280 mfspr r4,SPRN_MAS6 /* save MAS6 */
281 mtspr SPRN_MAS6,r3 281 mtspr SPRN_MAS6,r3
282 PPC_TLBILX_PID(0,0) 282 PPC_TLBILX_PID(0,R0)
283 mtspr SPRN_MAS6,r4 /* restore MAS6 */ 283 mtspr SPRN_MAS6,r4 /* restore MAS6 */
284 wrtee r10 284 wrtee r10
285MMU_FTR_SECTION_ELSE 285MMU_FTR_SECTION_ELSE
@@ -313,7 +313,7 @@ BEGIN_MMU_FTR_SECTION
313 mtspr SPRN_MAS1,r4 313 mtspr SPRN_MAS1,r4
314 tlbwe 314 tlbwe
315MMU_FTR_SECTION_ELSE 315MMU_FTR_SECTION_ELSE
316 PPC_TLBILX_VA(0,r3) 316 PPC_TLBILX_VA(0,R3)
317ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 317ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
318 msync 318 msync
319 isync 319 isync
@@ -331,7 +331,7 @@ _GLOBAL(_tlbil_pid)
331 mfmsr r10 331 mfmsr r10
332 wrteei 0 332 wrteei 0
333 mtspr SPRN_MAS6,r4 333 mtspr SPRN_MAS6,r4
334 PPC_TLBILX_PID(0,0) 334 PPC_TLBILX_PID(0,R0)
335 wrtee r10 335 wrtee r10
336 msync 336 msync
337 isync 337 isync
@@ -343,14 +343,14 @@ _GLOBAL(_tlbil_pid_noind)
343 ori r4,r4,MAS6_SIND 343 ori r4,r4,MAS6_SIND
344 wrteei 0 344 wrteei 0
345 mtspr SPRN_MAS6,r4 345 mtspr SPRN_MAS6,r4
346 PPC_TLBILX_PID(0,0) 346 PPC_TLBILX_PID(0,R0)
347 wrtee r10 347 wrtee r10
348 msync 348 msync
349 isync 349 isync
350 blr 350 blr
351 351
352_GLOBAL(_tlbil_all) 352_GLOBAL(_tlbil_all)
353 PPC_TLBILX_ALL(0,0) 353 PPC_TLBILX_ALL(0,R0)
354 msync 354 msync
355 isync 355 isync
356 blr 356 blr
@@ -364,7 +364,7 @@ _GLOBAL(_tlbil_va)
364 beq 1f 364 beq 1f
365 rlwimi r4,r6,MAS6_SIND_SHIFT,MAS6_SIND 365 rlwimi r4,r6,MAS6_SIND_SHIFT,MAS6_SIND
3661: mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ 3661: mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
367 PPC_TLBILX_VA(0,r3) 367 PPC_TLBILX_VA(0,R3)
368 msync 368 msync
369 isync 369 isync
370 wrtee r10 370 wrtee r10
@@ -379,7 +379,7 @@ _GLOBAL(_tlbivax_bcast)
379 beq 1f 379 beq 1f
380 rlwimi r4,r6,MAS6_SIND_SHIFT,MAS6_SIND 380 rlwimi r4,r6,MAS6_SIND_SHIFT,MAS6_SIND
3811: mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ 3811: mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
382 PPC_TLBIVAX(0,r3) 382 PPC_TLBIVAX(0,R3)
383 eieio 383 eieio
384 tlbsync 384 tlbsync
385 sync 385 sync