3 files changed, 21 insertions, 22 deletions

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 3ea26c25590b..cf1d325eae8b 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
                 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
                 va |= penc << 12;
                 va |= ssize << 8;
-                /* Add AVAL part */
-                if (psize != apsize) {
-                        /*
-                         * MPSS, 64K base page size and 16MB parge page size
-                         * We don't need all the bits, but rest of the bits
-                         * must be ignored by the processor.
-                         * vpn cover upto 65 bits of va. (0...65) and we need
-                         * 58..64 bits of va.
-                         */
-                        va |= (vpn & 0xfe);
-                }
+                /*
+                 * AVAL bits:
+                 * We don't need all the bits, but rest of the bits
+                 * must be ignored by the processor.
+                 * vpn cover upto 65 bits of va. (0...65) and we need
+                 * 58..64 bits of va.
+                 */
+                va |= (vpn & 0xfe); /* AVAL */
                 va |= 1; /* L */
                 asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)
                              : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
@@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
                 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
                 va |= penc << 12;
                 va |= ssize << 8;
-                /* Add AVAL part */
-                if (psize != apsize) {
-                        /*
-                         * MPSS, 64K base page size and 16MB parge page size
-                         * We don't need all the bits, but rest of the bits
-                         * must be ignored by the processor.
-                         * vpn cover upto 65 bits of va. (0...65) and we need
-                         * 58..64 bits of va.
-                         */
-                        va |= (vpn & 0xfe);
-                }
+                /*
+                 * AVAL bits:
+                 * We don't need all the bits, but rest of the bits
+                 * must be ignored by the processor.
+                 * vpn cover upto 65 bits of va. (0...65) and we need
+                 * 58..64 bits of va.
+                 */
+                va |= (vpn & 0xfe);
                 va |= 1; /* L */
                 asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
                              : : "r"(va) : "memory");
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index d766d6ee33fe..06ba83b036d3 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -207,6 +207,10 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
                 if (overlaps_kernel_text(vaddr, vaddr + step))
                         tprot &= ~HPTE_R_N;
 
+                /* Make kvm guest trampolines executable */
+                if (overlaps_kvm_tmp(vaddr, vaddr + step))
+                        tprot &= ~HPTE_R_N;
+
                 /*
                  * If relocatable, check if it overlaps interrupt vectors that
                  * are copied down to real 0. For relocatable kernel
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 4ebbb9e99286..3b181b22cd46 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -232,6 +232,7 @@ int __node_distance(int a, int b)
 
         return distance;
 }
+EXPORT_SYMBOL(__node_distance);
 
 static void initialize_distance_lookup_table(int nid,
                 const __be32 *associativity)