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-rw-r--r--arch/powerpc/mm/mem.c2
-rw-r--r--arch/powerpc/mm/mmu_decl.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 81eb96ec13b2..5402fb6b3aae 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
464 * we invalidate the TLB here, thus avoiding dcbst 464 * we invalidate the TLB here, thus avoiding dcbst
465 * misbehaviour. 465 * misbehaviour.
466 */ 466 */
467 _tlbie(address); 467 _tlbie(address, 0 /* 8xx doesn't care about PID */);
468#endif 468#endif
469 if (!PageReserved(page) 469 if (!PageReserved(page)
470 && !test_bit(PG_arch_1, &page->flags)) { 470 && !test_bit(PG_arch_1, &page->flags)) {
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index eb3a732e91db..ebfd13dc9d19 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -56,7 +56,7 @@ extern unsigned long total_lowmem;
56 * architectures. -- Dan 56 * architectures. -- Dan
57 */ 57 */
58#if defined(CONFIG_8xx) 58#if defined(CONFIG_8xx)
59#define flush_HPTE(X, va, pg) _tlbie(va) 59#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
60#define MMU_init_hw() do { } while(0) 60#define MMU_init_hw() do { } while(0)
61#define mmu_mapin_ram() (0UL) 61#define mmu_mapin_ram() (0UL)
62 62