2 files changed, 3 insertions, 3 deletions

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 823fa63e6485..6ba9b47e55af 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -163,7 +163,7 @@ static long native_hpte_insert(unsigned long hpte_group, unsigned long va,
 
         hptep->r = hpte_r;
         /* Guarantee the second dword is visible before the valid bit */
-        __asm__ __volatile__ ("eieio" : : : "memory");
+        eieio();
         /*
          * Now set the first dword including the valid bit
          * NOTE: this also unlocks the hpte
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index 132c6bc66ce1..28492bbdee8e 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -55,7 +55,7 @@ static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
                 for (entry = 0; entry < 8; entry++, ste++) {
                         if (!(ste->esid_data & STE_ESID_V)) {
                                 ste->vsid_data = vsid_data;
-                                asm volatile("eieio":::"memory");
+                                eieio();
                                 ste->esid_data = esid_data;
                                 return (global_entry | entry);
                         }
@@ -101,7 +101,7 @@ static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
         asm volatile("sync" : : : "memory");    /* Order update */
 
         castout_ste->vsid_data = vsid_data;
-        asm volatile("eieio" : : : "memory");   /* Order update */
+        eieio();                                /* Order update */
         castout_ste->esid_data = esid_data;
 
         asm volatile("slbie  %0" : : "r" (old_esid << SID_SHIFT));