11 files changed, 77 insertions, 27 deletions

diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c
index f5e7b9ce63dd..08dfa8e6d86f 100644
--- a/arch/powerpc/mm/40x_mmu.c
+++ b/arch/powerpc/mm/40x_mmu.c
@@ -91,7 +91,7 @@ void __init MMU_init_hw(void)
 #define LARGE_PAGE_SIZE_16M     (1<<24)
 #define LARGE_PAGE_SIZE_4M      (1<<22)
 
-unsigned long __init mmu_mapin_ram(void)
+unsigned long __init mmu_mapin_ram(unsigned long top)
 {
         unsigned long v, s, mapped;
         phys_addr_t p;
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 98052ac96580..3986264b0993 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -88,7 +88,7 @@ void __init MMU_init_hw(void)
         flush_instruction_cache();
 }
 
-unsigned long __init mmu_mapin_ram(void)
+unsigned long __init mmu_mapin_ram(unsigned long top)
 {
         unsigned long addr;
 
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index fcfcb6e976c7..c5394728bf2e 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -207,7 +207,7 @@ unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
         return amount_mapped;
 }
 
-unsigned long __init mmu_mapin_ram(void)
+unsigned long __init mmu_mapin_ram(unsigned long top)
 {
         return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
 }
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 50f867d657df..3ecdcec0a39e 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -340,7 +340,7 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
                         else
                                 def->tlbiel = 0;
 
-                        DBG(" %d: shift=%02x, sllp=%04x, avpnm=%08x, "
+                        DBG(" %d: shift=%02x, sllp=%04lx, avpnm=%08lx, "
                             "tlbiel=%d, penc=%d\n",
                             idx, shift, def->sllp, def->avpnm, def->tlbiel,
                             def->penc);
@@ -663,7 +663,7 @@ static void __init htab_initialize(void)
                 base = (unsigned long)__va(lmb.memory.region[i].base);
                 size = lmb.memory.region[i].size;
 
-                DBG("creating mapping for region: %lx..%lx (prot: %x)\n",
+                DBG("creating mapping for region: %lx..%lx (prot: %lx)\n",
                     base, size, prot);
 
 #ifdef CONFIG_U3_DART
@@ -879,7 +879,7 @@ static inline int subpage_protection(struct mm_struct *mm, unsigned long ea)
  */
 int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
 {
-        void *pgdir;
+        pgd_t *pgdir;
         unsigned long vsid;
         struct mm_struct *mm;
         pte_t *ptep;
@@ -1025,7 +1025,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
         else
 #endif /* CONFIG_PPC_HAS_HASH_64K */
         {
-                int spp = subpage_protection(pgdir, ea);
+                int spp = subpage_protection(mm, ea);
                 if (access & spp)
                         rc = -2;
                 else
@@ -1115,7 +1115,7 @@ void flush_hash_page(unsigned long va, real_pte_t pte, int psize, int ssize,
 {
         unsigned long hash, index, shift, hidx, slot;
 
-        DBG_LOW("flush_hash_page(va=%016x)\n", va);
+        DBG_LOW("flush_hash_page(va=%016lx)\n", va);
         pte_iterate_hashed_subpages(pte, psize, va, index, shift) {
                 hash = hpt_hash(va, shift, ssize);
                 hidx = __rpte_to_hidx(pte, index);
@@ -1123,7 +1123,7 @@ void flush_hash_page(unsigned long va, real_pte_t pte, int psize, int ssize,
                         hash = ~hash;
                 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
                 slot += hidx & _PTEIDX_GROUP_IX;
-                DBG_LOW(" sub %d: hash=%x, hidx=%x\n", index, slot, hidx);
+                DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx);
                 ppc_md.hpte_invalidate(slot, va, psize, ssize, local);
         } pte_iterate_hashed_end();
 }
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 9ddcfb4dc139..4ec900af332f 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -82,6 +82,11 @@ extern struct task_struct *current_set[NR_CPUS];
 int __map_without_bats;
 int __map_without_ltlbs;
 
+/*
+ * This tells the system to allow ioremapping memory marked as reserved.
+ */
+int __allow_ioremap_reserved;
+
 /* max amount of low RAM to map in */
 unsigned long __max_low_memory = MAX_LOW_MEM;
 
@@ -131,9 +136,13 @@ void __init MMU_init(void)
         MMU_setup();
 
         if (lmb.memory.cnt > 1) {
+#ifndef CONFIG_WII
                 lmb.memory.cnt = 1;
                 lmb_analyze();
                 printk(KERN_WARNING "Only using first contiguous memory region");
+#else
+                wii_memory_fixups();
+#endif
         }
 
         total_lowmem = total_memory = lmb_end_of_DRAM() - memstart_addr;
diff --git a/arch/powerpc/mm/mmap_64.c b/arch/powerpc/mm/mmap_64.c
index 0d957a4c70fe..5a783d8e8e8e 100644
--- a/arch/powerpc/mm/mmap_64.c
+++ b/arch/powerpc/mm/mmap_64.c
@@ -47,7 +47,7 @@ static inline int mmap_is_legacy(void)
         if (current->personality & ADDR_COMPAT_LAYOUT)
                 return 1;
 
-        if (current->signal->rlim[RLIMIT_STACK].rlim_cur == RLIM_INFINITY)
+        if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
                 return 1;
 
         return sysctl_legacy_va_layout;
@@ -77,7 +77,7 @@ static unsigned long mmap_rnd(void)
 
 static inline unsigned long mmap_base(void)
 {
-        unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
+        unsigned long gap = rlimit(RLIMIT_STACK);
 
         if (gap < MIN_GAP)
                 gap = MIN_GAP;
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index be4f34c30a0b..1044a634b6d0 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -353,7 +353,7 @@ static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,
                 read_lock(&tasklist_lock);
                 for_each_process(p) {
                         if (p->mm)
-                                cpu_mask_clear_cpu(cpu, mm_cpumask(p->mm));
+                                cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
                 }
                 read_unlock(&tasklist_lock);
         break;
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index e27a990af42d..d49a77503e19 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -104,6 +104,7 @@ extern void setbat(int index, unsigned long virt, phys_addr_t phys,
                    unsigned int size, int flags);
 
 extern int __map_without_bats;
+extern int __allow_ioremap_reserved;
 extern unsigned long ioremap_base;
 extern unsigned int rtas_data, rtas_size;
 
@@ -125,24 +126,32 @@ extern phys_addr_t total_lowmem;
 extern phys_addr_t memstart_addr;
 extern phys_addr_t lowmem_end_addr;
 
+#ifdef CONFIG_WII
+extern unsigned long wii_hole_start;
+extern unsigned long wii_hole_size;
+
+extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
+extern void wii_memory_fixups(void);
+#endif
+
 /* ...and now those things that may be slightly different between processor
  * architectures.  -- Dan
  */
 #if defined(CONFIG_8xx)
 #define MMU_init_hw()           do { } while(0)
-#define mmu_mapin_ram()         (0UL)
+#define mmu_mapin_ram(top)      (0UL)
 
 #elif defined(CONFIG_4xx)
 extern void MMU_init_hw(void);
-extern unsigned long mmu_mapin_ram(void);
+extern unsigned long mmu_mapin_ram(unsigned long top);
 
 #elif defined(CONFIG_FSL_BOOKE)
 extern void MMU_init_hw(void);
-extern unsigned long mmu_mapin_ram(void);
+extern unsigned long mmu_mapin_ram(unsigned long top);
 extern void adjust_total_lowmem(void);
 
 #elif defined(CONFIG_PPC32)
 /* anything 32-bit except 4xx or 8xx */
 extern void MMU_init_hw(void);
-extern unsigned long mmu_mapin_ram(void);
+extern unsigned long mmu_mapin_ram(unsigned long top);
 #endif
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index cb96cb2e17cc..573b3bd1c45b 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -26,6 +26,7 @@
 #include <linux/vmalloc.h>
 #include <linux/init.h>
 #include <linux/highmem.h>
+#include <linux/lmb.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
@@ -191,7 +192,8 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
          * Don't allow anybody to remap normal RAM that we're using.
          * mem_init() sets high_memory so only do the check after that.
          */
-        if (mem_init_done && (p < virt_to_phys(high_memory))) {
+        if (mem_init_done && (p < virt_to_phys(high_memory)) &&
+            !(__allow_ioremap_reserved && lmb_is_region_reserved(p, size))) {
                 printk("__ioremap(): phys addr 0x%llx is RAM lr %p\n",
                        (unsigned long long)p, __builtin_return_address(0));
                 return NULL;
@@ -283,18 +285,18 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
 }
 
 /*
- * Map in a big chunk of physical memory starting at PAGE_OFFSET.
+ * Map in a chunk of physical memory starting at start.
  */
-void __init mapin_ram(void)
+void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
 {
         unsigned long v, s, f;
         phys_addr_t p;
         int ktext;
 
-        s = mmu_mapin_ram();
+        s = offset;
         v = PAGE_OFFSET + s;
         p = memstart_addr + s;
-        for (; s < total_lowmem; s += PAGE_SIZE) {
+        for (; s < top; s += PAGE_SIZE) {
                 ktext = ((char *) v >= _stext && (char *) v < etext);
                 f = ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL;
                 map_page(v, p, f);
@@ -307,6 +309,30 @@ void __init mapin_ram(void)
         }
 }
 
+void __init mapin_ram(void)
+{
+        unsigned long s, top;
+
+#ifndef CONFIG_WII
+        top = total_lowmem;
+        s = mmu_mapin_ram(top);
+        __mapin_ram_chunk(s, top);
+#else
+        if (!wii_hole_size) {
+                s = mmu_mapin_ram(total_lowmem);
+                __mapin_ram_chunk(s, total_lowmem);
+        } else {
+                top = wii_hole_start;
+                s = mmu_mapin_ram(top);
+                __mapin_ram_chunk(s, top);
+
+                top = lmb_end_of_DRAM();
+                s = wii_mmu_mapin_mem2(top);
+                __mapin_ram_chunk(s, top);
+        }
+#endif
+}
+
 /* Scan the real Linux page tables and return a PTE pointer for
  * a virtual address in a context.
  * Returns true (1) if PTE was found, zero otherwise.  The pointer to
@@ -356,7 +382,7 @@ static int __change_page_attr(struct page *page, pgprot_t prot)
                 return 0;
         if (!get_pteptr(&init_mm, address, &kpte, &kpmd))
                 return -EINVAL;
-        set_pte_at(&init_mm, address, kpte, mk_pte(page, prot));
+        __set_pte_at(&init_mm, address, kpte, mk_pte(page, prot), 0);
         wmb();
 #ifdef CONFIG_PPC_STD_MMU
         flush_hash_pages(0, address, pmd_val(*kpmd), 1);
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 2d2a87e10154..f11c2cdcb0fe 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -72,7 +72,7 @@ unsigned long p_mapped_by_bats(phys_addr_t pa)
         return 0;
 }
 
-unsigned long __init mmu_mapin_ram(void)
+unsigned long __init mmu_mapin_ram(unsigned long top)
 {
         unsigned long tot, bl, done;
         unsigned long max_size = (256<<20);
@@ -86,7 +86,7 @@ unsigned long __init mmu_mapin_ram(void)
 
         /* Make sure we don't map a block larger than the
            smallest alignment of the physical address. */
-        tot = total_lowmem;
+        tot = top;
         for (bl = 128<<10; bl < max_size; bl <<= 1) {
                 if (bl * 2 > tot)
                         break;
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index 282d9306361f..1ec06576f619 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -63,15 +63,21 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
         if (huge) {
 #ifdef CONFIG_HUGETLB_PAGE
                 psize = get_slice_psize(mm, addr);
+                /* Mask the address for the correct page size */
+                addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
 #else
                 BUG();
                 psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */
 #endif
-        } else
+        } else {
                 psize = pte_pagesize_index(mm, addr, pte);
+                /* Mask the address for the standard page size.  If we
+                 * have a 64k page kernel, but the hardware does not
+                 * support 64k pages, this might be different from the
+                 * hardware page size encoded in the slice table. */
+                addr &= PAGE_MASK;
+        }
 
-        /* Mask the address for the correct page size */
-        addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
 
         /* Build full vaddr */
         if (!is_kernel_addr(addr)) {