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-rw-r--r--arch/powerpc/mm/hash_utils_64.c2
-rw-r--r--arch/powerpc/mm/pgtable.c2
-rw-r--r--arch/powerpc/mm/tlb_low_64e.S5
-rw-r--r--arch/powerpc/mm/tlb_nohash.c2
4 files changed, 7 insertions, 4 deletions
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 83f534d862db..5e9584405c45 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -1123,7 +1123,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
1123 else 1123 else
1124#endif /* CONFIG_PPC_HAS_HASH_64K */ 1124#endif /* CONFIG_PPC_HAS_HASH_64K */
1125 rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize, 1125 rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize,
1126 subpage_protection(pgdir, ea)); 1126 subpage_protection(mm, ea));
1127 1127
1128 /* Dump some info in case of hash insertion failure, they should 1128 /* Dump some info in case of hash insertion failure, they should
1129 * never happen so it is really useful to know if/when they do 1129 * never happen so it is really useful to know if/when they do
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 2c7e801ab20b..6a3997f98dfb 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -92,7 +92,7 @@ static void pte_free_rcu_callback(struct rcu_head *head)
92 92
93static void pte_free_submit(struct pte_freelist_batch *batch) 93static void pte_free_submit(struct pte_freelist_batch *batch)
94{ 94{
95 call_rcu(&batch->rcu, pte_free_rcu_callback); 95 call_rcu_sched(&batch->rcu, pte_free_rcu_callback);
96} 96}
97 97
98void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift) 98void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift)
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 8b04c54e596f..8526bd9d2aa3 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -138,8 +138,11 @@
138 cmpldi cr0,r15,0 /* Check for user region */ 138 cmpldi cr0,r15,0 /* Check for user region */
139 std r14,EX_TLB_ESR(r12) /* write crazy -1 to frame */ 139 std r14,EX_TLB_ESR(r12) /* write crazy -1 to frame */
140 beq normal_tlb_miss 140 beq normal_tlb_miss
141
142 li r11,_PAGE_PRESENT|_PAGE_BAP_SX /* Base perm */
143 oris r11,r11,_PAGE_ACCESSED@h
141 /* XXX replace the RMW cycles with immediate loads + writes */ 144 /* XXX replace the RMW cycles with immediate loads + writes */
1421: mfspr r10,SPRN_MAS1 145 mfspr r10,SPRN_MAS1
143 cmpldi cr0,r15,8 /* Check for vmalloc region */ 146 cmpldi cr0,r15,8 /* Check for vmalloc region */
144 rlwinm r10,r10,0,16,1 /* Clear TID */ 147 rlwinm r10,r10,0,16,1 /* Clear TID */
145 mtspr SPRN_MAS1,r10 148 mtspr SPRN_MAS1,r10
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 36c0c449a899..2a030d89bbc6 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -585,6 +585,6 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
585 ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000); 585 ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000);
586 586
587 /* Finally limit subsequent allocations */ 587 /* Finally limit subsequent allocations */
588 memblock_set_current_limit(ppc64_memblock_base + ppc64_rma_size); 588 memblock_set_current_limit(first_memblock_base + ppc64_rma_size);
589} 589}
590#endif /* CONFIG_PPC64 */ 590#endif /* CONFIG_PPC64 */