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-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 788b87c36f77..45fed3698349 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -138,7 +138,11 @@ BEGIN_MMU_FTR_SECTION
138 andi. r3,r3,MMUCSR0_TLBFI@l 138 andi. r3,r3,MMUCSR0_TLBFI@l
139 bne 1b 139 bne 1b
140MMU_FTR_SECTION_ELSE 140MMU_FTR_SECTION_ELSE
141 PPC_TLBILX_ALL(0,0) 141 BEGIN_MMU_FTR_SECTION_NESTED(96)
142 PPC_TLBILX_ALL(0,r3)
143 MMU_FTR_SECTION_ELSE_NESTED(96)
144 PPC_TLBILX_ALL_EARLY(0,r3)
145 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
142ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 146ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
143 msync 147 msync
144 isync 148 isync
@@ -151,7 +155,11 @@ BEGIN_MMU_FTR_SECTION
151 wrteei 0 155 wrteei 0
152 mfspr r4,SPRN_MAS6 /* save MAS6 */ 156 mfspr r4,SPRN_MAS6 /* save MAS6 */
153 mtspr SPRN_MAS6,r3 157 mtspr SPRN_MAS6,r3
158 BEGIN_MMU_FTR_SECTION_NESTED(96)
154 PPC_TLBILX_PID(0,0) 159 PPC_TLBILX_PID(0,0)
160 MMU_FTR_SECTION_ELSE_NESTED(96)
161 PPC_TLBILX_PID_EARLY(0,0)
162 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
155 mtspr SPRN_MAS6,r4 /* restore MAS6 */ 163 mtspr SPRN_MAS6,r4 /* restore MAS6 */
156 wrtee r10 164 wrtee r10
157MMU_FTR_SECTION_ELSE 165MMU_FTR_SECTION_ELSE
@@ -185,7 +193,11 @@ BEGIN_MMU_FTR_SECTION
185 mtspr SPRN_MAS1,r4 193 mtspr SPRN_MAS1,r4
186 tlbwe 194 tlbwe
187MMU_FTR_SECTION_ELSE 195MMU_FTR_SECTION_ELSE
196 BEGIN_MMU_FTR_SECTION_NESTED(96)
188 PPC_TLBILX_VA(0,r3) 197 PPC_TLBILX_VA(0,r3)
198 MMU_FTR_SECTION_ELSE_NESTED(96)
199 PPC_TLBILX_VA_EARLY(0,r3)
200 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
189ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 201ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
190 msync 202 msync
191 isync 203 isync