diff options
Diffstat (limited to 'arch/powerpc/mm/tlb_nohash.c')
-rw-r--r-- | arch/powerpc/mm/tlb_nohash.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c index 7ba32e762990..a086ed562606 100644 --- a/arch/powerpc/mm/tlb_nohash.c +++ b/arch/powerpc/mm/tlb_nohash.c | |||
@@ -446,4 +446,18 @@ void __cpuinit early_init_mmu_secondary(void) | |||
446 | __early_init_mmu(0); | 446 | __early_init_mmu(0); |
447 | } | 447 | } |
448 | 448 | ||
449 | void setup_initial_memory_limit(phys_addr_t first_memblock_base, | ||
450 | phys_addr_t first_memblock_size) | ||
451 | { | ||
452 | /* On Embedded 64-bit, we adjust the RMA size to match | ||
453 | * the bolted TLB entry. We know for now that only 1G | ||
454 | * entries are supported though that may eventually | ||
455 | * change. We crop it to the size of the first MEMBLOCK to | ||
456 | * avoid going over total available memory just in case... | ||
457 | */ | ||
458 | ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000); | ||
459 | |||
460 | /* Finally limit subsequent allocations */ | ||
461 | memblock_set_current_limit(ppc64_memblock_base + ppc64_rma_size); | ||
462 | } | ||
449 | #endif /* CONFIG_PPC64 */ | 463 | #endif /* CONFIG_PPC64 */ |