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-rw-r--r--arch/powerpc/mm/pgtable.c19
1 files changed, 3 insertions, 16 deletions
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index edda589795c3..841e0d00863c 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -32,8 +32,6 @@
32#include <asm/tlbflush.h> 32#include <asm/tlbflush.h>
33#include <asm/tlb.h> 33#include <asm/tlb.h>
34 34
35#include "mmu_decl.h"
36
37static inline int is_exec_fault(void) 35static inline int is_exec_fault(void)
38{ 36{
39 return current->thread.regs && TRAP(current->thread.regs) == 0x400; 37 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
@@ -72,7 +70,7 @@ struct page * maybe_pte_to_page(pte_t pte)
72 * support falls into the same category. 70 * support falls into the same category.
73 */ 71 */
74 72
75static pte_t set_pte_filter(pte_t pte, unsigned long addr) 73static pte_t set_pte_filter(pte_t pte)
76{ 74{
77 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); 75 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
78 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) || 76 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
@@ -81,17 +79,6 @@ static pte_t set_pte_filter(pte_t pte, unsigned long addr)
81 if (!pg) 79 if (!pg)
82 return pte; 80 return pte;
83 if (!test_bit(PG_arch_1, &pg->flags)) { 81 if (!test_bit(PG_arch_1, &pg->flags)) {
84#ifdef CONFIG_8xx
85 /* On 8xx, cache control instructions (particularly
86 * "dcbst" from flush_dcache_icache) fault as write
87 * operation if there is an unpopulated TLB entry
88 * for the address in question. To workaround that,
89 * we invalidate the TLB here, thus avoiding dcbst
90 * misbehaviour.
91 */
92 /* 8xx doesn't care about PID, size or ind args */
93 _tlbil_va(addr, 0, 0, 0);
94#endif /* CONFIG_8xx */
95 flush_dcache_icache_page(pg); 82 flush_dcache_icache_page(pg);
96 set_bit(PG_arch_1, &pg->flags); 83 set_bit(PG_arch_1, &pg->flags);
97 } 84 }
@@ -111,7 +98,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
111 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so 98 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
112 * instead we "filter out" the exec permission for non clean pages. 99 * instead we "filter out" the exec permission for non clean pages.
113 */ 100 */
114static pte_t set_pte_filter(pte_t pte, unsigned long addr) 101static pte_t set_pte_filter(pte_t pte)
115{ 102{
116 struct page *pg; 103 struct page *pg;
117 104
@@ -193,7 +180,7 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
193 * this context might not have been activated yet when this 180 * this context might not have been activated yet when this
194 * is called. 181 * is called.
195 */ 182 */
196 pte = set_pte_filter(pte, addr); 183 pte = set_pte_filter(pte);
197 184
198 /* Perform the setting of the PTE */ 185 /* Perform the setting of the PTE */
199 __set_pte_at(mm, addr, ptep, pte, 0); 186 __set_pte_at(mm, addr, ptep, pte, 0);