1 files changed, 21 insertions, 1 deletions

diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index b05890e23813..83f534d862db 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -649,7 +649,7 @@ static void __init htab_initialize(void)
 #ifdef CONFIG_DEBUG_PAGEALLOC
         linear_map_hash_count = memblock_end_of_DRAM() >> PAGE_SHIFT;
         linear_map_hash_slots = __va(memblock_alloc_base(linear_map_hash_count,
-                                                    1, memblock.rmo_size));
+                                                    1, ppc64_rma_size));
         memset(linear_map_hash_slots, 0, linear_map_hash_count);
 #endif /* CONFIG_DEBUG_PAGEALLOC */
 
@@ -1248,3 +1248,23 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
         local_irq_restore(flags);
 }
 #endif /* CONFIG_DEBUG_PAGEALLOC */
+
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        /* We don't currently support the first MEMBLOCK not mapping 0
+         * physical on those processors
+         */
+        BUG_ON(first_memblock_base != 0);
+
+        /* On LPAR systems, the first entry is our RMA region,
+         * non-LPAR 64-bit hash MMU systems don't have a limitation
+         * on real mode access, but using the first entry works well
+         * enough. We also clamp it to 1G to avoid some funky things
+         * such as RTAS bugs etc...
+         */
+        ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000);
+
+        /* Finally limit subsequent allocations */
+        memblock_set_current_limit(ppc64_rma_size);
+}