diff options
Diffstat (limited to 'arch/powerpc/mm/hash_native_64.c')
| -rw-r--r-- | arch/powerpc/mm/hash_native_64.c | 38 |
1 files changed, 16 insertions, 22 deletions
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 3ea26c25590b..cf1d325eae8b 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c | |||
| @@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) | |||
| 82 | va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); | 82 | va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); |
| 83 | va |= penc << 12; | 83 | va |= penc << 12; |
| 84 | va |= ssize << 8; | 84 | va |= ssize << 8; |
| 85 | /* Add AVAL part */ | 85 | /* |
| 86 | if (psize != apsize) { | 86 | * AVAL bits: |
| 87 | /* | 87 | * We don't need all the bits, but rest of the bits |
| 88 | * MPSS, 64K base page size and 16MB parge page size | 88 | * must be ignored by the processor. |
| 89 | * We don't need all the bits, but rest of the bits | 89 | * vpn cover upto 65 bits of va. (0...65) and we need |
| 90 | * must be ignored by the processor. | 90 | * 58..64 bits of va. |
| 91 | * vpn cover upto 65 bits of va. (0...65) and we need | 91 | */ |
| 92 | * 58..64 bits of va. | 92 | va |= (vpn & 0xfe); /* AVAL */ |
| 93 | */ | ||
| 94 | va |= (vpn & 0xfe); | ||
| 95 | } | ||
| 96 | va |= 1; /* L */ | 93 | va |= 1; /* L */ |
| 97 | asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) | 94 | asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) |
| 98 | : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) | 95 | : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) |
| @@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) | |||
| 133 | va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); | 130 | va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); |
| 134 | va |= penc << 12; | 131 | va |= penc << 12; |
| 135 | va |= ssize << 8; | 132 | va |= ssize << 8; |
| 136 | /* Add AVAL part */ | 133 | /* |
| 137 | if (psize != apsize) { | 134 | * AVAL bits: |
| 138 | /* | 135 | * We don't need all the bits, but rest of the bits |
| 139 | * MPSS, 64K base page size and 16MB parge page size | 136 | * must be ignored by the processor. |
| 140 | * We don't need all the bits, but rest of the bits | 137 | * vpn cover upto 65 bits of va. (0...65) and we need |
| 141 | * must be ignored by the processor. | 138 | * 58..64 bits of va. |
| 142 | * vpn cover upto 65 bits of va. (0...65) and we need | 139 | */ |
| 143 | * 58..64 bits of va. | 140 | va |= (vpn & 0xfe); |
| 144 | */ | ||
| 145 | va |= (vpn & 0xfe); | ||
| 146 | } | ||
| 147 | va |= 1; /* L */ | 141 | va |= 1; /* L */ |
| 148 | asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)" | 142 | asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)" |
| 149 | : : "r"(va) : "memory"); | 143 | : : "r"(va) : "memory"); |