diff options
Diffstat (limited to 'arch/powerpc/mm/hash_native_64.c')
-rw-r--r-- | arch/powerpc/mm/hash_native_64.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 3f0c30ae4791..c33d939120c9 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c | |||
@@ -43,6 +43,7 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) | |||
43 | { | 43 | { |
44 | unsigned long va; | 44 | unsigned long va; |
45 | unsigned int penc; | 45 | unsigned int penc; |
46 | unsigned long sllp; | ||
46 | 47 | ||
47 | /* | 48 | /* |
48 | * We need 14 to 65 bits of va for a tlibe of 4K page | 49 | * We need 14 to 65 bits of va for a tlibe of 4K page |
@@ -64,7 +65,9 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) | |||
64 | /* clear out bits after (52) [0....52.....63] */ | 65 | /* clear out bits after (52) [0....52.....63] */ |
65 | va &= ~((1ul << (64 - 52)) - 1); | 66 | va &= ~((1ul << (64 - 52)) - 1); |
66 | va |= ssize << 8; | 67 | va |= ssize << 8; |
67 | va |= mmu_psize_defs[apsize].sllp << 6; | 68 | sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) | |
69 | ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4); | ||
70 | va |= sllp << 5; | ||
68 | asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2) | 71 | asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2) |
69 | : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) | 72 | : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) |
70 | : "memory"); | 73 | : "memory"); |
@@ -98,6 +101,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) | |||
98 | { | 101 | { |
99 | unsigned long va; | 102 | unsigned long va; |
100 | unsigned int penc; | 103 | unsigned int penc; |
104 | unsigned long sllp; | ||
101 | 105 | ||
102 | /* VPN_SHIFT can be atmost 12 */ | 106 | /* VPN_SHIFT can be atmost 12 */ |
103 | va = vpn << VPN_SHIFT; | 107 | va = vpn << VPN_SHIFT; |
@@ -113,7 +117,9 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) | |||
113 | /* clear out bits after(52) [0....52.....63] */ | 117 | /* clear out bits after(52) [0....52.....63] */ |
114 | va &= ~((1ul << (64 - 52)) - 1); | 118 | va &= ~((1ul << (64 - 52)) - 1); |
115 | va |= ssize << 8; | 119 | va |= ssize << 8; |
116 | va |= mmu_psize_defs[apsize].sllp << 6; | 120 | sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) | |
121 | ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4); | ||
122 | va |= sllp << 5; | ||
117 | asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)" | 123 | asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)" |
118 | : : "r"(va) : "memory"); | 124 | : : "r"(va) : "memory"); |
119 | break; | 125 | break; |
@@ -554,6 +560,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, | |||
554 | seg_off |= vpi << shift; | 560 | seg_off |= vpi << shift; |
555 | } | 561 | } |
556 | *vpn = vsid << (SID_SHIFT - VPN_SHIFT) | seg_off >> VPN_SHIFT; | 562 | *vpn = vsid << (SID_SHIFT - VPN_SHIFT) | seg_off >> VPN_SHIFT; |
563 | break; | ||
557 | case MMU_SEGSIZE_1T: | 564 | case MMU_SEGSIZE_1T: |
558 | /* We only have 40 - 23 bits of seg_off in avpn */ | 565 | /* We only have 40 - 23 bits of seg_off in avpn */ |
559 | seg_off = (avpn & 0x1ffff) << 23; | 566 | seg_off = (avpn & 0x1ffff) << 23; |
@@ -563,6 +570,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, | |||
563 | seg_off |= vpi << shift; | 570 | seg_off |= vpi << shift; |
564 | } | 571 | } |
565 | *vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT; | 572 | *vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT; |
573 | break; | ||
566 | default: | 574 | default: |
567 | *vpn = size = 0; | 575 | *vpn = size = 0; |
568 | } | 576 | } |