3 files changed, 41 insertions, 17 deletions

diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 25ec5378afa4..70693a5c12a1 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -26,11 +26,24 @@ _GLOBAL(__copy_tofrom_user)
         andi.   r6,r6,7
         PPC_MTOCRF      0x01,r5
         blt     cr1,.Lshort_copy
+/* Below we want to nop out the bne if we're on a CPU that has the
+ * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
+ * cleared.
+ * At the time of writing the only CPU that has this combination of bits
+ * set is Power6.
+ */
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
         bne     .Ldst_unaligned
+ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
+                    CPU_FTR_UNALIGNED_LD_STD)
 .Ldst_aligned:
-        andi.   r0,r4,7
         addi    r3,r3,-16
+BEGIN_FTR_SECTION
+        andi.   r0,r4,7
         bne     .Lsrc_unaligned
+END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         srdi    r7,r5,4
 20:     ld      r9,0(r4)
         addi    r4,r4,-8
@@ -138,7 +151,7 @@ _GLOBAL(__copy_tofrom_user)
         PPC_MTOCRF      0x01,r6         /* put #bytes to 8B bdry into cr7 */
         subf    r5,r6,r5
         li      r7,0
-        cmpldi  r1,r5,16
+        cmpldi  cr1,r5,16
         bf      cr7*4+3,1f
 35:     lbz     r0,0(r4)
 81:     stb     r0,0(r3)
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 31734c0969cd..b7dc4c19f582 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -77,26 +77,26 @@ static DEFINE_SPINLOCK(consistent_lock);
  * the amount of RAM found at boot time.)  I would imagine that get_vm_area()
  * would have to initialise this each time prior to calling vm_region_alloc().
  */
-struct vm_region {
+struct ppc_vm_region {
         struct list_head        vm_list;
         unsigned long           vm_start;
         unsigned long           vm_end;
 };
 
-static struct vm_region consistent_head = {
+static struct ppc_vm_region consistent_head = {
         .vm_list        = LIST_HEAD_INIT(consistent_head.vm_list),
         .vm_start       = CONSISTENT_BASE,
         .vm_end         = CONSISTENT_END,
 };
 
-static struct vm_region *
-vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
+static struct ppc_vm_region *
+ppc_vm_region_alloc(struct ppc_vm_region *head, size_t size, gfp_t gfp)
 {
         unsigned long addr = head->vm_start, end = head->vm_end - size;
         unsigned long flags;
-        struct vm_region *c, *new;
+        struct ppc_vm_region *c, *new;
 
-        new = kmalloc(sizeof(struct vm_region), gfp);
+        new = kmalloc(sizeof(struct ppc_vm_region), gfp);
         if (!new)
                 goto out;
 
@@ -130,9 +130,9 @@ vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
         return NULL;
 }
 
-static struct vm_region *vm_region_find(struct vm_region *head, unsigned long addr)
+static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsigned long addr)
 {
-        struct vm_region *c;
+        struct ppc_vm_region *c;
 
         list_for_each_entry(c, &head->vm_list, vm_list) {
                 if (c->vm_start == addr)
@@ -151,7 +151,7 @@ void *
 __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
 {
         struct page *page;
-        struct vm_region *c;
+        struct ppc_vm_region *c;
         unsigned long order;
         u64 mask = 0x00ffffff, limit; /* ISA default */
 
@@ -191,7 +191,7 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
         /*
          * Allocate a virtual address in the consistent mapping region.
          */
-        c = vm_region_alloc(&consistent_head, size,
+        c = ppc_vm_region_alloc(&consistent_head, size,
                             gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
         if (c) {
                 unsigned long vaddr = c->vm_start;
@@ -239,7 +239,7 @@ EXPORT_SYMBOL(__dma_alloc_coherent);
  */
 void __dma_free_coherent(size_t size, void *vaddr)
 {
-        struct vm_region *c;
+        struct ppc_vm_region *c;
         unsigned long flags, addr;
         pte_t *ptep;
 
@@ -247,7 +247,7 @@ void __dma_free_coherent(size_t size, void *vaddr)
 
         spin_lock_irqsave(&consistent_lock, flags);
 
-        c = vm_region_find(&consistent_head, (unsigned long)vaddr);
+        c = ppc_vm_region_find(&consistent_head, (unsigned long)vaddr);
         if (!c)
                 goto no_area;
 
@@ -320,7 +320,6 @@ static int __init dma_alloc_init(void)
                         ret = -ENOMEM;
                         break;
                 }
-                WARN_ON(!pmd_none(*pmd));
 
                 pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
                 if (!pte) {
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index 3f131129d1c1..fe2d34e5332d 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -18,11 +18,23 @@ _GLOBAL(memcpy)
         andi.   r6,r6,7
         dcbt    0,r4
         blt     cr1,.Lshort_copy
+/* Below we want to nop out the bne if we're on a CPU that has the
+   CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
+   cleared.
+   At the time of writing the only CPU that has this combination of bits
+   set is Power6. */
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
         bne     .Ldst_unaligned
+ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
+                    CPU_FTR_UNALIGNED_LD_STD)
 .Ldst_aligned:
-        andi.   r0,r4,7
         addi    r3,r3,-16
+BEGIN_FTR_SECTION
+        andi.   r0,r4,7
         bne     .Lsrc_unaligned
+END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         srdi    r7,r5,4
         ld      r9,0(r4)
         addi    r4,r4,-8
@@ -131,7 +143,7 @@ _GLOBAL(memcpy)
         PPC_MTOCRF      0x01,r6         # put #bytes to 8B bdry into cr7
         subf    r5,r6,r5
         li      r7,0
-        cmpldi  r1,r5,16
+        cmpldi  cr1,r5,16
         bf      cr7*4+3,1f
         lbz     r0,0(r4)
         stb     r0,0(r3)