3 files changed, 29 insertions, 5 deletions

diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 25ec5378afa4..70693a5c12a1 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -26,11 +26,24 @@ _GLOBAL(__copy_tofrom_user)
         andi.   r6,r6,7
         PPC_MTOCRF      0x01,r5
         blt     cr1,.Lshort_copy
+/* Below we want to nop out the bne if we're on a CPU that has the
+ * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
+ * cleared.
+ * At the time of writing the only CPU that has this combination of bits
+ * set is Power6.
+ */
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
         bne     .Ldst_unaligned
+ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
+                    CPU_FTR_UNALIGNED_LD_STD)
 .Ldst_aligned:
-        andi.   r0,r4,7
         addi    r3,r3,-16
+BEGIN_FTR_SECTION
+        andi.   r0,r4,7
         bne     .Lsrc_unaligned
+END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         srdi    r7,r5,4
 20:     ld      r9,0(r4)
         addi    r4,r4,-8
@@ -138,7 +151,7 @@ _GLOBAL(__copy_tofrom_user)
         PPC_MTOCRF      0x01,r6         /* put #bytes to 8B bdry into cr7 */
         subf    r5,r6,r5
         li      r7,0
-        cmpldi  r1,r5,16
+        cmpldi  cr1,r5,16
         bf      cr7*4+3,1f
 35:     lbz     r0,0(r4)
 81:     stb     r0,0(r3)
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 31734c0969cd..2b1ce1849344 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -320,7 +320,6 @@ static int __init dma_alloc_init(void)
                         ret = -ENOMEM;
                         break;
                 }
-                WARN_ON(!pmd_none(*pmd));
 
                 pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
                 if (!pte) {
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index 3f131129d1c1..fe2d34e5332d 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -18,11 +18,23 @@ _GLOBAL(memcpy)
         andi.   r6,r6,7
         dcbt    0,r4
         blt     cr1,.Lshort_copy
+/* Below we want to nop out the bne if we're on a CPU that has the
+   CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
+   cleared.
+   At the time of writing the only CPU that has this combination of bits
+   set is Power6. */
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
         bne     .Ldst_unaligned
+ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
+                    CPU_FTR_UNALIGNED_LD_STD)
 .Ldst_aligned:
-        andi.   r0,r4,7
         addi    r3,r3,-16
+BEGIN_FTR_SECTION
+        andi.   r0,r4,7
         bne     .Lsrc_unaligned
+END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         srdi    r7,r5,4
         ld      r9,0(r4)
         addi    r4,r4,-8
@@ -131,7 +143,7 @@ _GLOBAL(memcpy)
         PPC_MTOCRF      0x01,r6         # put #bytes to 8B bdry into cr7
         subf    r5,r6,r5
         li      r7,0
-        cmpldi  r1,r5,16
+        cmpldi  cr1,r5,16
         bf      cr7*4+3,1f
         lbz     r0,0(r4)
         stb     r0,0(r3)