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-rw-r--r--arch/powerpc/lib/string_64.S63
1 files changed, 62 insertions, 1 deletions
diff --git a/arch/powerpc/lib/string_64.S b/arch/powerpc/lib/string_64.S
index 6613b9047005..3b1e48049faf 100644
--- a/arch/powerpc/lib/string_64.S
+++ b/arch/powerpc/lib/string_64.S
@@ -19,6 +19,12 @@
19 */ 19 */
20 20
21#include <asm/ppc_asm.h> 21#include <asm/ppc_asm.h>
22#include <asm/asm-offsets.h>
23
24 .section ".toc","aw"
25PPC64_CACHES:
26 .tc ppc64_caches[TC],ppc64_caches
27 .section ".text"
22 28
23/** 29/**
24 * __clear_user: - Zero a block of memory in user space, with less checking. 30 * __clear_user: - Zero a block of memory in user space, with less checking.
@@ -94,9 +100,14 @@ err1; stw r0,0(r3)
94 addi r3,r3,4 100 addi r3,r3,4
95 101
963: sub r4,r4,r6 1023: sub r4,r4,r6
97 srdi r6,r4,5 103
98 cmpdi r4,32 104 cmpdi r4,32
105 cmpdi cr1,r4,512
99 blt .Lshort_clear 106 blt .Lshort_clear
107 bgt cr1,.Llong_clear
108
109.Lmedium_clear:
110 srdi r6,r4,5
100 mtctr r6 111 mtctr r6
101 112
102 /* Do 32 byte chunks */ 113 /* Do 32 byte chunks */
@@ -139,3 +150,53 @@ err1; stb r0,0(r3)
139 150
14010: li r3,0 15110: li r3,0
141 blr 152 blr
153
154.Llong_clear:
155 ld r5,PPC64_CACHES@toc(r2)
156
157 bf cr7*4+0,11f
158err2; std r0,0(r3)
159 addi r3,r3,8
160 addi r4,r4,-8
161
162 /* Destination is 16 byte aligned, need to get it cacheline aligned */
16311: lwz r7,DCACHEL1LOGLINESIZE(r5)
164 lwz r9,DCACHEL1LINESIZE(r5)
165
166 /*
167 * With worst case alignment the long clear loop takes a minimum
168 * of 1 byte less than 2 cachelines.
169 */
170 sldi r10,r9,2
171 cmpd r4,r10
172 blt .Lmedium_clear
173
174 neg r6,r3
175 addi r10,r9,-1
176 and. r5,r6,r10
177 beq 13f
178
179 srdi r6,r5,4
180 mtctr r6
181 mr r8,r3
18212:
183err1; std r0,0(r3)
184err1; std r0,8(r3)
185 addi r3,r3,16
186 bdnz 12b
187
188 sub r4,r4,r5
189
19013: srd r6,r4,r7
191 mtctr r6
192 mr r8,r3
19314:
194err1; dcbz r0,r3
195 add r3,r3,r9
196 bdnz 14b
197
198 and r4,r4,r10
199
200 cmpdi r4,32
201 blt .Lshort_clear
202 b .Lmedium_clear