2 files changed, 26 insertions, 26 deletions

diff --git a/arch/powerpc/kvm/book3s_hv_ras.c b/arch/powerpc/kvm/book3s_hv_ras.c
index a353c485808c..768a9f977c00 100644
--- a/arch/powerpc/kvm/book3s_hv_ras.c
+++ b/arch/powerpc/kvm/book3s_hv_ras.c
@@ -12,6 +12,7 @@
 #include <linux/kvm_host.h>
 #include <linux/kernel.h>
 #include <asm/opal.h>
+#include <asm/mce.h>
 
 /* SRR1 bits for machine check on POWER7 */
 #define SRR1_MC_LDSTERR         (1ul << (63-42))
@@ -58,18 +59,6 @@ static void reload_slb(struct kvm_vcpu *vcpu)
         }
 }
 
-/* POWER7 TLB flush */
-static void flush_tlb_power7(struct kvm_vcpu *vcpu)
-{
-        unsigned long i, rb;
-
-        rb = TLBIEL_INVAL_SET_LPID;
-        for (i = 0; i < POWER7_TLB_SETS; ++i) {
-                asm volatile("tlbiel %0" : : "r" (rb));
-                rb += 1 << TLBIEL_INVAL_SET_SHIFT;
-        }
-}
-
 /*
  * On POWER7, see if we can handle a machine check that occurred inside
  * the guest in real mode, without switching to the host partition.
@@ -79,9 +68,7 @@ static void flush_tlb_power7(struct kvm_vcpu *vcpu)
 static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
 {
         unsigned long srr1 = vcpu->arch.shregs.msr;
-#ifdef CONFIG_PPC_POWERNV
-        struct opal_machine_check_event *opal_evt;
-#endif
+        struct machine_check_event mce_evt;
         long handled = 1;
 
         if (srr1 & SRR1_MC_LDSTERR) {
@@ -96,7 +83,8 @@ static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
                                    DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI);
                 }
                 if (dsisr & DSISR_MC_TLB_MULTI) {
-                        flush_tlb_power7(vcpu);
+                        if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
+                                cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET_LPID);
                         dsisr &= ~DSISR_MC_TLB_MULTI;
                 }
                 /* Any other errors we don't understand? */
@@ -113,28 +101,38 @@ static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
                 reload_slb(vcpu);
                 break;
         case SRR1_MC_IFETCH_TLBMULTI:
-                flush_tlb_power7(vcpu);
+                if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
+                        cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET_LPID);
                 break;
         default:
                 handled = 0;
         }
 
-#ifdef CONFIG_PPC_POWERNV
         /*
-         * See if OPAL has already handled the condition.
-         * We assume that if the condition is recovered then OPAL
+         * See if we have already handled the condition in the linux host.
+         * We assume that if the condition is recovered then linux host
          * will have generated an error log event that we will pick
          * up and log later.
+         * Don't release mce event now. In case if condition is not
+         * recovered we do guest exit and go back to linux host machine
+         * check handler. Hence we need make sure that current mce event
+         * is available for linux host to consume.
          */
-        opal_evt = local_paca->opal_mc_evt;
-        if (opal_evt->version == OpalMCE_V1 &&
-            (opal_evt->severity == OpalMCE_SEV_NO_ERROR ||
-             opal_evt->disposition == OpalMCE_DISPOSITION_RECOVERED))
+        if (!get_mce_event(&mce_evt, MCE_EVENT_DONTRELEASE))
+                goto out;
+
+        if (mce_evt.version == MCE_V1 &&
+            (mce_evt.severity == MCE_SEV_NO_ERROR ||
+             mce_evt.disposition == MCE_DISPOSITION_RECOVERED))
                 handled = 1;
 
+out:
+        /*
+         * If we have handled the error, then release the mce event because
+         * we will be delivering machine check to guest.
+         */
         if (handled)
-                opal_evt->in_use = 0;
-#endif
+                release_mce_event();
 
         return handled;
 }
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index be3de1dd7bb3..e4185f6b3309 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -321,6 +321,8 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
         SPRN_DSRR0, SPRN_DSRR1, 0
 kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
         SPRN_CSRR0, SPRN_CSRR1, 0
+kvm_handler BOOKE_INTERRUPT_LRAT_ERROR, EX_PARAMS(GEN), \
+        SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
 #else
 /*
  * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h