diff options
Diffstat (limited to 'arch/powerpc/kvm/booke_interrupts.S')
-rw-r--r-- | arch/powerpc/kvm/booke_interrupts.S | 72 |
1 files changed, 24 insertions, 48 deletions
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S index 95e165baf85f..084ebcd7dd83 100644 --- a/arch/powerpc/kvm/booke_interrupts.S +++ b/arch/powerpc/kvm/booke_interrupts.S | |||
@@ -107,6 +107,18 @@ _GLOBAL(kvmppc_resume_host) | |||
107 | li r6, 1 | 107 | li r6, 1 |
108 | slw r6, r6, r5 | 108 | slw r6, r6, r5 |
109 | 109 | ||
110 | #ifdef CONFIG_KVM_EXIT_TIMING | ||
111 | /* save exit time */ | ||
112 | 1: | ||
113 | mfspr r7, SPRN_TBRU | ||
114 | mfspr r8, SPRN_TBRL | ||
115 | mfspr r9, SPRN_TBRU | ||
116 | cmpw r9, r7 | ||
117 | bne 1b | ||
118 | stw r8, VCPU_TIMING_EXIT_TBL(r4) | ||
119 | stw r9, VCPU_TIMING_EXIT_TBU(r4) | ||
120 | #endif | ||
121 | |||
110 | /* Save the faulting instruction and all GPRs for emulation. */ | 122 | /* Save the faulting instruction and all GPRs for emulation. */ |
111 | andi. r7, r6, NEED_INST_MASK | 123 | andi. r7, r6, NEED_INST_MASK |
112 | beq ..skip_inst_copy | 124 | beq ..skip_inst_copy |
@@ -335,54 +347,6 @@ lightweight_exit: | |||
335 | lwz r3, VCPU_SHADOW_PID(r4) | 347 | lwz r3, VCPU_SHADOW_PID(r4) |
336 | mtspr SPRN_PID, r3 | 348 | mtspr SPRN_PID, r3 |
337 | 349 | ||
338 | /* Prevent all asynchronous TLB updates. */ | ||
339 | mfmsr r5 | ||
340 | lis r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@h | ||
341 | ori r6, r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l | ||
342 | andc r6, r5, r6 | ||
343 | mtmsr r6 | ||
344 | |||
345 | /* Load the guest mappings, leaving the host's "pinned" kernel mappings | ||
346 | * in place. */ | ||
347 | mfspr r10, SPRN_MMUCR /* Save host MMUCR. */ | ||
348 | li r5, PPC44x_TLB_SIZE | ||
349 | lis r5, tlb_44x_hwater@ha | ||
350 | lwz r5, tlb_44x_hwater@l(r5) | ||
351 | mtctr r5 | ||
352 | addi r9, r4, VCPU_SHADOW_TLB | ||
353 | addi r5, r4, VCPU_SHADOW_MOD | ||
354 | li r3, 0 | ||
355 | 1: | ||
356 | lbzx r7, r3, r5 | ||
357 | cmpwi r7, 0 | ||
358 | beq 3f | ||
359 | |||
360 | /* Load guest entry. */ | ||
361 | mulli r11, r3, TLBE_BYTES | ||
362 | add r11, r11, r9 | ||
363 | lwz r7, 0(r11) | ||
364 | mtspr SPRN_MMUCR, r7 | ||
365 | lwz r7, 4(r11) | ||
366 | tlbwe r7, r3, PPC44x_TLB_PAGEID | ||
367 | lwz r7, 8(r11) | ||
368 | tlbwe r7, r3, PPC44x_TLB_XLAT | ||
369 | lwz r7, 12(r11) | ||
370 | tlbwe r7, r3, PPC44x_TLB_ATTRIB | ||
371 | 3: | ||
372 | addi r3, r3, 1 /* Increment index. */ | ||
373 | bdnz 1b | ||
374 | |||
375 | mtspr SPRN_MMUCR, r10 /* Restore host MMUCR. */ | ||
376 | |||
377 | /* Clear bitmap of modified TLB entries */ | ||
378 | li r5, PPC44x_TLB_SIZE>>2 | ||
379 | mtctr r5 | ||
380 | addi r5, r4, VCPU_SHADOW_MOD - 4 | ||
381 | li r6, 0 | ||
382 | 1: | ||
383 | stwu r6, 4(r5) | ||
384 | bdnz 1b | ||
385 | |||
386 | iccci 0, 0 /* XXX hack */ | 350 | iccci 0, 0 /* XXX hack */ |
387 | 351 | ||
388 | /* Load some guest volatiles. */ | 352 | /* Load some guest volatiles. */ |
@@ -423,6 +387,18 @@ lightweight_exit: | |||
423 | lwz r3, VCPU_SPRG7(r4) | 387 | lwz r3, VCPU_SPRG7(r4) |
424 | mtspr SPRN_SPRG7, r3 | 388 | mtspr SPRN_SPRG7, r3 |
425 | 389 | ||
390 | #ifdef CONFIG_KVM_EXIT_TIMING | ||
391 | /* save enter time */ | ||
392 | 1: | ||
393 | mfspr r6, SPRN_TBRU | ||
394 | mfspr r7, SPRN_TBRL | ||
395 | mfspr r8, SPRN_TBRU | ||
396 | cmpw r8, r6 | ||
397 | bne 1b | ||
398 | stw r7, VCPU_TIMING_LAST_ENTER_TBL(r4) | ||
399 | stw r8, VCPU_TIMING_LAST_ENTER_TBU(r4) | ||
400 | #endif | ||
401 | |||
426 | /* Finish loading guest volatiles and jump to guest. */ | 402 | /* Finish loading guest volatiles and jump to guest. */ |
427 | lwz r3, VCPU_CTR(r4) | 403 | lwz r3, VCPU_CTR(r4) |
428 | mtctr r3 | 404 | mtctr r3 |