diff options
Diffstat (limited to 'arch/powerpc/kvm/book3s_64_interrupts.S')
-rw-r--r-- | arch/powerpc/kvm/book3s_64_interrupts.S | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/arch/powerpc/kvm/book3s_64_interrupts.S b/arch/powerpc/kvm/book3s_64_interrupts.S index 3c0ba5513077..33aef5345f6b 100644 --- a/arch/powerpc/kvm/book3s_64_interrupts.S +++ b/arch/powerpc/kvm/book3s_64_interrupts.S | |||
@@ -95,17 +95,14 @@ kvm_start_entry: | |||
95 | ld r3, VCPU_HIGHMEM_HANDLER(r4) | 95 | ld r3, VCPU_HIGHMEM_HANDLER(r4) |
96 | std r3, PACA_KVM_VMHANDLER(r13) | 96 | std r3, PACA_KVM_VMHANDLER(r13) |
97 | 97 | ||
98 | ld r3, VCPU_TRAMPOLINE_ENTER(r4) | ||
99 | std r3, PACA_KVM_RMHANDLER(r13) | ||
100 | |||
101 | kvm_start_lightweight: | 98 | kvm_start_lightweight: |
102 | 99 | ||
103 | ld r9, VCPU_PC(r4) /* r9 = vcpu->arch.pc */ | 100 | ld r9, VCPU_PC(r4) /* r9 = vcpu->arch.pc */ |
104 | ld r10, VCPU_SHADOW_MSR(r4) /* r10 = vcpu->arch.shadow_msr */ | 101 | ld r10, VCPU_SHADOW_MSR(r4) /* r10 = vcpu->arch.shadow_msr */ |
105 | 102 | ||
106 | /* Load some guest state in the respective registers */ | 103 | /* Load some guest state in the respective registers */ |
107 | ld r3, VCPU_CTR(r4) /* r3 = vcpu->arch.ctr */ | 104 | ld r5, VCPU_CTR(r4) /* r5 = vcpu->arch.ctr */ |
108 | mtctr r3 /* CTR = r3 */ | 105 | /* will be swapped in by rmcall */ |
109 | 106 | ||
110 | ld r3, VCPU_LR(r4) /* r3 = vcpu->arch.lr */ | 107 | ld r3, VCPU_LR(r4) /* r3 = vcpu->arch.lr */ |
111 | mtlr r3 /* LR = r3 */ | 108 | mtlr r3 /* LR = r3 */ |
@@ -131,22 +128,14 @@ kvm_start_lightweight: | |||
131 | 128 | ||
132 | no_dcbz32_on: | 129 | no_dcbz32_on: |
133 | 130 | ||
134 | /* This sets the Magic value for the trampoline */ | 131 | ld r6, VCPU_RMCALL(r4) |
135 | 132 | mtctr r6 | |
136 | /* XXX this needs to move into a safe function, so we can | ||
137 | be sure we don't get any interrupts */ | ||
138 | |||
139 | li r11, 1 | ||
140 | stb r11, PACA_KVM_IN_GUEST(r13) | ||
141 | |||
142 | ld r3, PACA_KVM_RMHANDLER(r13) | ||
143 | mtsrr0 r3 | ||
144 | 133 | ||
145 | LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR)) | 134 | ld r3, VCPU_TRAMPOLINE_ENTER(r4) |
146 | mtsrr1 r3 | 135 | LOAD_REG_IMMEDIATE(r4, MSR_KERNEL & ~(MSR_IR | MSR_DR)) |
147 | 136 | ||
148 | /* Jump to SLB patching handlder and into our guest */ | 137 | /* Jump to SLB patching handlder and into our guest */ |
149 | RFI | 138 | bctr |
150 | 139 | ||
151 | /* | 140 | /* |
152 | * This is the handler in module memory. It gets jumped at from the | 141 | * This is the handler in module memory. It gets jumped at from the |