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-rw-r--r--arch/powerpc/kernel/ptrace.c17
-rw-r--r--arch/powerpc/kernel/ptrace32.c1
-rw-r--r--arch/powerpc/kernel/vector.S6
3 files changed, 12 insertions, 12 deletions
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 9fa2c7dcd05a..ef149880c145 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -736,15 +736,16 @@ void user_disable_single_step(struct task_struct *task)
736{ 736{
737 struct pt_regs *regs = task->thread.regs; 737 struct pt_regs *regs = task->thread.regs;
738 738
739
740#if defined(CONFIG_BOOKE)
741 /* If DAC then do not single step, skip */
742 if (task->thread.dabr)
743 return;
744#endif
745
746 if (regs != NULL) { 739 if (regs != NULL) {
747#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 740#if defined(CONFIG_BOOKE)
741 /* If DAC don't clear DBCRO_IDM or MSR_DE */
742 if (task->thread.dabr)
743 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT);
744 else {
745 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM);
746 regs->msr &= ~MSR_DE;
747 }
748#elif defined(CONFIG_40x)
748 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM); 749 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM);
749 regs->msr &= ~MSR_DE; 750 regs->msr &= ~MSR_DE;
750#else 751#else
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 297632cba047..8a6daf4129f6 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -21,7 +21,6 @@
21#include <linux/sched.h> 21#include <linux/sched.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/smp.h> 23#include <linux/smp.h>
24#include <linux/smp_lock.h>
25#include <linux/errno.h> 24#include <linux/errno.h>
26#include <linux/ptrace.h> 25#include <linux/ptrace.h>
27#include <linux/regset.h> 26#include <linux/regset.h>
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index ef36cbbc5882..ea4d64644d02 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -80,10 +80,10 @@ _GLOBAL(load_up_altivec)
80 mtvscr vr0 80 mtvscr vr0
81 REST_32VRS(0,r4,r5) 81 REST_32VRS(0,r4,r5)
82#ifndef CONFIG_SMP 82#ifndef CONFIG_SMP
83 /* Update last_task_used_math to 'current' */ 83 /* Update last_task_used_altivec to 'current' */
84 subi r4,r5,THREAD /* Back to 'current' */ 84 subi r4,r5,THREAD /* Back to 'current' */
85 fromreal(r4) 85 fromreal(r4)
86 PPC_STL r4,ADDROFF(last_task_used_math)(r3) 86 PPC_STL r4,ADDROFF(last_task_used_altivec)(r3)
87#endif /* CONFIG_SMP */ 87#endif /* CONFIG_SMP */
88 /* restore registers and return */ 88 /* restore registers and return */
89 blr 89 blr
@@ -172,7 +172,7 @@ _GLOBAL(load_up_vsx)
172 oris r12,r12,MSR_VSX@h 172 oris r12,r12,MSR_VSX@h
173 std r12,_MSR(r1) 173 std r12,_MSR(r1)
174#ifndef CONFIG_SMP 174#ifndef CONFIG_SMP
175 /* Update last_task_used_math to 'current' */ 175 /* Update last_task_used_vsx to 'current' */
176 ld r4,PACACURRENT(r13) 176 ld r4,PACACURRENT(r13)
177 std r4,0(r3) 177 std r4,0(r3)
178#endif /* CONFIG_SMP */ 178#endif /* CONFIG_SMP */