5 files changed, 169 insertions, 22 deletions

diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 5a5b24685081..8b6008ab217d 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -40,7 +40,7 @@
 #endif
 
 unsigned long pci_probe_only = 1;
-unsigned long pci_assign_all_buses = 0;
+int pci_assign_all_buses = 0;
 
 /*
  * legal IO pages under MAX_ISA_PORT.  This is to ensure we don't touch
@@ -55,11 +55,6 @@ static void fixup_resource(struct resource *res, struct pci_dev *dev);
 static void do_bus_setup(struct pci_bus *bus);
 #endif
 
-unsigned int pcibios_assign_all_busses(void)
-{
-        return pci_assign_all_buses;
-}
-
 /* pci_io_base -- the base address from which io bars are offsets.
  * This is the lowest I/O base address (so bar values are always positive),
  * and it *must* be the start of ISA space if an ISA bus exists because
@@ -1186,17 +1181,6 @@ void phbs_remap_io(void)
                 remap_bus_range(hose->bus);
 }
 
-/*
- * ppc64 can have multifunction devices that do not respond to function 0.
- * In this case we must scan all functions.
- * XXX this can go now, we use the OF device tree in all the
- * cases that caused problems. -- paulus
- */
-int pcibios_scan_all_fns(struct pci_bus *bus, int devfn)
-{
-       return 0;
-}
-
 static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
 {
         struct pci_controller *hose = pci_bus_to_host(dev->bus);
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 59846b40d521..af4d1bc9a2eb 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -146,9 +146,6 @@ EXPORT_SYMBOL(pci_bus_io_base);
 EXPORT_SYMBOL(pci_bus_io_base_phys);
 EXPORT_SYMBOL(pci_bus_mem_base_phys);
 EXPORT_SYMBOL(pci_bus_to_hose);
-EXPORT_SYMBOL(pci_resource_to_bus);
-EXPORT_SYMBOL(pci_phys_to_bus);
-EXPORT_SYMBOL(pci_bus_to_phys);
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_NOT_COHERENT_CACHE
diff --git a/arch/powerpc/kernel/ptrace-common.h b/arch/powerpc/kernel/ptrace-common.h
new file mode 100644
index 000000000000..b1babb729673
--- /dev/null
+++ b/arch/powerpc/kernel/ptrace-common.h
@@ -0,0 +1,164 @@
+/*
+ *  linux/arch/ppc64/kernel/ptrace-common.h
+ *
+ *    Copyright (c) 2002 Stephen Rothwell, IBM Coproration
+ *    Extracted from ptrace.c and ptrace32.c
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file README.legal in the main directory of
+ * this archive for more details.
+ */
+
+#ifndef _PPC64_PTRACE_COMMON_H
+#define _PPC64_PTRACE_COMMON_H
+
+#include <linux/config.h>
+#include <asm/system.h>
+
+/*
+ * Set of msr bits that gdb can change on behalf of a process.
+ */
+#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
+
+/*
+ * Get contents of register REGNO in task TASK.
+ */
+static inline unsigned long get_reg(struct task_struct *task, int regno)
+{
+        unsigned long tmp = 0;
+
+        /*
+         * Put the correct FP bits in, they might be wrong as a result
+         * of our lazy FP restore.
+         */
+        if (regno == PT_MSR) {
+                tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
+                tmp |= task->thread.fpexc_mode;
+        } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
+                tmp = ((unsigned long *)task->thread.regs)[regno];
+        }
+
+        return tmp;
+}
+
+/*
+ * Write contents of register REGNO in task TASK.
+ */
+static inline int put_reg(struct task_struct *task, int regno,
+                          unsigned long data)
+{
+        if (regno < PT_SOFTE) {
+                if (regno == PT_MSR)
+                        data = (data & MSR_DEBUGCHANGE)
+                                | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
+                ((unsigned long *)task->thread.regs)[regno] = data;
+                return 0;
+        }
+        return -EIO;
+}
+
+static inline void set_single_step(struct task_struct *task)
+{
+        struct pt_regs *regs = task->thread.regs;
+        if (regs != NULL)
+                regs->msr |= MSR_SE;
+        set_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
+}
+
+static inline void clear_single_step(struct task_struct *task)
+{
+        struct pt_regs *regs = task->thread.regs;
+        if (regs != NULL)
+                regs->msr &= ~MSR_SE;
+        clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
+}
+
+#ifdef CONFIG_ALTIVEC
+/*
+ * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
+ * The transfer totals 34 quadword.  Quadwords 0-31 contain the
+ * corresponding vector registers.  Quadword 32 contains the vscr as the
+ * last word (offset 12) within that quadword.  Quadword 33 contains the
+ * vrsave as the first word (offset 0) within the quadword.
+ *
+ * This definition of the VMX state is compatible with the current PPC32
+ * ptrace interface.  This allows signal handling and ptrace to use the
+ * same structures.  This also simplifies the implementation of a bi-arch
+ * (combined (32- and 64-bit) gdb.
+ */
+
+/*
+ * Get contents of AltiVec register state in task TASK
+ */
+static inline int get_vrregs(unsigned long __user *data,
+                             struct task_struct *task)
+{
+        unsigned long regsize;
+
+        /* copy AltiVec registers VR[0] .. VR[31] */
+        regsize = 32 * sizeof(vector128);
+        if (copy_to_user(data, task->thread.vr, regsize))
+                return -EFAULT;
+        data += (regsize / sizeof(unsigned long));
+
+        /* copy VSCR */
+        regsize = 1 * sizeof(vector128);
+        if (copy_to_user(data, &task->thread.vscr, regsize))
+                return -EFAULT;
+        data += (regsize / sizeof(unsigned long));
+
+        /* copy VRSAVE */
+        if (put_user(task->thread.vrsave, (u32 __user *)data))
+                return -EFAULT;
+
+        return 0;
+}
+
+/*
+ * Write contents of AltiVec register state into task TASK.
+ */
+static inline int set_vrregs(struct task_struct *task,
+                             unsigned long __user *data)
+{
+        unsigned long regsize;
+
+        /* copy AltiVec registers VR[0] .. VR[31] */
+        regsize = 32 * sizeof(vector128);
+        if (copy_from_user(task->thread.vr, data, regsize))
+                return -EFAULT;
+        data += (regsize / sizeof(unsigned long));
+
+        /* copy VSCR */
+        regsize = 1 * sizeof(vector128);
+        if (copy_from_user(&task->thread.vscr, data, regsize))
+                return -EFAULT;
+        data += (regsize / sizeof(unsigned long));
+
+        /* copy VRSAVE */
+        if (get_user(task->thread.vrsave, (u32 __user *)data))
+                return -EFAULT;
+
+        return 0;
+}
+#endif
+
+static inline int ptrace_set_debugreg(struct task_struct *task,
+                                      unsigned long addr, unsigned long data)
+{
+        /* We only support one DABR and no IABRS at the moment */
+        if (addr > 0)
+                return -EINVAL;
+
+        /* The bottom 3 bits are flags */
+        if ((data & ~0x7UL) >= TASK_SIZE)
+                return -EIO;
+
+        /* Ensure translation is on */
+        if (data && !(data & DABR_TRANSLATION))
+                return -EIO;
+
+        task->thread.dabr = data;
+        return 0;
+}
+
+#endif /* _PPC64_PTRACE_COMMON_H */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 3d2abd95c7ae..400793c71304 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -36,8 +36,9 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
+
 #ifdef CONFIG_PPC64
-#include <asm/ptrace-common.h>
+#include "ptrace-common.h"
 #endif
 
 #ifdef CONFIG_PPC32
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 91eb952e0293..61762640b877 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -33,7 +33,8 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
-#include <asm/ptrace-common.h>
+
+#include "ptrace-common.h"
 
 /*
  * does not yet catch signals sent when the child dies.