diff options
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 20 | ||||
-rw-r--r-- | arch/powerpc/kernel/head_fsl_booke.S | 187 | ||||
-rw-r--r-- | arch/powerpc/kernel/iommu.c | 13 | ||||
-rw-r--r-- | arch/powerpc/kernel/kgdb.c | 410 | ||||
-rw-r--r-- | arch/powerpc/kernel/pci-common.c | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/prom_parse.c | 44 | ||||
-rw-r--r-- | arch/powerpc/kernel/setup_32.c | 16 | ||||
-rw-r--r-- | arch/powerpc/kernel/stacktrace.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/suspend.c | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/sysfs.c | 15 | ||||
-rw-r--r-- | arch/powerpc/kernel/vmlinux.lds.S | 31 |
12 files changed, 553 insertions, 188 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index bf0b1fd0ec34..1a4094704b1f 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -74,6 +74,7 @@ obj-y += time.o prom.o traps.o setup-common.o \ | |||
74 | misc_$(CONFIG_WORD_SIZE).o | 74 | misc_$(CONFIG_WORD_SIZE).o |
75 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o | 75 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o |
76 | obj-$(CONFIG_PPC64) += dma_64.o iommu.o | 76 | obj-$(CONFIG_PPC64) += dma_64.o iommu.o |
77 | obj-$(CONFIG_KGDB) += kgdb.o | ||
77 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o | 78 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o |
78 | obj-$(CONFIG_MODULES) += ppc_ksyms.o | 79 | obj-$(CONFIG_MODULES) += ppc_ksyms.o |
79 | obj-$(CONFIG_BOOTX_TEXT) += btext.o | 80 | obj-$(CONFIG_BOOTX_TEXT) += btext.o |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index f7f3c215d06f..b936a1dd0a50 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -355,6 +355,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
355 | .icache_bsize = 128, | 355 | .icache_bsize = 128, |
356 | .dcache_bsize = 128, | 356 | .dcache_bsize = 128, |
357 | .machine_check = machine_check_generic, | 357 | .machine_check = machine_check_generic, |
358 | .oprofile_cpu_type = "ppc64/compat-power5+", | ||
358 | .platform = "power5+", | 359 | .platform = "power5+", |
359 | }, | 360 | }, |
360 | { /* Power6 */ | 361 | { /* Power6 */ |
@@ -386,6 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
386 | .icache_bsize = 128, | 387 | .icache_bsize = 128, |
387 | .dcache_bsize = 128, | 388 | .dcache_bsize = 128, |
388 | .machine_check = machine_check_generic, | 389 | .machine_check = machine_check_generic, |
390 | .oprofile_cpu_type = "ppc64/compat-power6", | ||
389 | .platform = "power6", | 391 | .platform = "power6", |
390 | }, | 392 | }, |
391 | { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ | 393 | { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ |
@@ -397,6 +399,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
397 | .icache_bsize = 128, | 399 | .icache_bsize = 128, |
398 | .dcache_bsize = 128, | 400 | .dcache_bsize = 128, |
399 | .machine_check = machine_check_generic, | 401 | .machine_check = machine_check_generic, |
402 | .oprofile_cpu_type = "ppc64/compat-power7", | ||
400 | .platform = "power7", | 403 | .platform = "power7", |
401 | }, | 404 | }, |
402 | { /* Power7 */ | 405 | { /* Power7 */ |
@@ -1629,6 +1632,23 @@ struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) | |||
1629 | t->cpu_setup = s->cpu_setup; | 1632 | t->cpu_setup = s->cpu_setup; |
1630 | t->cpu_restore = s->cpu_restore; | 1633 | t->cpu_restore = s->cpu_restore; |
1631 | t->platform = s->platform; | 1634 | t->platform = s->platform; |
1635 | /* | ||
1636 | * If we have passed through this logic once | ||
1637 | * before and have pulled the default case | ||
1638 | * because the real PVR was not found inside | ||
1639 | * cpu_specs[], then we are possibly running in | ||
1640 | * compatibility mode. In that case, let the | ||
1641 | * oprofiler know which set of compatibility | ||
1642 | * counters to pull from by making sure the | ||
1643 | * oprofile_cpu_type string is set to that of | ||
1644 | * compatibility mode. If the oprofile_cpu_type | ||
1645 | * already has a value, then we are possibly | ||
1646 | * overriding a real PVR with a logical one, and, | ||
1647 | * in that case, keep the current value for | ||
1648 | * oprofile_cpu_type. | ||
1649 | */ | ||
1650 | if (t->oprofile_cpu_type == NULL) | ||
1651 | t->oprofile_cpu_type = s->oprofile_cpu_type; | ||
1632 | } else | 1652 | } else |
1633 | *t = *s; | 1653 | *t = *s; |
1634 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; | 1654 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index c4268500e856..3cb52fa0eda3 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -151,16 +151,11 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
151 | /* Invalidate TLB0 */ | 151 | /* Invalidate TLB0 */ |
152 | li r6,0x04 | 152 | li r6,0x04 |
153 | tlbivax 0,r6 | 153 | tlbivax 0,r6 |
154 | #ifdef CONFIG_SMP | 154 | TLBSYNC |
155 | tlbsync | ||
156 | #endif | ||
157 | /* Invalidate TLB1 */ | 155 | /* Invalidate TLB1 */ |
158 | li r6,0x0c | 156 | li r6,0x0c |
159 | tlbivax 0,r6 | 157 | tlbivax 0,r6 |
160 | #ifdef CONFIG_SMP | 158 | TLBSYNC |
161 | tlbsync | ||
162 | #endif | ||
163 | msync | ||
164 | 159 | ||
165 | /* 3. Setup a temp mapping and jump to it */ | 160 | /* 3. Setup a temp mapping and jump to it */ |
166 | andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ | 161 | andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ |
@@ -238,10 +233,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
238 | /* Invalidate TLB1 */ | 233 | /* Invalidate TLB1 */ |
239 | li r9,0x0c | 234 | li r9,0x0c |
240 | tlbivax 0,r9 | 235 | tlbivax 0,r9 |
241 | #ifdef CONFIG_SMP | 236 | TLBSYNC |
242 | tlbsync | ||
243 | #endif | ||
244 | msync | ||
245 | 237 | ||
246 | /* 6. Setup KERNELBASE mapping in TLB1[0] */ | 238 | /* 6. Setup KERNELBASE mapping in TLB1[0] */ |
247 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ | 239 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ |
@@ -283,10 +275,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
283 | /* Invalidate TLB1 */ | 275 | /* Invalidate TLB1 */ |
284 | li r9,0x0c | 276 | li r9,0x0c |
285 | tlbivax 0,r9 | 277 | tlbivax 0,r9 |
286 | #ifdef CONFIG_SMP | 278 | TLBSYNC |
287 | tlbsync | ||
288 | #endif | ||
289 | msync | ||
290 | 279 | ||
291 | /* Establish the interrupt vector offsets */ | 280 | /* Establish the interrupt vector offsets */ |
292 | SET_IVOR(0, CriticalInput); | 281 | SET_IVOR(0, CriticalInput); |
@@ -483,90 +472,16 @@ interrupt_base: | |||
483 | 472 | ||
484 | /* Data Storage Interrupt */ | 473 | /* Data Storage Interrupt */ |
485 | START_EXCEPTION(DataStorage) | 474 | START_EXCEPTION(DataStorage) |
486 | mtspr SPRN_SPRG0, r10 /* Save some working registers */ | 475 | NORMAL_EXCEPTION_PROLOG |
487 | mtspr SPRN_SPRG1, r11 | 476 | mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ |
488 | mtspr SPRN_SPRG4W, r12 | 477 | stw r5,_ESR(r11) |
489 | mtspr SPRN_SPRG5W, r13 | 478 | mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ |
490 | mfcr r11 | 479 | andis. r10,r5,(ESR_ILK|ESR_DLK)@h |
491 | mtspr SPRN_SPRG7W, r11 | 480 | bne 1f |
492 | 481 | EXC_XFER_EE_LITE(0x0300, handle_page_fault) | |
493 | /* | 482 | 1: |
494 | * Check if it was a store fault, if not then bail | 483 | addi r3,r1,STACK_FRAME_OVERHEAD |
495 | * because a user tried to access a kernel or | 484 | EXC_XFER_EE_LITE(0x0300, CacheLockingException) |
496 | * read-protected page. Otherwise, get the | ||
497 | * offending address and handle it. | ||
498 | */ | ||
499 | mfspr r10, SPRN_ESR | ||
500 | andis. r10, r10, ESR_ST@h | ||
501 | beq 2f | ||
502 | |||
503 | mfspr r10, SPRN_DEAR /* Get faulting address */ | ||
504 | |||
505 | /* If we are faulting a kernel address, we have to use the | ||
506 | * kernel page tables. | ||
507 | */ | ||
508 | lis r11, PAGE_OFFSET@h | ||
509 | cmplw 0, r10, r11 | ||
510 | bge 2f | ||
511 | |||
512 | /* Get the PGD for the current thread */ | ||
513 | 3: | ||
514 | mfspr r11,SPRN_SPRG3 | ||
515 | lwz r11,PGDIR(r11) | ||
516 | 4: | ||
517 | FIND_PTE | ||
518 | |||
519 | /* Are _PAGE_USER & _PAGE_RW set & _PAGE_HWWRITE not? */ | ||
520 | andi. r13, r11, _PAGE_RW|_PAGE_USER|_PAGE_HWWRITE | ||
521 | cmpwi 0, r13, _PAGE_RW|_PAGE_USER | ||
522 | bne 2f /* Bail if not */ | ||
523 | |||
524 | /* Update 'changed'. */ | ||
525 | ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE | ||
526 | stw r11, PTE_FLAGS_OFFSET(r12) /* Update Linux page table */ | ||
527 | |||
528 | /* MAS2 not updated as the entry does exist in the tlb, this | ||
529 | fault taken to detect state transition (eg: COW -> DIRTY) | ||
530 | */ | ||
531 | andi. r11, r11, _PAGE_HWEXEC | ||
532 | rlwimi r11, r11, 31, 27, 27 /* SX <- _PAGE_HWEXEC */ | ||
533 | ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */ | ||
534 | |||
535 | /* update search PID in MAS6, AS = 0 */ | ||
536 | mfspr r12, SPRN_PID0 | ||
537 | slwi r12, r12, 16 | ||
538 | mtspr SPRN_MAS6, r12 | ||
539 | |||
540 | /* find the TLB index that caused the fault. It has to be here. */ | ||
541 | tlbsx 0, r10 | ||
542 | |||
543 | /* only update the perm bits, assume the RPN is fine */ | ||
544 | mfspr r12, SPRN_MAS3 | ||
545 | rlwimi r12, r11, 0, 20, 31 | ||
546 | mtspr SPRN_MAS3,r12 | ||
547 | tlbwe | ||
548 | |||
549 | /* Done...restore registers and get out of here. */ | ||
550 | mfspr r11, SPRN_SPRG7R | ||
551 | mtcr r11 | ||
552 | mfspr r13, SPRN_SPRG5R | ||
553 | mfspr r12, SPRN_SPRG4R | ||
554 | mfspr r11, SPRN_SPRG1 | ||
555 | mfspr r10, SPRN_SPRG0 | ||
556 | rfi /* Force context change */ | ||
557 | |||
558 | 2: | ||
559 | /* | ||
560 | * The bailout. Restore registers to pre-exception conditions | ||
561 | * and call the heavyweights to help us out. | ||
562 | */ | ||
563 | mfspr r11, SPRN_SPRG7R | ||
564 | mtcr r11 | ||
565 | mfspr r13, SPRN_SPRG5R | ||
566 | mfspr r12, SPRN_SPRG4R | ||
567 | mfspr r11, SPRN_SPRG1 | ||
568 | mfspr r10, SPRN_SPRG0 | ||
569 | b data_access | ||
570 | 485 | ||
571 | /* Instruction Storage Interrupt */ | 486 | /* Instruction Storage Interrupt */ |
572 | INSTRUCTION_STORAGE_EXCEPTION | 487 | INSTRUCTION_STORAGE_EXCEPTION |
@@ -645,15 +560,30 @@ interrupt_base: | |||
645 | lwz r11,PGDIR(r11) | 560 | lwz r11,PGDIR(r11) |
646 | 561 | ||
647 | 4: | 562 | 4: |
563 | /* Mask of required permission bits. Note that while we | ||
564 | * do copy ESR:ST to _PAGE_RW position as trying to write | ||
565 | * to an RO page is pretty common, we don't do it with | ||
566 | * _PAGE_DIRTY. We could do it, but it's a fairly rare | ||
567 | * event so I'd rather take the overhead when it happens | ||
568 | * rather than adding an instruction here. We should measure | ||
569 | * whether the whole thing is worth it in the first place | ||
570 | * as we could avoid loading SPRN_ESR completely in the first | ||
571 | * place... | ||
572 | * | ||
573 | * TODO: Is it worth doing that mfspr & rlwimi in the first | ||
574 | * place or can we save a couple of instructions here ? | ||
575 | */ | ||
576 | mfspr r12,SPRN_ESR | ||
577 | li r13,_PAGE_PRESENT|_PAGE_ACCESSED | ||
578 | rlwimi r13,r12,11,29,29 | ||
579 | |||
648 | FIND_PTE | 580 | FIND_PTE |
649 | andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ | 581 | andc. r13,r13,r11 /* Check permission */ |
650 | beq 2f /* Bail if not present */ | 582 | bne 2f /* Bail if permission mismach */ |
651 | 583 | ||
652 | #ifdef CONFIG_PTE_64BIT | 584 | #ifdef CONFIG_PTE_64BIT |
653 | lwz r13, 0(r12) | 585 | lwz r13, 0(r12) |
654 | #endif | 586 | #endif |
655 | ori r11, r11, _PAGE_ACCESSED | ||
656 | stw r11, PTE_FLAGS_OFFSET(r12) | ||
657 | 587 | ||
658 | /* Jump to common tlb load */ | 588 | /* Jump to common tlb load */ |
659 | b finish_tlb_load | 589 | b finish_tlb_load |
@@ -667,7 +597,7 @@ interrupt_base: | |||
667 | mfspr r12, SPRN_SPRG4R | 597 | mfspr r12, SPRN_SPRG4R |
668 | mfspr r11, SPRN_SPRG1 | 598 | mfspr r11, SPRN_SPRG1 |
669 | mfspr r10, SPRN_SPRG0 | 599 | mfspr r10, SPRN_SPRG0 |
670 | b data_access | 600 | b DataStorage |
671 | 601 | ||
672 | /* Instruction TLB Error Interrupt */ | 602 | /* Instruction TLB Error Interrupt */ |
673 | /* | 603 | /* |
@@ -705,15 +635,16 @@ interrupt_base: | |||
705 | lwz r11,PGDIR(r11) | 635 | lwz r11,PGDIR(r11) |
706 | 636 | ||
707 | 4: | 637 | 4: |
638 | /* Make up the required permissions */ | ||
639 | li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC | ||
640 | |||
708 | FIND_PTE | 641 | FIND_PTE |
709 | andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ | 642 | andc. r13,r13,r11 /* Check permission */ |
710 | beq 2f /* Bail if not present */ | 643 | bne 2f /* Bail if permission mismach */ |
711 | 644 | ||
712 | #ifdef CONFIG_PTE_64BIT | 645 | #ifdef CONFIG_PTE_64BIT |
713 | lwz r13, 0(r12) | 646 | lwz r13, 0(r12) |
714 | #endif | 647 | #endif |
715 | ori r11, r11, _PAGE_ACCESSED | ||
716 | stw r11, PTE_FLAGS_OFFSET(r12) | ||
717 | 648 | ||
718 | /* Jump to common TLB load point */ | 649 | /* Jump to common TLB load point */ |
719 | b finish_tlb_load | 650 | b finish_tlb_load |
@@ -768,29 +699,13 @@ interrupt_base: | |||
768 | * Local functions | 699 | * Local functions |
769 | */ | 700 | */ |
770 | 701 | ||
771 | /* | ||
772 | * Data TLB exceptions will bail out to this point | ||
773 | * if they can't resolve the lightweight TLB fault. | ||
774 | */ | ||
775 | data_access: | ||
776 | NORMAL_EXCEPTION_PROLOG | ||
777 | mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ | ||
778 | stw r5,_ESR(r11) | ||
779 | mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ | ||
780 | andis. r10,r5,(ESR_ILK|ESR_DLK)@h | ||
781 | bne 1f | ||
782 | EXC_XFER_EE_LITE(0x0300, handle_page_fault) | ||
783 | 1: | ||
784 | addi r3,r1,STACK_FRAME_OVERHEAD | ||
785 | EXC_XFER_EE_LITE(0x0300, CacheLockingException) | ||
786 | |||
787 | /* | 702 | /* |
788 | |||
789 | * Both the instruction and data TLB miss get to this | 703 | * Both the instruction and data TLB miss get to this |
790 | * point to load the TLB. | 704 | * point to load the TLB. |
791 | * r10 - EA of fault | 705 | * r10 - EA of fault |
792 | * r11 - TLB (info from Linux PTE) | 706 | * r11 - TLB (info from Linux PTE) |
793 | * r12, r13 - available to use | 707 | * r12 - available to use |
708 | * r13 - upper bits of PTE (if PTE_64BIT) or available to use | ||
794 | * CR5 - results of addr >= PAGE_OFFSET | 709 | * CR5 - results of addr >= PAGE_OFFSET |
795 | * MAS0, MAS1 - loaded with proper value when we get here | 710 | * MAS0, MAS1 - loaded with proper value when we get here |
796 | * MAS2, MAS3 - will need additional info from Linux PTE | 711 | * MAS2, MAS3 - will need additional info from Linux PTE |
@@ -812,20 +727,14 @@ finish_tlb_load: | |||
812 | #endif | 727 | #endif |
813 | mtspr SPRN_MAS2, r12 | 728 | mtspr SPRN_MAS2, r12 |
814 | 729 | ||
815 | bge 5, 1f | 730 | li r10, (_PAGE_HWEXEC | _PAGE_PRESENT) |
816 | 731 | rlwimi r10, r11, 31, 29, 29 /* extract _PAGE_DIRTY into SW */ | |
817 | /* is user addr */ | 732 | and r12, r11, r10 |
818 | andi. r12, r11, (_PAGE_USER | _PAGE_HWWRITE | _PAGE_HWEXEC) | ||
819 | andi. r10, r11, _PAGE_USER /* Test for _PAGE_USER */ | 733 | andi. r10, r11, _PAGE_USER /* Test for _PAGE_USER */ |
820 | srwi r10, r12, 1 | 734 | slwi r10, r12, 1 |
821 | or r12, r12, r10 /* Copy user perms into supervisor */ | 735 | or r10, r10, r12 |
822 | iseleq r12, 0, r12 | 736 | iseleq r12, r12, r10 |
823 | b 2f | 737 | |
824 | |||
825 | /* is kernel addr */ | ||
826 | 1: rlwinm r12, r11, 31, 29, 29 /* Extract _PAGE_HWWRITE into SW */ | ||
827 | ori r12, r12, (MAS3_SX | MAS3_SR) | ||
828 | |||
829 | #ifdef CONFIG_PTE_64BIT | 738 | #ifdef CONFIG_PTE_64BIT |
830 | 2: rlwimi r12, r13, 24, 0, 7 /* grab RPN[32:39] */ | 739 | 2: rlwimi r12, r13, 24, 0, 7 /* grab RPN[32:39] */ |
831 | rlwimi r12, r11, 24, 8, 19 /* grab RPN[40:51] */ | 740 | rlwimi r12, r11, 24, 8, 19 /* grab RPN[40:51] */ |
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index 8c68ee9e5d1c..2385f68c1751 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c | |||
@@ -186,7 +186,8 @@ static unsigned long iommu_range_alloc(struct device *dev, | |||
186 | static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl, | 186 | static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl, |
187 | void *page, unsigned int npages, | 187 | void *page, unsigned int npages, |
188 | enum dma_data_direction direction, | 188 | enum dma_data_direction direction, |
189 | unsigned long mask, unsigned int align_order) | 189 | unsigned long mask, unsigned int align_order, |
190 | struct dma_attrs *attrs) | ||
190 | { | 191 | { |
191 | unsigned long entry, flags; | 192 | unsigned long entry, flags; |
192 | dma_addr_t ret = DMA_ERROR_CODE; | 193 | dma_addr_t ret = DMA_ERROR_CODE; |
@@ -205,7 +206,7 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl, | |||
205 | 206 | ||
206 | /* Put the TCEs in the HW table */ | 207 | /* Put the TCEs in the HW table */ |
207 | ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK, | 208 | ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK, |
208 | direction); | 209 | direction, attrs); |
209 | 210 | ||
210 | 211 | ||
211 | /* Flush/invalidate TLB caches if necessary */ | 212 | /* Flush/invalidate TLB caches if necessary */ |
@@ -336,7 +337,8 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl, | |||
336 | npages, entry, dma_addr); | 337 | npages, entry, dma_addr); |
337 | 338 | ||
338 | /* Insert into HW table */ | 339 | /* Insert into HW table */ |
339 | ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, direction); | 340 | ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, |
341 | direction, attrs); | ||
340 | 342 | ||
341 | /* If we are in an open segment, try merging */ | 343 | /* If we are in an open segment, try merging */ |
342 | if (segstart != s) { | 344 | if (segstart != s) { |
@@ -573,7 +575,8 @@ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, | |||
573 | align = PAGE_SHIFT - IOMMU_PAGE_SHIFT; | 575 | align = PAGE_SHIFT - IOMMU_PAGE_SHIFT; |
574 | 576 | ||
575 | dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction, | 577 | dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction, |
576 | mask >> IOMMU_PAGE_SHIFT, align); | 578 | mask >> IOMMU_PAGE_SHIFT, align, |
579 | attrs); | ||
577 | if (dma_handle == DMA_ERROR_CODE) { | 580 | if (dma_handle == DMA_ERROR_CODE) { |
578 | if (printk_ratelimit()) { | 581 | if (printk_ratelimit()) { |
579 | printk(KERN_INFO "iommu_alloc failed, " | 582 | printk(KERN_INFO "iommu_alloc failed, " |
@@ -642,7 +645,7 @@ void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, | |||
642 | nio_pages = size >> IOMMU_PAGE_SHIFT; | 645 | nio_pages = size >> IOMMU_PAGE_SHIFT; |
643 | io_order = get_iommu_order(size); | 646 | io_order = get_iommu_order(size); |
644 | mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL, | 647 | mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL, |
645 | mask >> IOMMU_PAGE_SHIFT, io_order); | 648 | mask >> IOMMU_PAGE_SHIFT, io_order, NULL); |
646 | if (mapping == DMA_ERROR_CODE) { | 649 | if (mapping == DMA_ERROR_CODE) { |
647 | free_pages((unsigned long)ret, order); | 650 | free_pages((unsigned long)ret, order); |
648 | return NULL; | 651 | return NULL; |
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c new file mode 100644 index 000000000000..b4fdf2f2743c --- /dev/null +++ b/arch/powerpc/kernel/kgdb.c | |||
@@ -0,0 +1,410 @@ | |||
1 | /* | ||
2 | * PowerPC backend to the KGDB stub. | ||
3 | * | ||
4 | * 1998 (c) Michael AK Tesch (tesch@cs.wisc.edu) | ||
5 | * Copyright (C) 2003 Timesys Corporation. | ||
6 | * Copyright (C) 2004-2006 MontaVista Software, Inc. | ||
7 | * PPC64 Mods (C) 2005 Frank Rowand (frowand@mvista.com) | ||
8 | * PPC32 support restored by Vitaly Wool <vwool@ru.mvista.com> and | ||
9 | * Sergei Shtylyov <sshtylyov@ru.mvista.com> | ||
10 | * Copyright (C) 2007-2008 Wind River Systems, Inc. | ||
11 | * | ||
12 | * This file is licensed under the terms of the GNU General Public License | ||
13 | * version 2. This program as licensed "as is" without any warranty of any | ||
14 | * kind, whether express or implied. | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/kgdb.h> | ||
20 | #include <linux/smp.h> | ||
21 | #include <linux/signal.h> | ||
22 | #include <linux/ptrace.h> | ||
23 | #include <asm/current.h> | ||
24 | #include <asm/processor.h> | ||
25 | #include <asm/machdep.h> | ||
26 | |||
27 | /* | ||
28 | * This table contains the mapping between PowerPC hardware trap types, and | ||
29 | * signals, which are primarily what GDB understands. GDB and the kernel | ||
30 | * don't always agree on values, so we use constants taken from gdb-6.2. | ||
31 | */ | ||
32 | static struct hard_trap_info | ||
33 | { | ||
34 | unsigned int tt; /* Trap type code for powerpc */ | ||
35 | unsigned char signo; /* Signal that we map this trap into */ | ||
36 | } hard_trap_info[] = { | ||
37 | { 0x0100, 0x02 /* SIGINT */ }, /* system reset */ | ||
38 | { 0x0200, 0x0b /* SIGSEGV */ }, /* machine check */ | ||
39 | { 0x0300, 0x0b /* SIGSEGV */ }, /* data access */ | ||
40 | { 0x0400, 0x0b /* SIGSEGV */ }, /* instruction access */ | ||
41 | { 0x0500, 0x02 /* SIGINT */ }, /* external interrupt */ | ||
42 | { 0x0600, 0x0a /* SIGBUS */ }, /* alignment */ | ||
43 | { 0x0700, 0x05 /* SIGTRAP */ }, /* program check */ | ||
44 | { 0x0800, 0x08 /* SIGFPE */ }, /* fp unavailable */ | ||
45 | { 0x0900, 0x0e /* SIGALRM */ }, /* decrementer */ | ||
46 | { 0x0c00, 0x14 /* SIGCHLD */ }, /* system call */ | ||
47 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | ||
48 | { 0x2002, 0x05 /* SIGTRAP */ }, /* debug */ | ||
49 | #if defined(CONFIG_FSL_BOOKE) | ||
50 | { 0x2010, 0x08 /* SIGFPE */ }, /* spe unavailable */ | ||
51 | { 0x2020, 0x08 /* SIGFPE */ }, /* spe unavailable */ | ||
52 | { 0x2030, 0x08 /* SIGFPE */ }, /* spe fp data */ | ||
53 | { 0x2040, 0x08 /* SIGFPE */ }, /* spe fp data */ | ||
54 | { 0x2050, 0x08 /* SIGFPE */ }, /* spe fp round */ | ||
55 | { 0x2060, 0x0e /* SIGILL */ }, /* performace monitor */ | ||
56 | { 0x2900, 0x08 /* SIGFPE */ }, /* apu unavailable */ | ||
57 | { 0x3100, 0x0e /* SIGALRM */ }, /* fixed interval timer */ | ||
58 | { 0x3200, 0x02 /* SIGINT */ }, /* watchdog */ | ||
59 | #else /* ! CONFIG_FSL_BOOKE */ | ||
60 | { 0x1000, 0x0e /* SIGALRM */ }, /* prog interval timer */ | ||
61 | { 0x1010, 0x0e /* SIGALRM */ }, /* fixed interval timer */ | ||
62 | { 0x1020, 0x02 /* SIGINT */ }, /* watchdog */ | ||
63 | { 0x2010, 0x08 /* SIGFPE */ }, /* fp unavailable */ | ||
64 | { 0x2020, 0x08 /* SIGFPE */ }, /* ap unavailable */ | ||
65 | #endif | ||
66 | #else /* ! (defined(CONFIG_40x) || defined(CONFIG_BOOKE)) */ | ||
67 | { 0x0d00, 0x05 /* SIGTRAP */ }, /* single-step */ | ||
68 | #if defined(CONFIG_8xx) | ||
69 | { 0x1000, 0x04 /* SIGILL */ }, /* software emulation */ | ||
70 | #else /* ! CONFIG_8xx */ | ||
71 | { 0x0f00, 0x04 /* SIGILL */ }, /* performance monitor */ | ||
72 | { 0x0f20, 0x08 /* SIGFPE */ }, /* altivec unavailable */ | ||
73 | { 0x1300, 0x05 /* SIGTRAP */ }, /* instruction address break */ | ||
74 | #if defined(CONFIG_PPC64) | ||
75 | { 0x1200, 0x05 /* SIGILL */ }, /* system error */ | ||
76 | { 0x1500, 0x04 /* SIGILL */ }, /* soft patch */ | ||
77 | { 0x1600, 0x04 /* SIGILL */ }, /* maintenance */ | ||
78 | { 0x1700, 0x08 /* SIGFPE */ }, /* altivec assist */ | ||
79 | { 0x1800, 0x04 /* SIGILL */ }, /* thermal */ | ||
80 | #else /* ! CONFIG_PPC64 */ | ||
81 | { 0x1400, 0x02 /* SIGINT */ }, /* SMI */ | ||
82 | { 0x1600, 0x08 /* SIGFPE */ }, /* altivec assist */ | ||
83 | { 0x1700, 0x04 /* SIGILL */ }, /* TAU */ | ||
84 | { 0x2000, 0x05 /* SIGTRAP */ }, /* run mode */ | ||
85 | #endif | ||
86 | #endif | ||
87 | #endif | ||
88 | { 0x0000, 0x00 } /* Must be last */ | ||
89 | }; | ||
90 | |||
91 | static int computeSignal(unsigned int tt) | ||
92 | { | ||
93 | struct hard_trap_info *ht; | ||
94 | |||
95 | for (ht = hard_trap_info; ht->tt && ht->signo; ht++) | ||
96 | if (ht->tt == tt) | ||
97 | return ht->signo; | ||
98 | |||
99 | return SIGHUP; /* default for things we don't know about */ | ||
100 | } | ||
101 | |||
102 | static int kgdb_call_nmi_hook(struct pt_regs *regs) | ||
103 | { | ||
104 | kgdb_nmicallback(raw_smp_processor_id(), regs); | ||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | #ifdef CONFIG_SMP | ||
109 | void kgdb_roundup_cpus(unsigned long flags) | ||
110 | { | ||
111 | smp_send_debugger_break(MSG_ALL_BUT_SELF); | ||
112 | } | ||
113 | #endif | ||
114 | |||
115 | /* KGDB functions to use existing PowerPC64 hooks. */ | ||
116 | static int kgdb_debugger(struct pt_regs *regs) | ||
117 | { | ||
118 | return kgdb_handle_exception(0, computeSignal(TRAP(regs)), 0, regs); | ||
119 | } | ||
120 | |||
121 | static int kgdb_handle_breakpoint(struct pt_regs *regs) | ||
122 | { | ||
123 | if (user_mode(regs)) | ||
124 | return 0; | ||
125 | |||
126 | if (kgdb_handle_exception(0, SIGTRAP, 0, regs) != 0) | ||
127 | return 0; | ||
128 | |||
129 | if (*(u32 *) (regs->nip) == *(u32 *) (&arch_kgdb_ops.gdb_bpt_instr)) | ||
130 | regs->nip += 4; | ||
131 | |||
132 | return 1; | ||
133 | } | ||
134 | |||
135 | static int kgdb_singlestep(struct pt_regs *regs) | ||
136 | { | ||
137 | struct thread_info *thread_info, *exception_thread_info; | ||
138 | |||
139 | if (user_mode(regs)) | ||
140 | return 0; | ||
141 | |||
142 | /* | ||
143 | * On Book E and perhaps other processsors, singlestep is handled on | ||
144 | * the critical exception stack. This causes current_thread_info() | ||
145 | * to fail, since it it locates the thread_info by masking off | ||
146 | * the low bits of the current stack pointer. We work around | ||
147 | * this issue by copying the thread_info from the kernel stack | ||
148 | * before calling kgdb_handle_exception, and copying it back | ||
149 | * afterwards. On most processors the copy is avoided since | ||
150 | * exception_thread_info == thread_info. | ||
151 | */ | ||
152 | thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1)); | ||
153 | exception_thread_info = current_thread_info(); | ||
154 | |||
155 | if (thread_info != exception_thread_info) | ||
156 | memcpy(exception_thread_info, thread_info, sizeof *thread_info); | ||
157 | |||
158 | kgdb_handle_exception(0, SIGTRAP, 0, regs); | ||
159 | |||
160 | if (thread_info != exception_thread_info) | ||
161 | memcpy(thread_info, exception_thread_info, sizeof *thread_info); | ||
162 | |||
163 | return 1; | ||
164 | } | ||
165 | |||
166 | static int kgdb_iabr_match(struct pt_regs *regs) | ||
167 | { | ||
168 | if (user_mode(regs)) | ||
169 | return 0; | ||
170 | |||
171 | if (kgdb_handle_exception(0, computeSignal(TRAP(regs)), 0, regs) != 0) | ||
172 | return 0; | ||
173 | return 1; | ||
174 | } | ||
175 | |||
176 | static int kgdb_dabr_match(struct pt_regs *regs) | ||
177 | { | ||
178 | if (user_mode(regs)) | ||
179 | return 0; | ||
180 | |||
181 | if (kgdb_handle_exception(0, computeSignal(TRAP(regs)), 0, regs) != 0) | ||
182 | return 0; | ||
183 | return 1; | ||
184 | } | ||
185 | |||
186 | #define PACK64(ptr, src) do { *(ptr++) = (src); } while (0) | ||
187 | |||
188 | #define PACK32(ptr, src) do { \ | ||
189 | u32 *ptr32; \ | ||
190 | ptr32 = (u32 *)ptr; \ | ||
191 | *(ptr32++) = (src); \ | ||
192 | ptr = (unsigned long *)ptr32; \ | ||
193 | } while (0) | ||
194 | |||
195 | |||
196 | void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) | ||
197 | { | ||
198 | unsigned long *ptr = gdb_regs; | ||
199 | int reg; | ||
200 | |||
201 | memset(gdb_regs, 0, NUMREGBYTES); | ||
202 | |||
203 | for (reg = 0; reg < 32; reg++) | ||
204 | PACK64(ptr, regs->gpr[reg]); | ||
205 | |||
206 | #ifdef CONFIG_FSL_BOOKE | ||
207 | #ifdef CONFIG_SPE | ||
208 | for (reg = 0; reg < 32; reg++) | ||
209 | PACK64(ptr, current->thread.evr[reg]); | ||
210 | #else | ||
211 | ptr += 32; | ||
212 | #endif | ||
213 | #else | ||
214 | /* fp registers not used by kernel, leave zero */ | ||
215 | ptr += 32 * 8 / sizeof(long); | ||
216 | #endif | ||
217 | |||
218 | PACK64(ptr, regs->nip); | ||
219 | PACK64(ptr, regs->msr); | ||
220 | PACK32(ptr, regs->ccr); | ||
221 | PACK64(ptr, regs->link); | ||
222 | PACK64(ptr, regs->ctr); | ||
223 | PACK32(ptr, regs->xer); | ||
224 | |||
225 | BUG_ON((unsigned long)ptr > | ||
226 | (unsigned long)(((void *)gdb_regs) + NUMREGBYTES)); | ||
227 | } | ||
228 | |||
229 | void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) | ||
230 | { | ||
231 | struct pt_regs *regs = (struct pt_regs *)(p->thread.ksp + | ||
232 | STACK_FRAME_OVERHEAD); | ||
233 | unsigned long *ptr = gdb_regs; | ||
234 | int reg; | ||
235 | |||
236 | memset(gdb_regs, 0, NUMREGBYTES); | ||
237 | |||
238 | /* Regs GPR0-2 */ | ||
239 | for (reg = 0; reg < 3; reg++) | ||
240 | PACK64(ptr, regs->gpr[reg]); | ||
241 | |||
242 | /* Regs GPR3-13 are caller saved, not in regs->gpr[] */ | ||
243 | ptr += 11; | ||
244 | |||
245 | /* Regs GPR14-31 */ | ||
246 | for (reg = 14; reg < 32; reg++) | ||
247 | PACK64(ptr, regs->gpr[reg]); | ||
248 | |||
249 | #ifdef CONFIG_FSL_BOOKE | ||
250 | #ifdef CONFIG_SPE | ||
251 | for (reg = 0; reg < 32; reg++) | ||
252 | PACK64(ptr, p->thread.evr[reg]); | ||
253 | #else | ||
254 | ptr += 32; | ||
255 | #endif | ||
256 | #else | ||
257 | /* fp registers not used by kernel, leave zero */ | ||
258 | ptr += 32 * 8 / sizeof(long); | ||
259 | #endif | ||
260 | |||
261 | PACK64(ptr, regs->nip); | ||
262 | PACK64(ptr, regs->msr); | ||
263 | PACK32(ptr, regs->ccr); | ||
264 | PACK64(ptr, regs->link); | ||
265 | PACK64(ptr, regs->ctr); | ||
266 | PACK32(ptr, regs->xer); | ||
267 | |||
268 | BUG_ON((unsigned long)ptr > | ||
269 | (unsigned long)(((void *)gdb_regs) + NUMREGBYTES)); | ||
270 | } | ||
271 | |||
272 | #define UNPACK64(dest, ptr) do { dest = *(ptr++); } while (0) | ||
273 | |||
274 | #define UNPACK32(dest, ptr) do { \ | ||
275 | u32 *ptr32; \ | ||
276 | ptr32 = (u32 *)ptr; \ | ||
277 | dest = *(ptr32++); \ | ||
278 | ptr = (unsigned long *)ptr32; \ | ||
279 | } while (0) | ||
280 | |||
281 | void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) | ||
282 | { | ||
283 | unsigned long *ptr = gdb_regs; | ||
284 | int reg; | ||
285 | #ifdef CONFIG_SPE | ||
286 | union { | ||
287 | u32 v32[2]; | ||
288 | u64 v64; | ||
289 | } acc; | ||
290 | #endif | ||
291 | |||
292 | for (reg = 0; reg < 32; reg++) | ||
293 | UNPACK64(regs->gpr[reg], ptr); | ||
294 | |||
295 | #ifdef CONFIG_FSL_BOOKE | ||
296 | #ifdef CONFIG_SPE | ||
297 | for (reg = 0; reg < 32; reg++) | ||
298 | UNPACK64(current->thread.evr[reg], ptr); | ||
299 | #else | ||
300 | ptr += 32; | ||
301 | #endif | ||
302 | #else | ||
303 | /* fp registers not used by kernel, leave zero */ | ||
304 | ptr += 32 * 8 / sizeof(int); | ||
305 | #endif | ||
306 | |||
307 | UNPACK64(regs->nip, ptr); | ||
308 | UNPACK64(regs->msr, ptr); | ||
309 | UNPACK32(regs->ccr, ptr); | ||
310 | UNPACK64(regs->link, ptr); | ||
311 | UNPACK64(regs->ctr, ptr); | ||
312 | UNPACK32(regs->xer, ptr); | ||
313 | |||
314 | BUG_ON((unsigned long)ptr > | ||
315 | (unsigned long)(((void *)gdb_regs) + NUMREGBYTES)); | ||
316 | } | ||
317 | |||
318 | /* | ||
319 | * This function does PowerPC specific procesing for interfacing to gdb. | ||
320 | */ | ||
321 | int kgdb_arch_handle_exception(int vector, int signo, int err_code, | ||
322 | char *remcom_in_buffer, char *remcom_out_buffer, | ||
323 | struct pt_regs *linux_regs) | ||
324 | { | ||
325 | char *ptr = &remcom_in_buffer[1]; | ||
326 | unsigned long addr; | ||
327 | |||
328 | switch (remcom_in_buffer[0]) { | ||
329 | /* | ||
330 | * sAA..AA Step one instruction from AA..AA | ||
331 | * This will return an error to gdb .. | ||
332 | */ | ||
333 | case 's': | ||
334 | case 'c': | ||
335 | /* handle the optional parameter */ | ||
336 | if (kgdb_hex2long(&ptr, &addr)) | ||
337 | linux_regs->nip = addr; | ||
338 | |||
339 | atomic_set(&kgdb_cpu_doing_single_step, -1); | ||
340 | /* set the trace bit if we're stepping */ | ||
341 | if (remcom_in_buffer[0] == 's') { | ||
342 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | ||
343 | mtspr(SPRN_DBCR0, | ||
344 | mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); | ||
345 | linux_regs->msr |= MSR_DE; | ||
346 | #else | ||
347 | linux_regs->msr |= MSR_SE; | ||
348 | #endif | ||
349 | kgdb_single_step = 1; | ||
350 | if (kgdb_contthread) | ||
351 | atomic_set(&kgdb_cpu_doing_single_step, | ||
352 | raw_smp_processor_id()); | ||
353 | } | ||
354 | return 0; | ||
355 | } | ||
356 | |||
357 | return -1; | ||
358 | } | ||
359 | |||
360 | /* | ||
361 | * Global data | ||
362 | */ | ||
363 | struct kgdb_arch arch_kgdb_ops = { | ||
364 | .gdb_bpt_instr = {0x7d, 0x82, 0x10, 0x08}, | ||
365 | }; | ||
366 | |||
367 | static int kgdb_not_implemented(struct pt_regs *regs) | ||
368 | { | ||
369 | return 0; | ||
370 | } | ||
371 | |||
372 | static void *old__debugger_ipi; | ||
373 | static void *old__debugger; | ||
374 | static void *old__debugger_bpt; | ||
375 | static void *old__debugger_sstep; | ||
376 | static void *old__debugger_iabr_match; | ||
377 | static void *old__debugger_dabr_match; | ||
378 | static void *old__debugger_fault_handler; | ||
379 | |||
380 | int kgdb_arch_init(void) | ||
381 | { | ||
382 | old__debugger_ipi = __debugger_ipi; | ||
383 | old__debugger = __debugger; | ||
384 | old__debugger_bpt = __debugger_bpt; | ||
385 | old__debugger_sstep = __debugger_sstep; | ||
386 | old__debugger_iabr_match = __debugger_iabr_match; | ||
387 | old__debugger_dabr_match = __debugger_dabr_match; | ||
388 | old__debugger_fault_handler = __debugger_fault_handler; | ||
389 | |||
390 | __debugger_ipi = kgdb_call_nmi_hook; | ||
391 | __debugger = kgdb_debugger; | ||
392 | __debugger_bpt = kgdb_handle_breakpoint; | ||
393 | __debugger_sstep = kgdb_singlestep; | ||
394 | __debugger_iabr_match = kgdb_iabr_match; | ||
395 | __debugger_dabr_match = kgdb_dabr_match; | ||
396 | __debugger_fault_handler = kgdb_not_implemented; | ||
397 | |||
398 | return 0; | ||
399 | } | ||
400 | |||
401 | void kgdb_arch_exit(void) | ||
402 | { | ||
403 | __debugger_ipi = old__debugger_ipi; | ||
404 | __debugger = old__debugger; | ||
405 | __debugger_bpt = old__debugger_bpt; | ||
406 | __debugger_sstep = old__debugger_sstep; | ||
407 | __debugger_iabr_match = old__debugger_iabr_match; | ||
408 | __debugger_dabr_match = old__debugger_dabr_match; | ||
409 | __debugger_fault_handler = old__debugger_fault_handler; | ||
410 | } | ||
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 063cdd413049..224e9a11765c 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
@@ -598,6 +598,7 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose, | |||
598 | res->start = pci_addr; | 598 | res->start = pci_addr; |
599 | break; | 599 | break; |
600 | case 2: /* PCI Memory space */ | 600 | case 2: /* PCI Memory space */ |
601 | case 3: /* PCI 64 bits Memory space */ | ||
601 | printk(KERN_INFO | 602 | printk(KERN_INFO |
602 | " MEM 0x%016llx..0x%016llx -> 0x%016llx %s\n", | 603 | " MEM 0x%016llx..0x%016llx -> 0x%016llx %s\n", |
603 | cpu_addr, cpu_addr + size - 1, pci_addr, | 604 | cpu_addr, cpu_addr + size - 1, pci_addr, |
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c index 90eb3a3e383e..bc1fb27368af 100644 --- a/arch/powerpc/kernel/prom_parse.c +++ b/arch/powerpc/kernel/prom_parse.c | |||
@@ -128,12 +128,35 @@ static void of_bus_pci_count_cells(struct device_node *np, | |||
128 | *sizec = 2; | 128 | *sizec = 2; |
129 | } | 129 | } |
130 | 130 | ||
131 | static unsigned int of_bus_pci_get_flags(const u32 *addr) | ||
132 | { | ||
133 | unsigned int flags = 0; | ||
134 | u32 w = addr[0]; | ||
135 | |||
136 | switch((w >> 24) & 0x03) { | ||
137 | case 0x01: | ||
138 | flags |= IORESOURCE_IO; | ||
139 | break; | ||
140 | case 0x02: /* 32 bits */ | ||
141 | case 0x03: /* 64 bits */ | ||
142 | flags |= IORESOURCE_MEM; | ||
143 | break; | ||
144 | } | ||
145 | if (w & 0x40000000) | ||
146 | flags |= IORESOURCE_PREFETCH; | ||
147 | return flags; | ||
148 | } | ||
149 | |||
131 | static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna) | 150 | static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna) |
132 | { | 151 | { |
133 | u64 cp, s, da; | 152 | u64 cp, s, da; |
153 | unsigned int af, rf; | ||
154 | |||
155 | af = of_bus_pci_get_flags(addr); | ||
156 | rf = of_bus_pci_get_flags(range); | ||
134 | 157 | ||
135 | /* Check address type match */ | 158 | /* Check address type match */ |
136 | if ((addr[0] ^ range[0]) & 0x03000000) | 159 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) |
137 | return OF_BAD_ADDR; | 160 | return OF_BAD_ADDR; |
138 | 161 | ||
139 | /* Read address values, skipping high cell */ | 162 | /* Read address values, skipping high cell */ |
@@ -153,25 +176,6 @@ static int of_bus_pci_translate(u32 *addr, u64 offset, int na) | |||
153 | return of_bus_default_translate(addr + 1, offset, na - 1); | 176 | return of_bus_default_translate(addr + 1, offset, na - 1); |
154 | } | 177 | } |
155 | 178 | ||
156 | static unsigned int of_bus_pci_get_flags(const u32 *addr) | ||
157 | { | ||
158 | unsigned int flags = 0; | ||
159 | u32 w = addr[0]; | ||
160 | |||
161 | switch((w >> 24) & 0x03) { | ||
162 | case 0x01: | ||
163 | flags |= IORESOURCE_IO; | ||
164 | break; | ||
165 | case 0x02: /* 32 bits */ | ||
166 | case 0x03: /* 64 bits */ | ||
167 | flags |= IORESOURCE_MEM; | ||
168 | break; | ||
169 | } | ||
170 | if (w & 0x40000000) | ||
171 | flags |= IORESOURCE_PREFETCH; | ||
172 | return flags; | ||
173 | } | ||
174 | |||
175 | const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, | 179 | const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, |
176 | unsigned int *flags) | 180 | unsigned int *flags) |
177 | { | 181 | { |
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 4efebe88e64a..066e65c59b58 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
@@ -43,10 +43,6 @@ | |||
43 | 43 | ||
44 | #define DBG(fmt...) | 44 | #define DBG(fmt...) |
45 | 45 | ||
46 | #if defined CONFIG_KGDB | ||
47 | #include <asm/kgdb.h> | ||
48 | #endif | ||
49 | |||
50 | extern void bootx_init(unsigned long r4, unsigned long phys); | 46 | extern void bootx_init(unsigned long r4, unsigned long phys); |
51 | 47 | ||
52 | int boot_cpuid; | 48 | int boot_cpuid; |
@@ -302,18 +298,6 @@ void __init setup_arch(char **cmdline_p) | |||
302 | 298 | ||
303 | xmon_setup(); | 299 | xmon_setup(); |
304 | 300 | ||
305 | #if defined(CONFIG_KGDB) | ||
306 | if (ppc_md.kgdb_map_scc) | ||
307 | ppc_md.kgdb_map_scc(); | ||
308 | set_debug_traps(); | ||
309 | if (strstr(cmd_line, "gdb")) { | ||
310 | if (ppc_md.progress) | ||
311 | ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); | ||
312 | printk("kgdb breakpoint activated\n"); | ||
313 | breakpoint(); | ||
314 | } | ||
315 | #endif | ||
316 | |||
317 | /* | 301 | /* |
318 | * Set cache line size based on type of cpu as a default. | 302 | * Set cache line size based on type of cpu as a default. |
319 | * Systems with OF can look in the properties on the cpu node(s) | 303 | * Systems with OF can look in the properties on the cpu node(s) |
diff --git a/arch/powerpc/kernel/stacktrace.c b/arch/powerpc/kernel/stacktrace.c index 071bee3ec749..f2589645870a 100644 --- a/arch/powerpc/kernel/stacktrace.c +++ b/arch/powerpc/kernel/stacktrace.c | |||
@@ -59,6 +59,6 @@ EXPORT_SYMBOL_GPL(save_stack_trace); | |||
59 | 59 | ||
60 | void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) | 60 | void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) |
61 | { | 61 | { |
62 | save_context_stack(trace, tsk->thread.regs->gpr[1], tsk, 0); | 62 | save_context_stack(trace, tsk->thread.ksp, tsk, 0); |
63 | } | 63 | } |
64 | EXPORT_SYMBOL_GPL(save_stack_trace_tsk); | 64 | EXPORT_SYMBOL_GPL(save_stack_trace_tsk); |
diff --git a/arch/powerpc/kernel/suspend.c b/arch/powerpc/kernel/suspend.c index 8cee57107541..6fc6328dc626 100644 --- a/arch/powerpc/kernel/suspend.c +++ b/arch/powerpc/kernel/suspend.c | |||
@@ -7,6 +7,7 @@ | |||
7 | * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> | 7 | * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <linux/mm.h> | ||
10 | #include <asm/page.h> | 11 | #include <asm/page.h> |
11 | 12 | ||
12 | /* References to section boundaries */ | 13 | /* References to section boundaries */ |
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index c8127f832df0..aba0ba95f062 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c | |||
@@ -28,7 +28,9 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices); | |||
28 | /* Time in microseconds we delay before sleeping in the idle loop */ | 28 | /* Time in microseconds we delay before sleeping in the idle loop */ |
29 | DEFINE_PER_CPU(unsigned long, smt_snooze_delay) = { 100 }; | 29 | DEFINE_PER_CPU(unsigned long, smt_snooze_delay) = { 100 }; |
30 | 30 | ||
31 | static ssize_t store_smt_snooze_delay(struct sys_device *dev, const char *buf, | 31 | static ssize_t store_smt_snooze_delay(struct sys_device *dev, |
32 | struct sysdev_attribute *attr, | ||
33 | const char *buf, | ||
32 | size_t count) | 34 | size_t count) |
33 | { | 35 | { |
34 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); | 36 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); |
@@ -44,7 +46,9 @@ static ssize_t store_smt_snooze_delay(struct sys_device *dev, const char *buf, | |||
44 | return count; | 46 | return count; |
45 | } | 47 | } |
46 | 48 | ||
47 | static ssize_t show_smt_snooze_delay(struct sys_device *dev, char *buf) | 49 | static ssize_t show_smt_snooze_delay(struct sys_device *dev, |
50 | struct sysdev_attribute *attr, | ||
51 | char *buf) | ||
48 | { | 52 | { |
49 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); | 53 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); |
50 | 54 | ||
@@ -152,14 +156,17 @@ static unsigned long write_##NAME(unsigned long val) \ | |||
152 | mtspr(ADDRESS, val); \ | 156 | mtspr(ADDRESS, val); \ |
153 | return 0; \ | 157 | return 0; \ |
154 | } \ | 158 | } \ |
155 | static ssize_t show_##NAME(struct sys_device *dev, char *buf) \ | 159 | static ssize_t show_##NAME(struct sys_device *dev, \ |
160 | struct sysdev_attribute *attr, \ | ||
161 | char *buf) \ | ||
156 | { \ | 162 | { \ |
157 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ | 163 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ |
158 | unsigned long val = run_on_cpu(cpu->sysdev.id, read_##NAME, 0); \ | 164 | unsigned long val = run_on_cpu(cpu->sysdev.id, read_##NAME, 0); \ |
159 | return sprintf(buf, "%lx\n", val); \ | 165 | return sprintf(buf, "%lx\n", val); \ |
160 | } \ | 166 | } \ |
161 | static ssize_t __used \ | 167 | static ssize_t __used \ |
162 | store_##NAME(struct sys_device *dev, const char *buf, size_t count) \ | 168 | store_##NAME(struct sys_device *dev, struct sysdev_attribute *attr, \ |
169 | const char *buf, size_t count) \ | ||
163 | { \ | 170 | { \ |
164 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ | 171 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ |
165 | unsigned long val; \ | 172 | unsigned long val; \ |
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index 87a72c66ce27..a914411bced5 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S | |||
@@ -9,6 +9,25 @@ | |||
9 | 9 | ||
10 | ENTRY(_stext) | 10 | ENTRY(_stext) |
11 | 11 | ||
12 | PHDRS { | ||
13 | kernel PT_LOAD FLAGS(7); /* RWX */ | ||
14 | notes PT_NOTE FLAGS(0); | ||
15 | dummy PT_NOTE FLAGS(0); | ||
16 | |||
17 | /* binutils < 2.18 has a bug that makes it misbehave when taking an | ||
18 | ELF file with all segments at load address 0 as input. This | ||
19 | happens when running "strip" on vmlinux, because of the AT() magic | ||
20 | in this linker script. People using GCC >= 4.2 won't run into | ||
21 | this problem, because the "build-id" support will put some data | ||
22 | into the "notes" segment (at a non-zero load address). | ||
23 | |||
24 | To work around this, we force some data into both the "dummy" | ||
25 | segment and the kernel segment, so the dummy segment will get a | ||
26 | non-zero load address. It's not enough to always create the | ||
27 | "notes" segment, since if nothing gets assigned to it, its load | ||
28 | address will be zero. */ | ||
29 | } | ||
30 | |||
12 | #ifdef CONFIG_PPC64 | 31 | #ifdef CONFIG_PPC64 |
13 | OUTPUT_ARCH(powerpc:common64) | 32 | OUTPUT_ARCH(powerpc:common64) |
14 | jiffies = jiffies_64; | 33 | jiffies = jiffies_64; |
@@ -50,7 +69,7 @@ SECTIONS | |||
50 | . = ALIGN(PAGE_SIZE); | 69 | . = ALIGN(PAGE_SIZE); |
51 | _etext = .; | 70 | _etext = .; |
52 | PROVIDE32 (etext = .); | 71 | PROVIDE32 (etext = .); |
53 | } | 72 | } :kernel |
54 | 73 | ||
55 | /* Read-only data */ | 74 | /* Read-only data */ |
56 | RODATA | 75 | RODATA |
@@ -62,7 +81,13 @@ SECTIONS | |||
62 | __stop___ex_table = .; | 81 | __stop___ex_table = .; |
63 | } | 82 | } |
64 | 83 | ||
65 | NOTES | 84 | NOTES :kernel :notes |
85 | |||
86 | /* The dummy segment contents for the bug workaround mentioned above | ||
87 | near PHDRS. */ | ||
88 | .dummy : { | ||
89 | LONG(0xf177) | ||
90 | } :kernel :dummy | ||
66 | 91 | ||
67 | /* | 92 | /* |
68 | * Init sections discarded at runtime | 93 | * Init sections discarded at runtime |
@@ -74,7 +99,7 @@ SECTIONS | |||
74 | _sinittext = .; | 99 | _sinittext = .; |
75 | INIT_TEXT | 100 | INIT_TEXT |
76 | _einittext = .; | 101 | _einittext = .; |
77 | } | 102 | } :kernel |
78 | 103 | ||
79 | /* .exit.text is discarded at runtime, not link time, | 104 | /* .exit.text is discarded at runtime, not link time, |
80 | * to deal with references from __bug_table | 105 | * to deal with references from __bug_table |