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-rw-r--r--arch/powerpc/kernel/cputable.c45
-rw-r--r--arch/powerpc/kernel/entry_64.S8
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S4
-rw-r--r--arch/powerpc/kernel/process.c4
-rw-r--r--arch/powerpc/kernel/prom.c17
-rw-r--r--arch/powerpc/kernel/setup_64.c2
6 files changed, 38 insertions, 42 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 3d7b65ad4962..34d2722b9451 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -201,7 +201,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
201 .cpu_name = "POWER4 (gp)", 201 .cpu_name = "POWER4 (gp)",
202 .cpu_features = CPU_FTRS_POWER4, 202 .cpu_features = CPU_FTRS_POWER4,
203 .cpu_user_features = COMMON_USER_POWER4, 203 .cpu_user_features = COMMON_USER_POWER4,
204 .mmu_features = MMU_FTR_HPTE_TABLE, 204 .mmu_features = MMU_FTRS_POWER4,
205 .icache_bsize = 128, 205 .icache_bsize = 128,
206 .dcache_bsize = 128, 206 .dcache_bsize = 128,
207 .num_pmcs = 8, 207 .num_pmcs = 8,
@@ -216,7 +216,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
216 .cpu_name = "POWER4+ (gq)", 216 .cpu_name = "POWER4+ (gq)",
217 .cpu_features = CPU_FTRS_POWER4, 217 .cpu_features = CPU_FTRS_POWER4,
218 .cpu_user_features = COMMON_USER_POWER4, 218 .cpu_user_features = COMMON_USER_POWER4,
219 .mmu_features = MMU_FTR_HPTE_TABLE, 219 .mmu_features = MMU_FTRS_POWER4,
220 .icache_bsize = 128, 220 .icache_bsize = 128,
221 .dcache_bsize = 128, 221 .dcache_bsize = 128,
222 .num_pmcs = 8, 222 .num_pmcs = 8,
@@ -232,7 +232,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
232 .cpu_features = CPU_FTRS_PPC970, 232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_POWER4 | 233 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP, 234 PPC_FEATURE_HAS_ALTIVEC_COMP,
235 .mmu_features = MMU_FTR_HPTE_TABLE, 235 .mmu_features = MMU_FTRS_PPC970,
236 .icache_bsize = 128, 236 .icache_bsize = 128,
237 .dcache_bsize = 128, 237 .dcache_bsize = 128,
238 .num_pmcs = 8, 238 .num_pmcs = 8,
@@ -250,7 +250,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
250 .cpu_features = CPU_FTRS_PPC970, 250 .cpu_features = CPU_FTRS_PPC970,
251 .cpu_user_features = COMMON_USER_POWER4 | 251 .cpu_user_features = COMMON_USER_POWER4 |
252 PPC_FEATURE_HAS_ALTIVEC_COMP, 252 PPC_FEATURE_HAS_ALTIVEC_COMP,
253 .mmu_features = MMU_FTR_HPTE_TABLE, 253 .mmu_features = MMU_FTRS_PPC970,
254 .icache_bsize = 128, 254 .icache_bsize = 128,
255 .dcache_bsize = 128, 255 .dcache_bsize = 128,
256 .num_pmcs = 8, 256 .num_pmcs = 8,
@@ -286,7 +286,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
286 .cpu_features = CPU_FTRS_PPC970, 286 .cpu_features = CPU_FTRS_PPC970,
287 .cpu_user_features = COMMON_USER_POWER4 | 287 .cpu_user_features = COMMON_USER_POWER4 |
288 PPC_FEATURE_HAS_ALTIVEC_COMP, 288 PPC_FEATURE_HAS_ALTIVEC_COMP,
289 .mmu_features = MMU_FTR_HPTE_TABLE, 289 .mmu_features = MMU_FTRS_PPC970,
290 .icache_bsize = 128, 290 .icache_bsize = 128,
291 .dcache_bsize = 128, 291 .dcache_bsize = 128,
292 .num_pmcs = 8, 292 .num_pmcs = 8,
@@ -304,7 +304,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
304 .cpu_features = CPU_FTRS_PPC970, 304 .cpu_features = CPU_FTRS_PPC970,
305 .cpu_user_features = COMMON_USER_POWER4 | 305 .cpu_user_features = COMMON_USER_POWER4 |
306 PPC_FEATURE_HAS_ALTIVEC_COMP, 306 PPC_FEATURE_HAS_ALTIVEC_COMP,
307 .mmu_features = MMU_FTR_HPTE_TABLE, 307 .mmu_features = MMU_FTRS_PPC970,
308 .icache_bsize = 128, 308 .icache_bsize = 128,
309 .dcache_bsize = 128, 309 .dcache_bsize = 128,
310 .num_pmcs = 8, 310 .num_pmcs = 8,
@@ -320,7 +320,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
320 .cpu_name = "POWER5 (gr)", 320 .cpu_name = "POWER5 (gr)",
321 .cpu_features = CPU_FTRS_POWER5, 321 .cpu_features = CPU_FTRS_POWER5,
322 .cpu_user_features = COMMON_USER_POWER5, 322 .cpu_user_features = COMMON_USER_POWER5,
323 .mmu_features = MMU_FTR_HPTE_TABLE, 323 .mmu_features = MMU_FTRS_POWER5,
324 .icache_bsize = 128, 324 .icache_bsize = 128,
325 .dcache_bsize = 128, 325 .dcache_bsize = 128,
326 .num_pmcs = 6, 326 .num_pmcs = 6,
@@ -340,7 +340,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
340 .cpu_name = "POWER5+ (gs)", 340 .cpu_name = "POWER5+ (gs)",
341 .cpu_features = CPU_FTRS_POWER5, 341 .cpu_features = CPU_FTRS_POWER5,
342 .cpu_user_features = COMMON_USER_POWER5_PLUS, 342 .cpu_user_features = COMMON_USER_POWER5_PLUS,
343 .mmu_features = MMU_FTR_HPTE_TABLE, 343 .mmu_features = MMU_FTRS_POWER5,
344 .icache_bsize = 128, 344 .icache_bsize = 128,
345 .dcache_bsize = 128, 345 .dcache_bsize = 128,
346 .num_pmcs = 6, 346 .num_pmcs = 6,
@@ -356,7 +356,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
356 .cpu_name = "POWER5+ (gs)", 356 .cpu_name = "POWER5+ (gs)",
357 .cpu_features = CPU_FTRS_POWER5, 357 .cpu_features = CPU_FTRS_POWER5,
358 .cpu_user_features = COMMON_USER_POWER5_PLUS, 358 .cpu_user_features = COMMON_USER_POWER5_PLUS,
359 .mmu_features = MMU_FTR_HPTE_TABLE, 359 .mmu_features = MMU_FTRS_POWER5,
360 .icache_bsize = 128, 360 .icache_bsize = 128,
361 .dcache_bsize = 128, 361 .dcache_bsize = 128,
362 .num_pmcs = 6, 362 .num_pmcs = 6,
@@ -373,7 +373,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
373 .cpu_name = "POWER5+", 373 .cpu_name = "POWER5+",
374 .cpu_features = CPU_FTRS_POWER5, 374 .cpu_features = CPU_FTRS_POWER5,
375 .cpu_user_features = COMMON_USER_POWER5_PLUS, 375 .cpu_user_features = COMMON_USER_POWER5_PLUS,
376 .mmu_features = MMU_FTR_HPTE_TABLE, 376 .mmu_features = MMU_FTRS_POWER5,
377 .icache_bsize = 128, 377 .icache_bsize = 128,
378 .dcache_bsize = 128, 378 .dcache_bsize = 128,
379 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 379 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
@@ -387,7 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
387 .cpu_features = CPU_FTRS_POWER6, 387 .cpu_features = CPU_FTRS_POWER6,
388 .cpu_user_features = COMMON_USER_POWER6 | 388 .cpu_user_features = COMMON_USER_POWER6 |
389 PPC_FEATURE_POWER6_EXT, 389 PPC_FEATURE_POWER6_EXT,
390 .mmu_features = MMU_FTR_HPTE_TABLE, 390 .mmu_features = MMU_FTRS_POWER6,
391 .icache_bsize = 128, 391 .icache_bsize = 128,
392 .dcache_bsize = 128, 392 .dcache_bsize = 128,
393 .num_pmcs = 6, 393 .num_pmcs = 6,
@@ -406,7 +406,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
406 .cpu_name = "POWER6 (architected)", 406 .cpu_name = "POWER6 (architected)",
407 .cpu_features = CPU_FTRS_POWER6, 407 .cpu_features = CPU_FTRS_POWER6,
408 .cpu_user_features = COMMON_USER_POWER6, 408 .cpu_user_features = COMMON_USER_POWER6,
409 .mmu_features = MMU_FTR_HPTE_TABLE, 409 .mmu_features = MMU_FTRS_POWER6,
410 .icache_bsize = 128, 410 .icache_bsize = 128,
411 .dcache_bsize = 128, 411 .dcache_bsize = 128,
412 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 412 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
@@ -419,8 +419,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
419 .cpu_name = "POWER7 (architected)", 419 .cpu_name = "POWER7 (architected)",
420 .cpu_features = CPU_FTRS_POWER7, 420 .cpu_features = CPU_FTRS_POWER7,
421 .cpu_user_features = COMMON_USER_POWER7, 421 .cpu_user_features = COMMON_USER_POWER7,
422 .mmu_features = MMU_FTR_HPTE_TABLE | 422 .mmu_features = MMU_FTRS_POWER7,
423 MMU_FTR_TLBIE_206,
424 .icache_bsize = 128, 423 .icache_bsize = 128,
425 .dcache_bsize = 128, 424 .dcache_bsize = 128,
426 .oprofile_type = PPC_OPROFILE_POWER4, 425 .oprofile_type = PPC_OPROFILE_POWER4,
@@ -435,8 +434,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
435 .cpu_name = "POWER7 (raw)", 434 .cpu_name = "POWER7 (raw)",
436 .cpu_features = CPU_FTRS_POWER7, 435 .cpu_features = CPU_FTRS_POWER7,
437 .cpu_user_features = COMMON_USER_POWER7, 436 .cpu_user_features = COMMON_USER_POWER7,
438 .mmu_features = MMU_FTR_HPTE_TABLE | 437 .mmu_features = MMU_FTRS_POWER7,
439 MMU_FTR_TLBIE_206,
440 .icache_bsize = 128, 438 .icache_bsize = 128,
441 .dcache_bsize = 128, 439 .dcache_bsize = 128,
442 .num_pmcs = 6, 440 .num_pmcs = 6,
@@ -453,8 +451,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
453 .cpu_name = "POWER7+ (raw)", 451 .cpu_name = "POWER7+ (raw)",
454 .cpu_features = CPU_FTRS_POWER7, 452 .cpu_features = CPU_FTRS_POWER7,
455 .cpu_user_features = COMMON_USER_POWER7, 453 .cpu_user_features = COMMON_USER_POWER7,
456 .mmu_features = MMU_FTR_HPTE_TABLE | 454 .mmu_features = MMU_FTRS_POWER7,
457 MMU_FTR_TLBIE_206,
458 .icache_bsize = 128, 455 .icache_bsize = 128,
459 .dcache_bsize = 128, 456 .dcache_bsize = 128,
460 .num_pmcs = 6, 457 .num_pmcs = 6,
@@ -473,7 +470,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
473 .cpu_user_features = COMMON_USER_PPC64 | 470 .cpu_user_features = COMMON_USER_PPC64 |
474 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 471 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
475 PPC_FEATURE_SMT, 472 PPC_FEATURE_SMT,
476 .mmu_features = MMU_FTR_HPTE_TABLE, 473 .mmu_features = MMU_FTRS_CELL,
477 .icache_bsize = 128, 474 .icache_bsize = 128,
478 .dcache_bsize = 128, 475 .dcache_bsize = 128,
479 .num_pmcs = 4, 476 .num_pmcs = 4,
@@ -488,7 +485,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
488 .cpu_name = "PA6T", 485 .cpu_name = "PA6T",
489 .cpu_features = CPU_FTRS_PA6T, 486 .cpu_features = CPU_FTRS_PA6T,
490 .cpu_user_features = COMMON_USER_PA6T, 487 .cpu_user_features = COMMON_USER_PA6T,
491 .mmu_features = MMU_FTR_HPTE_TABLE, 488 .mmu_features = MMU_FTRS_PA6T,
492 .icache_bsize = 64, 489 .icache_bsize = 64,
493 .dcache_bsize = 64, 490 .dcache_bsize = 64,
494 .num_pmcs = 6, 491 .num_pmcs = 6,
@@ -505,7 +502,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
505 .cpu_name = "POWER4 (compatible)", 502 .cpu_name = "POWER4 (compatible)",
506 .cpu_features = CPU_FTRS_COMPATIBLE, 503 .cpu_features = CPU_FTRS_COMPATIBLE,
507 .cpu_user_features = COMMON_USER_PPC64, 504 .cpu_user_features = COMMON_USER_PPC64,
508 .mmu_features = MMU_FTR_HPTE_TABLE, 505 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
509 .icache_bsize = 128, 506 .icache_bsize = 128,
510 .dcache_bsize = 128, 507 .dcache_bsize = 128,
511 .num_pmcs = 6, 508 .num_pmcs = 6,
@@ -2020,11 +2017,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
2020 .cpu_name = "A2 (>= DD2)", 2017 .cpu_name = "A2 (>= DD2)",
2021 .cpu_features = CPU_FTRS_A2, 2018 .cpu_features = CPU_FTRS_A2,
2022 .cpu_user_features = COMMON_USER_PPC64, 2019 .cpu_user_features = COMMON_USER_PPC64,
2023 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | 2020 .mmu_features = MMU_FTRS_A2,
2024 MMU_FTR_USE_TLBIVAX_BCAST |
2025 MMU_FTR_LOCK_BCAST_INVAL |
2026 MMU_FTR_USE_TLBRSRV |
2027 MMU_FTR_USE_PAIRED_MAS,
2028 .icache_bsize = 64, 2021 .icache_bsize = 64,
2029 .dcache_bsize = 64, 2022 .dcache_bsize = 64,
2030 .num_pmcs = 0, 2023 .num_pmcs = 0,
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 64693706ebfd..d834425186ae 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -468,10 +468,10 @@ BEGIN_FTR_SECTION
468 FTR_SECTION_ELSE_NESTED(95) 468 FTR_SECTION_ELSE_NESTED(95)
469 clrrdi r6,r8,40 /* get its 1T ESID */ 469 clrrdi r6,r8,40 /* get its 1T ESID */
470 clrrdi r9,r1,40 /* get current sp 1T ESID */ 470 clrrdi r9,r1,40 /* get current sp 1T ESID */
471 ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95) 471 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_1T_SEGMENT, 95)
472FTR_SECTION_ELSE 472FTR_SECTION_ELSE
473 b 2f 473 b 2f
474ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB) 474ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_SLB)
475 clrldi. r0,r6,2 /* is new ESID c00000000? */ 475 clrldi. r0,r6,2 /* is new ESID c00000000? */
476 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */ 476 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
477 cror eq,4*cr1+eq,eq 477 cror eq,4*cr1+eq,eq
@@ -485,7 +485,7 @@ BEGIN_FTR_SECTION
485 li r9,MMU_SEGSIZE_1T /* insert B field */ 485 li r9,MMU_SEGSIZE_1T /* insert B field */
486 oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h 486 oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
487 rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0 487 rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0
488END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT) 488END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
489 489
490 /* Update the last bolted SLB. No write barriers are needed 490 /* Update the last bolted SLB. No write barriers are needed
491 * here, provided we only update the current CPU's SLB shadow 491 * here, provided we only update the current CPU's SLB shadow
@@ -497,7 +497,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
497 std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */ 497 std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
498 std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */ 498 std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
499 499
500 /* No need to check for CPU_FTR_NO_SLBIE_B here, since when 500 /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
501 * we have 1TB segments, the only CPUs known to have the errata 501 * we have 1TB segments, the only CPUs known to have the errata
502 * only support less than 1TB of system memory and we'll never 502 * only support less than 1TB of system memory and we'll never
503 * actually hit this code path. 503 * actually hit this code path.
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index ad06333631ac..226cc8c62224 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -102,7 +102,7 @@ BEGIN_FTR_SECTION
102 EXCEPTION_PROLOG_PSERIES_1(data_access_common, EXC_STD) 102 EXCEPTION_PROLOG_PSERIES_1(data_access_common, EXC_STD)
103FTR_SECTION_ELSE 103FTR_SECTION_ELSE
104 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD) 104 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD)
105ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB) 105ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_SLB)
106 106
107 . = 0x380 107 . = 0x380
108 .globl data_access_slb_pSeries 108 .globl data_access_slb_pSeries
@@ -840,7 +840,7 @@ _STATIC(do_hash_page)
840BEGIN_FTR_SECTION 840BEGIN_FTR_SECTION
841 andis. r0,r4,0x0020 /* Is it a segment table fault? */ 841 andis. r0,r4,0x0020 /* Is it a segment table fault? */
842 bne- do_ste_alloc /* If so handle it */ 842 bne- do_ste_alloc /* If so handle it */
843END_FTR_SECTION_IFCLR(CPU_FTR_SLB) 843END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
844 844
845 clrrdi r11,r1,THREAD_SHIFT 845 clrrdi r11,r1,THREAD_SHIFT
846 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ 846 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index a01c2d93fd2f..095043d79946 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -757,11 +757,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
757 _ALIGN_UP(sizeof(struct thread_info), 16); 757 _ALIGN_UP(sizeof(struct thread_info), 16);
758 758
759#ifdef CONFIG_PPC_STD_MMU_64 759#ifdef CONFIG_PPC_STD_MMU_64
760 if (cpu_has_feature(CPU_FTR_SLB)) { 760 if (mmu_has_feature(MMU_FTR_SLB)) {
761 unsigned long sp_vsid; 761 unsigned long sp_vsid;
762 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 762 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
763 763
764 if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) 764 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
765 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 765 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
766 << SLB_VSID_SHIFT_1T; 766 << SLB_VSID_SHIFT_1T;
767 else 767 else
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index c391dc4c8bad..5f5e6aed2b70 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -123,18 +123,19 @@ static void __init move_device_tree(void)
123 */ 123 */
124static struct ibm_pa_feature { 124static struct ibm_pa_feature {
125 unsigned long cpu_features; /* CPU_FTR_xxx bit */ 125 unsigned long cpu_features; /* CPU_FTR_xxx bit */
126 unsigned long mmu_features; /* MMU_FTR_xxx bit */
126 unsigned int cpu_user_ftrs; /* PPC_FEATURE_xxx bit */ 127 unsigned int cpu_user_ftrs; /* PPC_FEATURE_xxx bit */
127 unsigned char pabyte; /* byte number in ibm,pa-features */ 128 unsigned char pabyte; /* byte number in ibm,pa-features */
128 unsigned char pabit; /* bit number (big-endian) */ 129 unsigned char pabit; /* bit number (big-endian) */
129 unsigned char invert; /* if 1, pa bit set => clear feature */ 130 unsigned char invert; /* if 1, pa bit set => clear feature */
130} ibm_pa_features[] __initdata = { 131} ibm_pa_features[] __initdata = {
131 {0, PPC_FEATURE_HAS_MMU, 0, 0, 0}, 132 {0, 0, PPC_FEATURE_HAS_MMU, 0, 0, 0},
132 {0, PPC_FEATURE_HAS_FPU, 0, 1, 0}, 133 {0, 0, PPC_FEATURE_HAS_FPU, 0, 1, 0},
133 {CPU_FTR_SLB, 0, 0, 2, 0}, 134 {0, MMU_FTR_SLB, 0, 0, 2, 0},
134 {CPU_FTR_CTRL, 0, 0, 3, 0}, 135 {CPU_FTR_CTRL, 0, 0, 0, 3, 0},
135 {CPU_FTR_NOEXECUTE, 0, 0, 6, 0}, 136 {CPU_FTR_NOEXECUTE, 0, 0, 0, 6, 0},
136 {CPU_FTR_NODSISRALIGN, 0, 1, 1, 1}, 137 {CPU_FTR_NODSISRALIGN, 0, 0, 1, 1, 1},
137 {CPU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0}, 138 {0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0},
138 {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0}, 139 {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
139}; 140};
140 141
@@ -166,9 +167,11 @@ static void __init scan_features(unsigned long node, unsigned char *ftrs,
166 if (bit ^ fp->invert) { 167 if (bit ^ fp->invert) {
167 cur_cpu_spec->cpu_features |= fp->cpu_features; 168 cur_cpu_spec->cpu_features |= fp->cpu_features;
168 cur_cpu_spec->cpu_user_features |= fp->cpu_user_ftrs; 169 cur_cpu_spec->cpu_user_features |= fp->cpu_user_ftrs;
170 cur_cpu_spec->mmu_features |= fp->mmu_features;
169 } else { 171 } else {
170 cur_cpu_spec->cpu_features &= ~fp->cpu_features; 172 cur_cpu_spec->cpu_features &= ~fp->cpu_features;
171 cur_cpu_spec->cpu_user_features &= ~fp->cpu_user_ftrs; 173 cur_cpu_spec->cpu_user_features &= ~fp->cpu_user_ftrs;
174 cur_cpu_spec->mmu_features &= ~fp->mmu_features;
172 } 175 }
173 } 176 }
174} 177}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 91a5cc5f0d02..959c63cf62e4 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -436,7 +436,7 @@ void __init setup_system(void)
436 436
437static u64 slb0_limit(void) 437static u64 slb0_limit(void)
438{ 438{
439 if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) { 439 if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) {
440 return 1UL << SID_SHIFT_1T; 440 return 1UL << SID_SHIFT_1T;
441 } 441 }
442 return 1UL << SID_SHIFT; 442 return 1UL << SID_SHIFT;