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-rw-r--r--arch/powerpc/kernel/tm.S13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 508c54b92fa6..ee061c3715de 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -42,7 +42,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
42/* Stack frame offsets for local variables. */ 42/* Stack frame offsets for local variables. */
43#define TM_FRAME_L0 TM_FRAME_SIZE-16 43#define TM_FRAME_L0 TM_FRAME_SIZE-16
44#define TM_FRAME_L1 TM_FRAME_SIZE-8 44#define TM_FRAME_L1 TM_FRAME_SIZE-8
45#define STACK_PARAM(x) (48+((x)*8))
46 45
47 46
48/* In order to access the TM SPRs, TM must be enabled. So, do so: */ 47/* In order to access the TM SPRs, TM must be enabled. So, do so: */
@@ -109,12 +108,12 @@ _GLOBAL(tm_reclaim)
109 mflr r0 108 mflr r0
110 stw r6, 8(r1) 109 stw r6, 8(r1)
111 std r0, 16(r1) 110 std r0, 16(r1)
112 std r2, 40(r1) 111 std r2, STK_GOT(r1)
113 stdu r1, -TM_FRAME_SIZE(r1) 112 stdu r1, -TM_FRAME_SIZE(r1)
114 113
115 /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD]. */ 114 /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD]. */
116 115
117 std r3, STACK_PARAM(0)(r1) 116 std r3, STK_PARAM(R3)(r1)
118 SAVE_NVGPRS(r1) 117 SAVE_NVGPRS(r1)
119 118
120 /* We need to setup MSR for VSX register save instructions. Here we 119 /* We need to setup MSR for VSX register save instructions. Here we
@@ -210,7 +209,7 @@ dont_backup_fp:
210 /* Now get some more GPRS free */ 209 /* Now get some more GPRS free */
211 std r7, GPR7(r1) /* Temporary stash */ 210 std r7, GPR7(r1) /* Temporary stash */
212 std r12, GPR12(r1) /* '' '' '' */ 211 std r12, GPR12(r1) /* '' '' '' */
213 ld r12, STACK_PARAM(0)(r1) /* Param 0, thread_struct * */ 212 ld r12, STK_PARAM(R3)(r1) /* Param 0, thread_struct * */
214 213
215 std r11, THREAD_TM_PPR(r12) /* Store PPR and free r11 */ 214 std r11, THREAD_TM_PPR(r12) /* Store PPR and free r11 */
216 215
@@ -297,7 +296,7 @@ dont_backup_fp:
297 ld r0, 16(r1) 296 ld r0, 16(r1)
298 mtcr r4 297 mtcr r4
299 mtlr r0 298 mtlr r0
300 ld r2, 40(r1) 299 ld r2, STK_GOT(r1)
301 300
302 /* Load system default DSCR */ 301 /* Load system default DSCR */
303 ld r4, DSCR_DEFAULT@toc(r2) 302 ld r4, DSCR_DEFAULT@toc(r2)
@@ -320,7 +319,7 @@ _GLOBAL(__tm_recheckpoint)
320 mflr r0 319 mflr r0
321 stw r5, 8(r1) 320 stw r5, 8(r1)
322 std r0, 16(r1) 321 std r0, 16(r1)
323 std r2, 40(r1) 322 std r2, STK_GOT(r1)
324 stdu r1, -TM_FRAME_SIZE(r1) 323 stdu r1, -TM_FRAME_SIZE(r1)
325 324
326 /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD]. 325 /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD].
@@ -478,7 +477,7 @@ restore_gprs:
478 ld r0, 16(r1) 477 ld r0, 16(r1)
479 mtcr r4 478 mtcr r4
480 mtlr r0 479 mtlr r0
481 ld r2, 40(r1) 480 ld r2, STK_GOT(r1)
482 481
483 /* Load system default DSCR */ 482 /* Load system default DSCR */
484 ld r4, DSCR_DEFAULT@toc(r2) 483 ld r4, DSCR_DEFAULT@toc(r2)