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-rw-r--r--arch/powerpc/kernel/tm.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 84dbace657ce..2da67e7a16d5 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -309,6 +309,7 @@ _GLOBAL(tm_recheckpoint)
309 or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */ 309 or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */
310 mtmsr r5 310 mtmsr r5
311 311
312#ifdef CONFIG_ALTIVEC
312 /* FP and VEC registers: These are recheckpointed from thread.fpr[] 313 /* FP and VEC registers: These are recheckpointed from thread.fpr[]
313 * and thread.vr[] respectively. The thread.transact_fpr[] version 314 * and thread.vr[] respectively. The thread.transact_fpr[] version
314 * is more modern, and will be loaded subsequently by any FPUnavailable 315 * is more modern, and will be loaded subsequently by any FPUnavailable
@@ -323,6 +324,7 @@ _GLOBAL(tm_recheckpoint)
323 REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */ 324 REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */
324 ld r5, THREAD_VRSAVE(r3) 325 ld r5, THREAD_VRSAVE(r3)
325 mtspr SPRN_VRSAVE, r5 326 mtspr SPRN_VRSAVE, r5
327#endif
326 328
327dont_restore_vec: 329dont_restore_vec:
328 andi. r0, r4, MSR_FP 330 andi. r0, r4, MSR_FP