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Diffstat (limited to 'arch/powerpc/kernel/ptrace-common.h')
-rw-r--r-- | arch/powerpc/kernel/ptrace-common.h | 161 |
1 files changed, 0 insertions, 161 deletions
diff --git a/arch/powerpc/kernel/ptrace-common.h b/arch/powerpc/kernel/ptrace-common.h deleted file mode 100644 index 8797ae737a7b..000000000000 --- a/arch/powerpc/kernel/ptrace-common.h +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2002 Stephen Rothwell, IBM Coproration | ||
3 | * Extracted from ptrace.c and ptrace32.c | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General | ||
6 | * Public License. See the file README.legal in the main directory of | ||
7 | * this archive for more details. | ||
8 | */ | ||
9 | |||
10 | #ifndef _PPC64_PTRACE_COMMON_H | ||
11 | #define _PPC64_PTRACE_COMMON_H | ||
12 | |||
13 | #include <asm/system.h> | ||
14 | |||
15 | /* | ||
16 | * Set of msr bits that gdb can change on behalf of a process. | ||
17 | */ | ||
18 | #define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1) | ||
19 | |||
20 | /* | ||
21 | * Get contents of register REGNO in task TASK. | ||
22 | */ | ||
23 | static inline unsigned long get_reg(struct task_struct *task, int regno) | ||
24 | { | ||
25 | unsigned long tmp = 0; | ||
26 | |||
27 | /* | ||
28 | * Put the correct FP bits in, they might be wrong as a result | ||
29 | * of our lazy FP restore. | ||
30 | */ | ||
31 | if (regno == PT_MSR) { | ||
32 | tmp = ((unsigned long *)task->thread.regs)[PT_MSR]; | ||
33 | tmp |= task->thread.fpexc_mode; | ||
34 | } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) { | ||
35 | tmp = ((unsigned long *)task->thread.regs)[regno]; | ||
36 | } | ||
37 | |||
38 | return tmp; | ||
39 | } | ||
40 | |||
41 | /* | ||
42 | * Write contents of register REGNO in task TASK. | ||
43 | */ | ||
44 | static inline int put_reg(struct task_struct *task, int regno, | ||
45 | unsigned long data) | ||
46 | { | ||
47 | if (regno < PT_SOFTE) { | ||
48 | if (regno == PT_MSR) | ||
49 | data = (data & MSR_DEBUGCHANGE) | ||
50 | | (task->thread.regs->msr & ~MSR_DEBUGCHANGE); | ||
51 | ((unsigned long *)task->thread.regs)[regno] = data; | ||
52 | return 0; | ||
53 | } | ||
54 | return -EIO; | ||
55 | } | ||
56 | |||
57 | static inline void set_single_step(struct task_struct *task) | ||
58 | { | ||
59 | struct pt_regs *regs = task->thread.regs; | ||
60 | if (regs != NULL) | ||
61 | regs->msr |= MSR_SE; | ||
62 | set_tsk_thread_flag(task, TIF_SINGLESTEP); | ||
63 | } | ||
64 | |||
65 | static inline void clear_single_step(struct task_struct *task) | ||
66 | { | ||
67 | struct pt_regs *regs = task->thread.regs; | ||
68 | if (regs != NULL) | ||
69 | regs->msr &= ~MSR_SE; | ||
70 | clear_tsk_thread_flag(task, TIF_SINGLESTEP); | ||
71 | } | ||
72 | |||
73 | #ifdef CONFIG_ALTIVEC | ||
74 | /* | ||
75 | * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. | ||
76 | * The transfer totals 34 quadword. Quadwords 0-31 contain the | ||
77 | * corresponding vector registers. Quadword 32 contains the vscr as the | ||
78 | * last word (offset 12) within that quadword. Quadword 33 contains the | ||
79 | * vrsave as the first word (offset 0) within the quadword. | ||
80 | * | ||
81 | * This definition of the VMX state is compatible with the current PPC32 | ||
82 | * ptrace interface. This allows signal handling and ptrace to use the | ||
83 | * same structures. This also simplifies the implementation of a bi-arch | ||
84 | * (combined (32- and 64-bit) gdb. | ||
85 | */ | ||
86 | |||
87 | /* | ||
88 | * Get contents of AltiVec register state in task TASK | ||
89 | */ | ||
90 | static inline int get_vrregs(unsigned long __user *data, | ||
91 | struct task_struct *task) | ||
92 | { | ||
93 | unsigned long regsize; | ||
94 | |||
95 | /* copy AltiVec registers VR[0] .. VR[31] */ | ||
96 | regsize = 32 * sizeof(vector128); | ||
97 | if (copy_to_user(data, task->thread.vr, regsize)) | ||
98 | return -EFAULT; | ||
99 | data += (regsize / sizeof(unsigned long)); | ||
100 | |||
101 | /* copy VSCR */ | ||
102 | regsize = 1 * sizeof(vector128); | ||
103 | if (copy_to_user(data, &task->thread.vscr, regsize)) | ||
104 | return -EFAULT; | ||
105 | data += (regsize / sizeof(unsigned long)); | ||
106 | |||
107 | /* copy VRSAVE */ | ||
108 | if (put_user(task->thread.vrsave, (u32 __user *)data)) | ||
109 | return -EFAULT; | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | /* | ||
115 | * Write contents of AltiVec register state into task TASK. | ||
116 | */ | ||
117 | static inline int set_vrregs(struct task_struct *task, | ||
118 | unsigned long __user *data) | ||
119 | { | ||
120 | unsigned long regsize; | ||
121 | |||
122 | /* copy AltiVec registers VR[0] .. VR[31] */ | ||
123 | regsize = 32 * sizeof(vector128); | ||
124 | if (copy_from_user(task->thread.vr, data, regsize)) | ||
125 | return -EFAULT; | ||
126 | data += (regsize / sizeof(unsigned long)); | ||
127 | |||
128 | /* copy VSCR */ | ||
129 | regsize = 1 * sizeof(vector128); | ||
130 | if (copy_from_user(&task->thread.vscr, data, regsize)) | ||
131 | return -EFAULT; | ||
132 | data += (regsize / sizeof(unsigned long)); | ||
133 | |||
134 | /* copy VRSAVE */ | ||
135 | if (get_user(task->thread.vrsave, (u32 __user *)data)) | ||
136 | return -EFAULT; | ||
137 | |||
138 | return 0; | ||
139 | } | ||
140 | #endif | ||
141 | |||
142 | static inline int ptrace_set_debugreg(struct task_struct *task, | ||
143 | unsigned long addr, unsigned long data) | ||
144 | { | ||
145 | /* We only support one DABR and no IABRS at the moment */ | ||
146 | if (addr > 0) | ||
147 | return -EINVAL; | ||
148 | |||
149 | /* The bottom 3 bits are flags */ | ||
150 | if ((data & ~0x7UL) >= TASK_SIZE) | ||
151 | return -EIO; | ||
152 | |||
153 | /* Ensure translation is on */ | ||
154 | if (data && !(data & DABR_TRANSLATION)) | ||
155 | return -EIO; | ||
156 | |||
157 | task->thread.dabr = data; | ||
158 | return 0; | ||
159 | } | ||
160 | |||
161 | #endif /* _PPC64_PTRACE_COMMON_H */ | ||