1 files changed, 31 insertions, 27 deletions

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index dd72bebd708a..668aa4791fd7 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -347,45 +347,45 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
 #endif
         }
 
-        if (found >= 0) {
-                DBG("boot cpu: logical %d physical %d\n", found,
-                        be32_to_cpu(intserv[found_thread]));
-                boot_cpuid = found;
-                set_hard_smp_processor_id(found,
-                        be32_to_cpu(intserv[found_thread]));
+        /* Not the boot CPU */
+        if (found < 0)
+                return 0;
 
-                /*
-                 * PAPR defines "logical" PVR values for cpus that
-                 * meet various levels of the architecture:
-                 * 0x0f000001   Architecture version 2.04
-                 * 0x0f000002   Architecture version 2.05
-                 * If the cpu-version property in the cpu node contains
-                 * such a value, we call identify_cpu again with the
-                 * logical PVR value in order to use the cpu feature
-                 * bits appropriate for the architecture level.
-                 *
-                 * A POWER6 partition in "POWER6 architected" mode
-                 * uses the 0x0f000002 PVR value; in POWER5+ mode
-                 * it uses 0x0f000001.
-                 */
-                prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
-                if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000)
-                        identify_cpu(0, be32_to_cpup(prop));
+        DBG("boot cpu: logical %d physical %d\n", found,
+            be32_to_cpu(intserv[found_thread]));
+        boot_cpuid = found;
+        set_hard_smp_processor_id(found, be32_to_cpu(intserv[found_thread]));
 
-                identical_pvr_fixup(node);
-        }
+        /*
+         * PAPR defines "logical" PVR values for cpus that
+         * meet various levels of the architecture:
+         * 0x0f000001   Architecture version 2.04
+         * 0x0f000002   Architecture version 2.05
+         * If the cpu-version property in the cpu node contains
+         * such a value, we call identify_cpu again with the
+         * logical PVR value in order to use the cpu feature
+         * bits appropriate for the architecture level.
+         *
+         * A POWER6 partition in "POWER6 architected" mode
+         * uses the 0x0f000002 PVR value; in POWER5+ mode
+         * it uses 0x0f000001.
+         */
+        prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
+        if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000)
+                identify_cpu(0, be32_to_cpup(prop));
+
+        identical_pvr_fixup(node);
 
         check_cpu_feature_properties(node);
         check_cpu_pa_features(node);
         check_cpu_slb_size(node);
 
-#ifdef CONFIG_PPC_PSERIES
+#ifdef CONFIG_PPC64
         if (nthreads > 1)
                 cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
         else
                 cur_cpu_spec->cpu_features &= ~CPU_FTR_SMT;
 #endif
-
         return 0;
 }
 
@@ -747,6 +747,10 @@ void __init early_init_devtree(void *params)
          * (altivec support, boot CPU ID, ...)
          */
         of_scan_flat_dt(early_init_dt_scan_cpus, NULL);
+        if (boot_cpuid < 0) {
+                printk("Failed to indentify boot CPU !\n");
+                BUG();
+        }
 
 #if defined(CONFIG_SMP) && defined(CONFIG_PPC64)
         /* We'll later wait for secondaries to check in; there are