diff options
Diffstat (limited to 'arch/powerpc/kernel/ppc970-pmu.c')
-rw-r--r-- | arch/powerpc/kernel/ppc970-pmu.c | 63 |
1 files changed, 40 insertions, 23 deletions
diff --git a/arch/powerpc/kernel/ppc970-pmu.c b/arch/powerpc/kernel/ppc970-pmu.c index ba0a357a89f4..75dccb71a043 100644 --- a/arch/powerpc/kernel/ppc970-pmu.c +++ b/arch/powerpc/kernel/ppc970-pmu.c | |||
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/string.h> | 11 | #include <linux/string.h> |
12 | #include <linux/perf_counter.h> | 12 | #include <linux/perf_counter.h> |
13 | #include <asm/reg.h> | 13 | #include <asm/reg.h> |
14 | #include <asm/cputable.h> | ||
14 | 15 | ||
15 | /* | 16 | /* |
16 | * Bits in event code for PPC970 | 17 | * Bits in event code for PPC970 |
@@ -183,7 +184,7 @@ static int p970_marked_instr_event(u64 event) | |||
183 | } | 184 | } |
184 | 185 | ||
185 | /* Masks and values for using events from the various units */ | 186 | /* Masks and values for using events from the various units */ |
186 | static u64 unit_cons[PM_LASTUNIT+1][2] = { | 187 | static unsigned long unit_cons[PM_LASTUNIT+1][2] = { |
187 | [PM_FPU] = { 0xc80000000000ull, 0x040000000000ull }, | 188 | [PM_FPU] = { 0xc80000000000ull, 0x040000000000ull }, |
188 | [PM_VPU] = { 0xc80000000000ull, 0xc40000000000ull }, | 189 | [PM_VPU] = { 0xc80000000000ull, 0xc40000000000ull }, |
189 | [PM_ISU] = { 0x080000000000ull, 0x020000000000ull }, | 190 | [PM_ISU] = { 0x080000000000ull, 0x020000000000ull }, |
@@ -192,10 +193,11 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = { | |||
192 | [PM_STS] = { 0x380000000000ull, 0x310000000000ull }, | 193 | [PM_STS] = { 0x380000000000ull, 0x310000000000ull }, |
193 | }; | 194 | }; |
194 | 195 | ||
195 | static int p970_get_constraint(u64 event, u64 *maskp, u64 *valp) | 196 | static int p970_get_constraint(u64 event, unsigned long *maskp, |
197 | unsigned long *valp) | ||
196 | { | 198 | { |
197 | int pmc, byte, unit, sh, spcsel; | 199 | int pmc, byte, unit, sh, spcsel; |
198 | u64 mask = 0, value = 0; | 200 | unsigned long mask = 0, value = 0; |
199 | int grp = -1; | 201 | int grp = -1; |
200 | 202 | ||
201 | pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; | 203 | pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; |
@@ -222,7 +224,7 @@ static int p970_get_constraint(u64 event, u64 *maskp, u64 *valp) | |||
222 | grp = byte & 1; | 224 | grp = byte & 1; |
223 | /* Set byte lane select field */ | 225 | /* Set byte lane select field */ |
224 | mask |= 0xfULL << (28 - 4 * byte); | 226 | mask |= 0xfULL << (28 - 4 * byte); |
225 | value |= (u64)unit << (28 - 4 * byte); | 227 | value |= (unsigned long)unit << (28 - 4 * byte); |
226 | } | 228 | } |
227 | if (grp == 0) { | 229 | if (grp == 0) { |
228 | /* increment PMC1/2/5/6 field */ | 230 | /* increment PMC1/2/5/6 field */ |
@@ -236,7 +238,7 @@ static int p970_get_constraint(u64 event, u64 *maskp, u64 *valp) | |||
236 | spcsel = (event >> PM_SPCSEL_SH) & PM_SPCSEL_MSK; | 238 | spcsel = (event >> PM_SPCSEL_SH) & PM_SPCSEL_MSK; |
237 | if (spcsel) { | 239 | if (spcsel) { |
238 | mask |= 3ull << 48; | 240 | mask |= 3ull << 48; |
239 | value |= (u64)spcsel << 48; | 241 | value |= (unsigned long)spcsel << 48; |
240 | } | 242 | } |
241 | *maskp = mask; | 243 | *maskp = mask; |
242 | *valp = value; | 244 | *valp = value; |
@@ -257,9 +259,9 @@ static int p970_get_alternatives(u64 event, unsigned int flags, u64 alt[]) | |||
257 | } | 259 | } |
258 | 260 | ||
259 | static int p970_compute_mmcr(u64 event[], int n_ev, | 261 | static int p970_compute_mmcr(u64 event[], int n_ev, |
260 | unsigned int hwc[], u64 mmcr[]) | 262 | unsigned int hwc[], unsigned long mmcr[]) |
261 | { | 263 | { |
262 | u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0; | 264 | unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0; |
263 | unsigned int pmc, unit, byte, psel; | 265 | unsigned int pmc, unit, byte, psel; |
264 | unsigned int ttm, grp; | 266 | unsigned int ttm, grp; |
265 | unsigned int pmc_inuse = 0; | 267 | unsigned int pmc_inuse = 0; |
@@ -320,7 +322,7 @@ static int p970_compute_mmcr(u64 event[], int n_ev, | |||
320 | continue; | 322 | continue; |
321 | ttm = unitmap[i]; | 323 | ttm = unitmap[i]; |
322 | ++ttmuse[(ttm >> 2) & 1]; | 324 | ++ttmuse[(ttm >> 2) & 1]; |
323 | mmcr1 |= (u64)(ttm & ~4) << MMCR1_TTM1SEL_SH; | 325 | mmcr1 |= (unsigned long)(ttm & ~4) << MMCR1_TTM1SEL_SH; |
324 | } | 326 | } |
325 | /* Check only one unit per TTMx */ | 327 | /* Check only one unit per TTMx */ |
326 | if (ttmuse[0] > 1 || ttmuse[1] > 1) | 328 | if (ttmuse[0] > 1 || ttmuse[1] > 1) |
@@ -340,7 +342,8 @@ static int p970_compute_mmcr(u64 event[], int n_ev, | |||
340 | if (unit == PM_LSU1L && byte >= 2) | 342 | if (unit == PM_LSU1L && byte >= 2) |
341 | mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte); | 343 | mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte); |
342 | } | 344 | } |
343 | mmcr1 |= (u64)ttm << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); | 345 | mmcr1 |= (unsigned long)ttm |
346 | << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte); | ||
344 | } | 347 | } |
345 | 348 | ||
346 | /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */ | 349 | /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */ |
@@ -386,7 +389,8 @@ static int p970_compute_mmcr(u64 event[], int n_ev, | |||
386 | for (pmc = 0; pmc < 2; ++pmc) | 389 | for (pmc = 0; pmc < 2; ++pmc) |
387 | mmcr0 |= pmcsel[pmc] << (MMCR0_PMC1SEL_SH - 7 * pmc); | 390 | mmcr0 |= pmcsel[pmc] << (MMCR0_PMC1SEL_SH - 7 * pmc); |
388 | for (; pmc < 8; ++pmc) | 391 | for (; pmc < 8; ++pmc) |
389 | mmcr1 |= (u64)pmcsel[pmc] << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)); | 392 | mmcr1 |= (unsigned long)pmcsel[pmc] |
393 | << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)); | ||
390 | if (pmc_inuse & 1) | 394 | if (pmc_inuse & 1) |
391 | mmcr0 |= MMCR0_PMC1CE; | 395 | mmcr0 |= MMCR0_PMC1CE; |
392 | if (pmc_inuse & 0xfe) | 396 | if (pmc_inuse & 0xfe) |
@@ -401,7 +405,7 @@ static int p970_compute_mmcr(u64 event[], int n_ev, | |||
401 | return 0; | 405 | return 0; |
402 | } | 406 | } |
403 | 407 | ||
404 | static void p970_disable_pmc(unsigned int pmc, u64 mmcr[]) | 408 | static void p970_disable_pmc(unsigned int pmc, unsigned long mmcr[]) |
405 | { | 409 | { |
406 | int shift, i; | 410 | int shift, i; |
407 | 411 | ||
@@ -467,16 +471,29 @@ static int ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | |||
467 | }, | 471 | }, |
468 | }; | 472 | }; |
469 | 473 | ||
470 | struct power_pmu ppc970_pmu = { | 474 | static struct power_pmu ppc970_pmu = { |
471 | .n_counter = 8, | 475 | .name = "PPC970/FX/MP", |
472 | .max_alternatives = 2, | 476 | .n_counter = 8, |
473 | .add_fields = 0x001100005555ull, | 477 | .max_alternatives = 2, |
474 | .test_adder = 0x013300000000ull, | 478 | .add_fields = 0x001100005555ull, |
475 | .compute_mmcr = p970_compute_mmcr, | 479 | .test_adder = 0x013300000000ull, |
476 | .get_constraint = p970_get_constraint, | 480 | .compute_mmcr = p970_compute_mmcr, |
477 | .get_alternatives = p970_get_alternatives, | 481 | .get_constraint = p970_get_constraint, |
478 | .disable_pmc = p970_disable_pmc, | 482 | .get_alternatives = p970_get_alternatives, |
479 | .n_generic = ARRAY_SIZE(ppc970_generic_events), | 483 | .disable_pmc = p970_disable_pmc, |
480 | .generic_events = ppc970_generic_events, | 484 | .n_generic = ARRAY_SIZE(ppc970_generic_events), |
481 | .cache_events = &ppc970_cache_events, | 485 | .generic_events = ppc970_generic_events, |
486 | .cache_events = &ppc970_cache_events, | ||
482 | }; | 487 | }; |
488 | |||
489 | static int init_ppc970_pmu(void) | ||
490 | { | ||
491 | if (!cur_cpu_spec->oprofile_cpu_type || | ||
492 | (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970") | ||
493 | && strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970MP"))) | ||
494 | return -ENODEV; | ||
495 | |||
496 | return register_power_pmu(&ppc970_pmu); | ||
497 | } | ||
498 | |||
499 | arch_initcall(init_ppc970_pmu); | ||